Abstract: A method for fabricating an electrical connection structure of a circuit board is proposed. The circuit board is provided with a plurality of pads on a surface thereof and with a plurality of conductive structures therein for electrically connecting the pad. A plurality of openings is formed penetrating through an insulating layer provided on the circuit board to expose the pad. Subsequently, a conductive base is attached to one surface of the circuit board for electrically connecting the pad. By such arrangement, a conductive material can be formed on the pad located on the other surface of the circuit board by an electroplating process via the conductive base, the pad on the surface, and the conductive structure within the circuit board.

Abstract: A circuit board assembly having at least a passive component and a stack structure of the circuit board are disclosed, including: a carrier board formed with a through opening for receiving a semiconductor component having an active surface on which electrode pads are formed; a dielectric layer formed on the carrier board and the semiconductor component and formed with openings to expose the electrode pads; a circuit layer formed on the dielectric layer and having conductive structures formed in the openings of the dielectric layer for electrically connecting the electrode pads, and a plurality of lands for mounting at least one passive component electrically connected to the circuit layer; and a circuit build-up structure formed on the dielectric layer, the circuit layer and the passive component, with conductive structures formed for electrically connecting the circuit layer.

Abstract: A carrier board structure with a semiconductor component embedded therein and a method for fabricating the same are proposed. The method provides at least one semiconductor component and a carrier having a first surface and a second surface opposed to the first surface and at least one through hole. The semiconductor component has an active surface having a plurality of electrode pads and an inactive surface, opposed to the active surface, having a plurality of recesses. An adhesive layer is formed on the second surface of the carrier for sealing an end of through hole of the carrier. Thus, the semiconductor component can be mounted in the through hole of the carrier, and the inactive surface can be mounted on the adhesive layer, as well as the adhesive layer fills in the recess of semiconductor component and the gap between the through hole of carrier board and semiconductor component.

Abstract: A circuit board structure and a method for fabricating the same are proposed. A substrate with a first circuit layer formed on at least one surface thereof is provided. A dielectric layer is formed on the surface of the substrate, and a plurality of first and second openings are formed in the dielectric layer, wherein the second openings expose electrical connection pads of the first circuit layer. A metal layer is formed on the surface of the dielectric layer and in the first and second openings. By removing the metal layer on the surface of the dielectric layer, a second circuit layer is formed in the second openings, and a conductive structure is formed in the second openings for electrical connection with the first circuit layer. The present invention improves the bonding strength between the circuit layer and the dielectric layer, and the ability of fabricating fine circuits.

Abstract: The conductive connection structure of the present invention comprises a circuit board, a plurality of conductive pads, a solder mask layer, an electroless plating copper layer, and an electroless plating adhesive layer. The manufacturing method comprises the following steps: providing the circuit board having a plurality of conductive pads thereon; forming the solder mask layer, the electroless plating copper layer, and the electroless plating adhesive layer respectively on the surface of the circuit board, and forming a solder bump on the electroless plating adhesive layer. By the assistance of the conductive connection structure and the manufacturing method thereof, cavity otherwise formed on the conductive pads can be prevented, and the solder bumps therefore are firmly fixed on the conductive pads. Moreover, the stress in the surface between the solder bump and the conductive pad can be reduced as the semiconductor chip and the circuit board are combined.

Abstract: A circuit board structure with capacitor embedded therein and method for fabricating the same are disclosed, especially a core structure with capacitors embedded therein and method for fabricating the same. The structure comprising: a core board having a dielectric layer with a first surface and an opposite second surface; at least one high dielectric coefficient material layer formed in the dielectric layer, wherein a first electrode plate formed on the other surface of the high dielectric coefficient material layer; a first circuit layer formed on the first surface of the dielectric layer; a second circuit layer formed on the second surface of the dielectric layer and having a second electrode plate corresponding to the first electrode plate; and a first conductive via formed in the dielectric layer and electrically connecting the first electrode plate and the first circuit layer.

Abstract: The present invention provides a flip-chip package substrate and a method for fabricating a flip-chip package substrate comprising a circuit build-up structure, which comprises at least a dielectric layer and at least a circuit layer, wherein each dielectric layer comprises a first surface and a second surface, plural vias are formed in the first surface, the circuit layer is formed on the first surface and in the vias to electrically connect to another circuit layer disposed under the dielectric layer; a metal layer embedded in the exposed second surface of the circuit build-up structure without protruding the exposed second surface and connected to the circuit layer; and two solder masks disposed on the exposed first surface and the exposed second surface of the circuit build-up structure, wherein the solder masks have plural openings to separately expose part of the circuit layer and the metal layer functioning as conductive pads.

Abstract: A circuit board structure with an embedded semiconductor chip and a fabrication method thereof are provided, including the steps of providing a semiconductor wafer having an active surface with a plurality of electrode pads, a connection metal layer formed on the electrode pads: forming a protective layer on the connection metal layer and the semiconductor wafer, performing a cutting process to form a plurality of semiconductor dies, providing a carrier board having at least on e cavity for receiving the semiconductor chip; and forming sequentially on the protective layer covering the semiconductor chip and the carrier board a dielectric layer and a circuit layer electrically connected to the connection metal layer of the semiconductor chip. The present invention is a simple, in process and low in process cost, due to the connection metal layer covered by the protective layer formed on the semiconductor chip protected from oxidation and contamination.

Abstract: A plate structure having a chip embedded therein, comprises an aluminum oxide plate having an upper surface, a lower surface, plural aluminum channels connected to the upper surface and the lower surface, and a cavity therein; a chip embedded in the cavity, wherein the chip has an active surface; at least one electrode pad mounted on the active surface; and at least one build-up structure mounted on the surface of the aluminum oxide plate and the active surface of the chip, wherein the build-up structure comprises at least one conductive structure to electrically connect to the electrode pad. Besides, a method of manufacturing a plate structure having a chip embedded therein is disclosed.

Abstract: A package structure having a semiconductor chip embedded therein and a method of fabricating the same are disclosed. The package structure comprises: an aluminum oxide composite plate and a semiconductor chip. The aluminum oxide composite plate is formed by a stack consisting of an adhesive layer placed in between two aluminum oxide layers. The semiconductor chip having an active surface a plurality of electrode pads disposed thereon can be embedded and secured in the aluminum oxide composite plate. The present invention also comprises a method of fabricating the above-mentioned package structure. The present invention provides an excellent package structure, which can decrease the thickness of the package structure and make the package structure having characteristics of high rigidity and enduring tenacity at the same time.

Abstract: A semiconductor package substrate with embedded resistors and a method for fabricating the same are proposed. Firstly, an inner circuit board having a first circuit layer thereon is provided, and a plurality of resistor electrodes are formed in the fist circuit layer. Then, a patterned resistive material is formed on the inner circuit board and electrically connected to the resistor electrodes to accurately define a resistance value of resistors. Subsequently, at least one insulating layer is coated on a surface of the circuit board having the patterned resistive material. At least one patterned second circuit layer is formed on the insulating layer and electrically connected to the resistor electrodes by a plurality of conductive vias formed in the insulating layer or plated through holes formed through the circuit board.

Abstract: An electrically connecting terminal structure of a circuit board and a manufacturing method thereof are disclosed.

Abstract: A stack structure with semiconductor chips embedded in carriers comprises two carriers stacking together as a whole, at least two semiconductor chips having active surfaces with electrode pads and inactive surfaces corresponding thereto placed in the cavities of the carriers, at least one dielectric layer formed on the active surface of the semiconductor chip and the surface of the carrier, at least a conductive structure formed in the opening of the dielectric layer, and at least a circuit layer formed on the surface of the dielectric layer wherein the circuit layer is electrically connected to the electrode pad by the conductive structure, so as to form a three-dimensional module to increase the storage capacity dramatically and integrate the semiconductor chips in the carriers for efficiently reducing the size of the module, so that the combinations can be changed flexibly to form the required storage capacity according to the demands.

Abstract: A substrate for a pre-soldering material and a fabrication method of the substrate are proposed. The substrate having at least one surface formed with a plurality of conductive pads is provided. An insulating layer is formed over the surface of the substrate in such a way that a top surface of each of the conductive pads is exposed. Next, a conductive film and a resist layer are formed in sequence on the insulating layer and the conductive pads, wherein a plurality of openings are formed in the resist layer to expose a part of the conductive film above the conductive pad. Then, a pre-soldering material is deposited over the conductive pad by stencil printing or electroplating process.

Abstract: A module structure having embedded chips mainly comprises a dielectric layer, at least a semiconductor chip embedded in the dielectric layer, and at least a circuit structure formed on the surface of the dielectric layer, the circuit structure electrically connected to the semiconductor chip via a plurality of conductive structures formed in the dielectric layer, for embedding the module structure in an electronic device, and electrically connecting the electronic device via the circuit structure on the surface of the dielectric layer.

Abstract: A structure with embedded opto-electric components includes a carrier; at least one circuit board having a cavity and mounted on a carrier; at least one waveguide embedded in an inner layer of the circuit board and mounted on the carrier; at least one first opto-electric component embedded in the inner layer of the circuit board, and having an active terminal in contact with a transmission terminal of the waveguide; and at least one second opto-electric component mounted on the circuit board, and having an active terminal corresponding in position to another transmission terminal of the waveguide via the cavity. Since the first opto-electric component and the waveguide are in contact with each other and embedded in the circuit board, an optical transmission mechanism is simplified and times of reflection are decreased, thereby reducing errors and loss during transmission.

Abstract: A circuit board stack structure embedded with semiconductor components includes two circuit boards, each of which having an opening; circuit layers formed on top and bottom surfaces of the circuit boards, each of the circuit layers having a plurality of conductive structures and electrical connecting pads; two semiconductor components embedded in the openings respectively, each of the semiconductor components having a plurality of electrode pads electrically connected to a portion of the conductive structures; a plurality of conductive bumps implanted on the electrical connecting pads of at least one of the circuit boards; and a plurality of solder balls formed on the electrical connecting pads on the other of the circuit boards that is free of the conductive bumps, allowing the conductive bumps of the one of the circuit boards to be engaged with the solder balls of the other of the circuit boards.

Abstract: A method for repairing a conductive structure of a circuit board is proposed. The method is implemented by performing a micro-depositing process or a micro-plating process on a surface of at least a contact pad of a circuit board without having a conductive structure formed thereon through micro-droplet or micro-electrode technique, thereby forming a conductive structure on the surface of the at least one left-out contact pad of the circuit board. As a result, the fabrication yield is increased, and extra time and costs spent on reworking the circuit board can be avoided as compared with the prior art.

Abstract: A method for fabricating an electrical conductive structure of a circuit board is disclosed. The method includes providing a circuit board having a plurality of first and second electrically conductive pads; forming on the circuit board an insulating protection layer having a plurality of openings for exposing the first and second electrically conductive pads; forming a metal adhesive layer on the first and second electrically conductive pads; forming a conductive layer on the insulating protection layer and on the metal adhesive layer formed on the first and second electrically conductive pads, the conductive layer being electrical conductive to the first and second electrically conductive pads; forming on the conductive layer a resist layer having a plurality of openings for exposing the conductive layer on the second electrically conductive pads; and electroplating a conductive structure on the conductive layer on the second electrically conductive pads exposed from the openings.

Abstract: A method of fabricating an electrical connecting structure of a circuit board is disclosed. The method includes: providing a circuit board having a plurality of first and a plurality of second conductive pads; forming on the circuit board a solder mask having a plurality of openings to thereby expose the first and the second conductive pads; forming an metal adhesive layer on the first and the second conductive pads; forming a conductive layer on the circuit board and the metal adhesive layer; forming on the conductive layer a resistive layer, wherein a plurality of openings are formed in the resistive layer to expose the conductive layer on the second conductive pads; forming a metal post by electroplating through the conductive layer on the second conductive pads; removing the resistive layer and the conductive layer covered underneath; and forming a soldering layer on the metal post. This invention discloses a method of forming different connecting elements on a circuit board.