Patents Assigned to pSemi Corporation
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Patent number: 11831280Abstract: Methods and circuital arrangements for turning OFF branches of a multi-branch cascode amplifier are presented. First and second switching arrangements coupled to a branch allow turning OFF the branch while protecting transistors of the branch from a supply voltage that may be greater than a tolerable voltage of the transistors. The first switching arrangement includes a transistor-based switch that is in series connection with the transistors of the branch. The first switching arrangement drops the supply voltage during the OFF state of the branch and provides a conduction path for a current through the branch during the ON state of the branch. A resistor and a shunting switch are coupled to a gate of the transistor-based switch to reduce parasitic coupling effects of the transistor-based switch upon an RF signal coupled to the branch during the ON state and OFF state of the branch.Type: GrantFiled: February 13, 2023Date of Patent: November 28, 2023Assignee: PSEMI CORPORATIONInventors: Miles Sanner, Emre Ayranci, Parvez Daruwalla
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Patent number: 11817830Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.Type: GrantFiled: May 24, 2022Date of Patent: November 14, 2023Assignee: pSemi CorporationInventors: Rong Jiang, Khushali Shah
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Patent number: 11817893Abstract: Radio frequency (RF) acoustic wave resonator (AWR) filter circuits and methods. Embodiments essentially de-couple the stopband or notch characteristics of an RF filter from the passband characteristics. Accordingly, the de-coupled parameters can be individually designed to meet the specifications of a particular application. Partially-hybridized or fully-hybridized series-arm and parallel-arm AWR filter building blocks enable “de-coupled” RF filters having (1) wideband and low insertion loss passbands and (2) wideband deep notches (stopbands) with a specifically placed notch center frequency, without compromising the passband characteristics. The AWR filter building blocks include an inductance L that matches (resonates with) the electrostatic capacitance CO of the corresponding AWR within a desired passband.Type: GrantFiled: March 29, 2021Date of Patent: November 14, 2023Assignee: pSemi CorporationInventors: William Richard Smith, Jr., Muhammed Ibrahim Sezan, Dan William Nobbe
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Patent number: 11817778Abstract: An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.Type: GrantFiled: October 6, 2022Date of Patent: November 14, 2023Assignee: pSemi CorporationInventor: David M. Giuliano
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Patent number: 11811367Abstract: A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.Type: GrantFiled: April 27, 2022Date of Patent: November 7, 2023Assignee: pSemi CorporationInventors: Dan William Nobbe, David Halchin, Jeffrey A. Dykstra, Michael P. Gaynor, David Kovac, Kelly Michael Mekechuk, Gary Frederick Kaatz, Chris Olson
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Patent number: 11811304Abstract: Disclosed embodiments may include a power converter having a power conversion circuit and a protection circuit. The power conversion circuit is electrically coupled between a first terminal and a second terminal, to convert a first voltage from the first terminal to a second voltage outputted at the second terminal. The protection circuit is electrically coupled between an input terminal of the power converter and the first terminal. The protection circuit includes a first protection device and a clamping circuit. The first protection device withstands an input voltage of the power converter to continue an operation of the power conversion circuit when the input voltage exceeds a voltage threshold value. The clamping circuit is electrically coupled to a control terminal of the first protection device to clamp a control voltage of the first protection device.Type: GrantFiled: November 19, 2021Date of Patent: November 7, 2023Assignee: pSemi CorporationInventors: Buddhika Abesingha, Gregory Szczeszynski
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Publication number: 20230353047Abstract: In a power converter that includes a switched-capacitor circuit connected to a switched-inductor circuit, reconfiguration logic causes the switched-capacitor circuit to transition between first and second switched-capacitor configurations with different voltage-transformation ratios. A compensator compensates for a change in the power converter's forward-transfer function that would otherwise result from the transition between the two switched-capacitor configurations.Type: ApplicationFiled: January 11, 2023Publication date: November 2, 2023Applicant: pSemi CorporationInventor: Gregory SZCZESZYNSKI
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Patent number: 11804734Abstract: Methods and devices addressing power tracking of transmission systems using antenna arrays are disclosed. The disclosed teachings may be implemented on a channel element to channel element basis, are adaptive and can be implemented on short time durations such as time slots. Power efficiency can be improved when applying the described methods to the design of systems with antenna arrays.Type: GrantFiled: May 11, 2022Date of Patent: October 31, 2023Assignee: pSemi CorporationInventors: Donald Felt Kimball, Mark James O'Leary
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Patent number: 11804816Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.Type: GrantFiled: February 11, 2022Date of Patent: October 31, 2023Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
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Patent number: 11789481Abstract: Methods and devices for speeding up the onset of a target current through an output leg of a current mirror are presented. Upon activation of the current mirror, a pre-charge current is sourced to a node of the current mirror that is common to the output leg and an input leg of the current mirror. Sourcing of the pre-charge current is based on sensing, by a first transistor, of a voltage at the common node. Pre-charging of the common node continues up to a cutoff voltage sensed at the common node. Sourcing of the pre-charge current is provided by a second transistor coupled to the common node. Based on the voltage sensed at the common node, the first transistor controls the sourcing of the pre-charge current by the second transistor. Such control is based on a portion of a current from a current source that flows through the first transistor.Type: GrantFiled: August 10, 2021Date of Patent: October 17, 2023Assignee: PSEMI CORPORATIONInventor: Jaroslaw Adamski
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Patent number: 11791723Abstract: An apparatus for power conversion includes a transformation stage for transforming a first voltage into a second voltage. The transformation stage includes a switching network, a filter, and a controller. The filter is configured to connect the transformation stage to a regulator. The controller controls the switching network.Type: GrantFiled: December 22, 2021Date of Patent: October 17, 2023Assignee: pSemi CorporationInventor: David Giuliano
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Patent number: 11791707Abstract: In a power converter having a regulator and charge pump, both of which operate in plural modes, a controller receives information indicative of the power converter's operation and, based at least in part on said information, causes transitions between regulator modes and transitions between charge-pump modes.Type: GrantFiled: February 25, 2021Date of Patent: October 17, 2023Assignee: pSemi CorporationInventors: Aichen Low, Gregory Szczeszynski, David M. Giuliano
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Patent number: 11791340Abstract: Systems, methods, and apparatus for an improved body tie construction are described. The improved body tie construction is configured to have a lower resistance body tie exists when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie. Space efficient Body tie constructions adapted for cascode configurations are also described.Type: GrantFiled: April 14, 2021Date of Patent: October 17, 2023Assignee: pSemi CorporationInventor: Simon Edward Willard
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Patent number: 11784561Abstract: An apparatus for power conversion includes a switching network that controls interconnections between pump capacitors in a capacitor network that has a terminal coupled to a current source, and a charge-management subsystem. In operation, the switching network causes the capacitor network to execute charge-pump operating cycles during each of which the capacitor network adopts different configurations in response to different configurations of the switching network. At the start of a first charge-pump operating cycle, each pump capacitor assumes a corresponding initial state. The charge-management subsystem restores each pump capacitor to the initial state by the start of a second charge-pump operating cycle that follows the first charge-pump operating cycle.Type: GrantFiled: September 29, 2022Date of Patent: October 10, 2023Assignee: pSemi CorporationInventors: Aichen Low, Gregory Szczeszynski, David Guiliano
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Patent number: 11777451Abstract: Methods and apparatuses for controlling gain of a single stage cascode FET amplifier are presented. According to one aspect, a series-connected resistor and capacitor is coupled to a gate of a cascode FET transistor of the amplifier, the capacitor providing a short at frequencies of operation of the amplifier. According to another aspect, values of the resistor can be used to control gain of the amplifier. According to yet another aspect, the resistor is a variable resistor whose value can be controlled/adjusted to provide different gains of the amplifier according to a linear function of the resistor value. An input matching network coupled to an input of the amplifier can be used to compensate for different noise figure degradations from different values of the resistor.Type: GrantFiled: September 19, 2022Date of Patent: October 3, 2023Assignee: pSemi CorporationInventors: David Kovac, Joseph Golat
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Patent number: 11777485Abstract: Methods and devices to improve the switching speed of radio frequency FET switch stacks are disclosed. The described methods and devices are based on bypassing drain-sources resistors when the FET switch stack is transitioning from an ON to an OFF state. Several implementations of the disclosed teachings are also presented.Type: GrantFiled: April 26, 2022Date of Patent: October 3, 2023Assignee: PSEMI CORPORATIONInventors: Ravindranath D. Shrivastava, Simon Willard, Peter Bacon
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Patent number: 11777498Abstract: RF transistors manufactured using a bulk CMOS process exhibit non-linear drain-body and source-body capacitances which degrade the linearity performance of the RF circuits implementing such transistors. The disclosed methods and devices address this issue and provide solutions based on implementing two or more bias voltages in accordance with the states of the transistors. Various exemplary RF circuits benefiting from the described methods and devices are also presented.Type: GrantFiled: March 18, 2022Date of Patent: October 3, 2023Assignee: PSEMI CORPORATIONInventors: David Kovac, Joseph Golat
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Patent number: 11768515Abstract: Methods and apparatuses for an optimal timer array using a single reference counter are presented. According to one aspect, timers of the timer array use the single reference counter to process different timed trigger requests. A count translation logic block translates counts corresponding to the requested timed triggers to target values of the reference counter. Register arrays that include the target values and active/inactive status flags of the timers are used to implement specific timers. Comparators are used to compare values of the reference counter to the target values to establish expiration of the requested timed triggers. A target translation logic block translates a current value of the reference counter to an offset value from the target values for monitoring by an external circuit.Type: GrantFiled: February 22, 2021Date of Patent: September 26, 2023Assignee: pSemi CorporationInventor: Gerald Alcorn
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Patent number: 11761936Abstract: Novel integrated circuit environmental and temperature sensors in combination with measurement circuitry fully integrated as part of an ASIC die, which may be co-packaged with a pressure sensor integrated circuit to create a compact yet sensitive environment monitoring product. Embodiments may include one or more integrated local heating elements and control circuitry that are power supply independent, make efficient use of battery power, include an accurate in-built temperature detection capability, and provide digital close-loop control of the heating elements.Type: GrantFiled: March 8, 2021Date of Patent: September 19, 2023Assignee: pSemi CorporationInventors: Vivek Saraf, Vishnu Srinivasan
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Patent number: 11764670Abstract: An apparatus for processing electric power includes a power-converter having a path for power flow between first and second power-converter terminals. During operation the first and second power-converter terminals are maintained at respective first and second voltages. Two regulating-circuits and a switching network are disposed on the path. The first regulating-circuit includes a magnetic-storage element and a first-regulating-circuit terminal. The second regulating-circuit includes a second-regulating-circuit terminal. The first-regulating-circuit terminal is connected to the first switching-network-terminal and the second-regulating-circuit terminal is connected to the second switching-network-terminal. The switching network is transitions between a first switch-configuration and a second switch-configuration. In the first switch-configuration, charge accumulates in the first charge-storage-element at a first rate.Type: GrantFiled: November 15, 2021Date of Patent: September 19, 2023Assignee: pSemi CorporationInventor: David Giuliano