Patents Assigned to pSemi Corporation
  • Patent number: 11581621
    Abstract: Methods and devices to address antenna termination in absence of power supplies within an electronic circuit including a termination circuit and a switching circuit. The devices include regular NMOS devices that decouple the antenna from the switching circuit in absence of power supplies while the antenna is coupled to a terminating impedance having a desired impedance value through a native NMOS device. The antenna is coupled with the switching circuit via the regular NMOS device during powered conditions while the antenna is decoupled from the terminating impedance.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: February 14, 2023
    Assignee: pSemi Corporation
    Inventor: Sivakumar Ganesan
  • Patent number: 11581805
    Abstract: In a power converter that includes a switched-capacitor circuit connected to a switched-inductor circuit, reconfiguration logic causes the switched-capacitor circuit to transition between first and second switched-capacitor configurations with different voltage-transformation ratios. A compensator compensates for a change in the power converter's forward-transfer function that would otherwise result from the transition between the two switched-capacitor configurations.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: February 14, 2023
    Assignee: PSEMI CORPORATION
    Inventor: Gregory Szczeszynski
  • Patent number: 11575351
    Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: February 7, 2023
    Assignee: pSemi Corporation
    Inventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
  • Patent number: 11569812
    Abstract: Methods and devices to address the undesired DC voltage distribution across switch stacks in OFF state are disclosed. The disclosed devices include charge control elements that sample the RF signal to generate superimposed voltages at specific points of the switch stack biasing circuit. The provided voltages help reducing the drooping voltages on drain/source/body terminals of the transistors within the stack by supplying the current drawn by drain/source terminals of the stacked transistors and/or by sinking the body leakage current exiting the body terminals of such transistors. Methods and techniques teaching how to provide proper tapping points in the biasing circuit to sample the RF signal are also disclosed.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: January 31, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Eric S. Shapiro, Simon Edward Willard
  • Patent number: 11569857
    Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 31, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Peter Bacon
  • Patent number: 11563455
    Abstract: Circuits and methods that provide fine-resolution measurements of RF signal power within a communication system band, thereby more accurately measuring RF interference or the potential of RF interference. One aspect of embodiments of the present invention is a narrow-band tunable filter that includes two elements coupled in series, a periodic passband filter and a tunable filter. The purpose of the periodic passband filter is to generate multiple periodic passbands for an applied RF signal. The purpose of the tunable filter is to generate a single passband, generally with a tunable center frequency. By serially coupling the two filter types in either order, the single passband of the tunable filter is superimposed over one of the periodic passbands of the periodic passband filter, synergistically resulting in an extremely narrow passband.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: January 24, 2023
    Assignee: pSemi Corporation
    Inventor: Peter Bacon
  • Patent number: 11552560
    Abstract: An apparatus includes first and second pluralities of switches, a controller for controlling these switches, gate-drivers for driving switches from the first plurality of switches, and first and second terminals configured for coupling to corresponding first and second external circuits at corresponding first and second voltages. During operation, the controller causes the first plurality of switches to transition between states. These transitions result in the second voltage being maintained at a value that is a multiple of the first voltage. The controller also causes the second plurality of switches to transition between states. These transitions resulting in capacitors being coupled or decoupled from the second voltage. The gate drivers derive, from the capacitors, charge for causing a voltage that enables switches from the first plurality of switches to be driven.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: January 10, 2023
    Assignee: PSEMI CORPORATION
    Inventors: David Giuliano, Gregory Szczeszynski, Raymond Barrett, Jr.
  • Patent number: 11552543
    Abstract: Circuits and methods encompassing a power converter that can be started and operated in a reversed unidirectional manner or in a bidirectional manner while providing sufficient voltage for an associated auxiliary circuit and start-up without added external circuitry for a voltage booster and/or a pre-charge circuit—that is, with zero external components or a reduced number of external components. Embodiments include an auxiliary circuit configured to selectively couple the greater of a first or a second voltage from a power converter to provide power to the auxiliary circuit. Embodiments include an auxiliary circuit configured to select a subcircuit coupled to the greater of a first or a second voltage from a power converter to provide an output for the auxiliary circuit. Embodiments include a charge pump including a gate driver configured to be selectively coupled to one of a first voltage node or second voltage node of the charge pump.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: January 10, 2023
    Assignee: pSemi Corporation
    Inventor: Aichen Low
  • Patent number: 11539334
    Abstract: Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.
    Type: Grant
    Filed: March 14, 2021
    Date of Patent: December 27, 2022
    Assignee: pSemi Corporation
    Inventor: Jonathan James Klaren
  • Patent number: 11539382
    Abstract: Methods and devices to support multiple frequency bands in radio frequency (RF) circuits are shown. The described methods and devices are based on adjusting the effective width of a transistor in such circuits by selectively disposing matching transistors in parallel with the transistor. The presented devices and methods can be used in RF circuits including low noise amplifiers (LNAs), RF receiver front-ends or any other RF circuits where input matching to wideband inputs is required.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: December 27, 2022
    Assignee: PSEMI CORPORATION
    Inventors: Parvez Daruwalla, Rong Jiang, Sung Kyu Han, Khushali Shah
  • Patent number: 11533037
    Abstract: Digital step attenuator (DSA) and digital phase shifter (DPS) multi-stage circuit architectures that provide for high resolution. Embodiments use a dithering approach to weight bit positions to provide a much finer resolution than the lowest-valued individual stage. Bit position weights for stages are determined so as to enable selection of combinations of n bit positions that provide a desired total attenuation or phase shift range while allowing utilization of the large number of states (2n) available to produce fractional intermediate steps of attenuation or phase shift. The fractional intermediate steps have a resolution finer than the lowest-valued stage. Bit position weights may be determined using a weighting function, including weightings determined from a linear series, a geometric series, a harmonic series, or alternating variants of such series. In some embodiments, at least one bit position has a fixed value that is not determined by the bit position weighting function.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: December 20, 2022
    Assignee: pSemi Corporation
    Inventors: Vikas Sharma, Peter Bacon
  • Patent number: 11527952
    Abstract: During its first and second residence times, corresponding first and second currents flow between a charge pump and a circuit that connects to one of the charge pump's terminals. Based on a feedback measurement from the charge pump, a controller adjusts these first and second currents.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: December 13, 2022
    Assignee: PSEMI CORPORATION
    Inventors: Tim Wen Hui Yu, Gregory Szczeszynski
  • Patent number: 11522447
    Abstract: Circuit embodiments for a switched-capacitor power converter, and/or methods of operation of such a converter, that robustly deal with various startup scenarios, are efficient and low cost, and have quick startup times to steady-state converter operation. Embodiments prevent full charge pump capacitor discharge during shutdown of a converter and/or rebalance charge pump capacitors during a startup period before switching operation by discharging and/or precharging the charge pump capacitors. Embodiments may include a dedicated rebalancer circuit that includes a voltage sensing circuit coupled to an output voltage of a converter, and a balance circuit configured to charge or discharge each charge pump capacitor towards a target steady-state multiple of the output voltage of the converter as a function of an output signal from the voltage sensing circuit indicative of the output voltage. Embodiments prevent or limit current in-rush to a converter during a startup state.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: December 6, 2022
    Assignee: pSemi Corporation
    Inventors: Aichen Low, Walid Fouad Mohamed Aboueldahab, Gregory Szczeszynski
  • Patent number: 11522524
    Abstract: A programmable voltage variable attenuator (VVA) that enables selection among multiple analog, continuous attenuation ranges. Some embodiments include a dual-mode interface to enable digitally programming a DAC and provide the analog output to control the attenuation level of the VVA, or alternatively apply an externally provided analog voltage to directly control the VVA attenuation level. A VVA may be used in conjunction with a digital step attenuator (DSA). Some embodiments include circuitry for changing the VVA reference impedance. The attenuator architecture of the VVA includes one or more variable resistance shunt elements and/or series elements which may be a resistor and FET circuit controlled by a provided variable analog voltage. The multiple resistance element architecture may be implemented with stacked FET devices. Embodiments for the VVA may be based, for example, on T-type, Bridged-T type, Pi-type, L-pad type, reflection type, or balanced coupler type attenuators.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: December 6, 2022
    Assignee: pSemi Corporation
    Inventor: Peter Bacon
  • Patent number: 11519956
    Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: December 6, 2022
    Assignee: pSemi Corporation
    Inventors: Dan William Nobbe, Ronald Eugene Reedy, Peter Bacon, James S. Cable
  • Patent number: 11522445
    Abstract: Various embodiments of charge adjustment techniques for a switched capacitor power converter are described. In one example embodiment, briefly, charge adjustment techniques may include a technique to operate a charge pump so as to reduce electrical transient effects that may occur during charge pump transition operation between a first steady state charge pump operation with respect to a first configuration gain mode and a second steady state charge pump operation with respect to a second configuration gain mode. In some instances, electrical transient effects may occur during charge pump transition operation, at least in part, from a selectable adjustment of charge pump configuration gain with respect to a configuration gain mode.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: December 6, 2022
    Assignee: pSemi Corporation
    Inventors: Aichen Low, David M. Giuliano, Gregory Szczeszynski, Jeff Summit, Oscar Blyde
  • Patent number: 11509270
    Abstract: Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: November 22, 2022
    Assignee: pSemi Corporation
    Inventor: Jaroslaw Adamski
  • Patent number: 11507125
    Abstract: A controllable temperature coefficient bias (CTCB) circuit is disclosed. The CTCB circuit can provide a bias to an amplifier. The CTCB circuit includes a variable with temperature (VWT) circuit having a reference circuit and a control circuit. The control circuit has a control output, a first current control element and a second current control element. Each current control element has a “controllable” resistance. One of the two current control elements may have a relatively high temperature coefficient and another a relatively low temperature coefficient. A controllable resistance of one of the current control elements increases when the controllable resistance of the other current control element decreases. However, the “total resistance” of the current control circuit remains constant with a constant temperature. The VWT circuit has an output with a temperature coefficient that is determined by the relative amount of current that flows through each current control element of the control circuit.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: November 22, 2022
    Assignee: pSemi Corporation
    Inventors: Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta
  • Patent number: 11496126
    Abstract: Various methods and circuital arrangements for leakage reduction in MOS devices are presented. A pull-up circuit is selectively coupled to a gate of the MOS device to provide control of a voltage to the gate that is larger than a source voltage. Voltage switching circuits selectively couple different voltages to the body and/or back-gate terminals of the MOS device. During a standby mode of operation, the leakage current of the MOS device is decreased by driving the MOS device further into its subthreshold leakage region. During the standby mode, a threshold voltage of the MOS device is increased by coupling a voltage higher than the source voltage to the body and/or back-gate terminals. The MOS device can be a pass device used in low dropout regulator (LDO). During the standby mode, the LDO maintains output regulation by driving the MOS device further into its subthreshold leakage region and/or increasing the threshold voltage.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: November 8, 2022
    Assignee: PSEMI CORPORATION
    Inventor: Buddhika Abesingha
  • Patent number: 11496047
    Abstract: An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: November 8, 2022
    Assignee: pSemi Corporation
    Inventor: David M. Giuliano