Patents Assigned to RENESAS
  • Publication number: 20130326539
    Abstract: A semiconductor device includes first and second central processing units (0, 3) and a set of monitoring registers (60) provided inside or outside the second central processing unit (3). Information representing an internal state of the first central processing unit (0) is transferred from the first central processing unit (0) to the set of monitoring registers (60) during execution of a program, and the set of monitoring registers (60) holds such transferred information. The set of monitoring registers (60) is mapped in a memory space of the second central processing unit (3).
    Type: Application
    Filed: February 20, 2012
    Publication date: December 5, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Sugako Otani, Hiroyuki Kondo
  • Publication number: 20130326097
    Abstract: A semiconductor device capable of implementing system configurations corresponding to various PCIe topologies is provided. A RAM stores one or more configuration registers that define function information of a PCIe device. A Link control unit decodes a request received from a PCIe host and outputs a decoded result to a CPU. The CPU reads a corresponding configuration register from the RAM based on the decoded result received from the Link control unit, and generates a response to the request and causes the Link control unit to transmit the response. Thus, system configurations corresponding to various PCIe topologies can be implemented.
    Type: Application
    Filed: February 17, 2012
    Publication date: December 5, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenichi Shimizu, Toshihiro Morita, Yasuhiro Ami
  • Publication number: 20130315294
    Abstract: A serial communication apparatus includes a slew rate control circuit, an output circuit, a detection circuit, and a switching circuit. The slew rate control circuit has a predetermined impedance, and supplies a constant current from an output according to an input signal. In the output circuit, first capacitance is charged and discharged by the constant current from the slew rate control circuit. The output circuit outputs a digital signal from an output terminal according to a drive voltage. The noise detection circuit detects noise propagated from the output terminal, and outputs a switching signal according to a detection result. The switching circuit switches an impedance of the slew rate control circuit to a value smaller than the predetermined impedance according to the switching signal.
    Type: Application
    Filed: February 24, 2012
    Publication date: November 28, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshiaki Ishizeki
  • Publication number: 20130316500
    Abstract: The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 28, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yusuke OTA, Fukumi SHIMIZU
  • Publication number: 20130315072
    Abstract: Apparatus, methods, and computer programs are disclosed that include sending an update message to a core network by a voice centric user equipment coupled to a legacy access network supporting circuit switched voice service, receiving an updating accept message containing a status report of possible enhanced network capabilities of a non-legacy access network, and, in response to receiving the status report of possible enhanced network capabilities, determining whether to enable the non-legacy access network.
    Type: Application
    Filed: May 22, 2013
    Publication date: November 28, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Hannu Petri HIETALAHTI, Matti MOISANEN, Samuli HEIKKINEN
  • Publication number: 20130316762
    Abstract: A method, apparatus and computer program product are provided to facilitate the establishment of device-to-device communications, such as non-cellular communications or cellular communications in a licensed exempt band. A method and apparatus receive cellular signals including one or more beacon transmission parameters, such as a beacon transmission interval and an identifier, and a beacon transmission status flag. The method and apparatus may also determine that the beacon transmission status flag is set to authorize beacon transmissions and then cause non-cellular beacon signals to be repeatedly transmitted in accordance with the one or more beacon transmission parameters. The method and apparatus may also cause a device-to-device connection to be established following transmission of the beacon signals. The device-to-device connection may be either a non-cellular device-to-device connection or a cellular device-to-device connection.
    Type: Application
    Filed: August 1, 2013
    Publication date: November 28, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Gilles CHARBIT, Chunyan GAO, Haiming WANG
  • Publication number: 20130313624
    Abstract: A first connection portion and a second connection portion connect a first control gate to a second control gate, and are separated from each other. The first control gate includes a first disconnection portion between the first connection portion and a source diffusion layer closest to the first connection portion. The second control gate includes a second disconnection portion between the second connection portion and the source diffusion layer closest to the second connection portion. A first word gate and a second word gate are not disconnected in portions overlapping the first disconnection portion and the second disconnection portion.
    Type: Application
    Filed: February 21, 2012
    Publication date: November 28, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Takayuki Onda
  • Publication number: 20130314134
    Abstract: Signal synchronisers synchronise input signals with a clock signal. The input of each synchroniser is connected to a first input and the output of each synchroniser is connected to a second input of a respective first gate arrangement. The first gate arrangements provide an output signal only if there is an input signal on the first input and none on the second input or vice versa. The outputs of each of the first gate arrangements is connected to respective inputs of a second gate arrangement, which provides an output signal if there is a signal on any of its inputs. The output of the second gate arrangement is connected to a third gate arrangement which operates such that the clock signal to the synchronisers is only enabled when there is a change to the state of a signal received at the input of at least one of the synchronisers.
    Type: Application
    Filed: January 21, 2013
    Publication date: November 28, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Ari Tapani KULMALA, Yang QU
  • Publication number: 20130307036
    Abstract: In a semiconductor chip constituting an LCD driver, a mark is formed in an alignment mark formation region over a semiconductor substrate. The mark is formed in the same layer as that of an uppermost layer wiring (third layer wiring) in an integrated circuit formation region. Then, in the lower layer of the mark and a background region surrounding the mark, patterns are formed. At this time, the pattern Pla is formed in the same layer as that of a second layer wiring and the pattern Pib is formed in the same layer as that of a first layer wiring. Further, the pattern P2 is formed in the same layer as that of a gate electrode, and the pattern P3 is formed in the same layer as that of an element isolation region.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 21, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Renesas Electronics Corporation
  • Publication number: 20130307821
    Abstract: A semiconductor device for use in a touch panel and capable of uniquely identifying the touched coordinates over the touch panel is disclosed. When a multi-touch state is detected over the touch panel by self-capacitance method, the semiconductor device isolates the multiple touch electrodes found to be in the touch state and has these electrodes identified by mutual capacitance method.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 21, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Teruyuki KOGO
  • Publication number: 20130308479
    Abstract: An arrangement is described for adapting outer loop precoder phase combiner in a radio communication system having coordinated multipoint transmission. In the arrangement ACK/NACK-message received as a response to a transmitted data packet is used for adapting the phase. When a NACK-message is received the phase may be adapted or it may be further determined if the error was due to error in channel code or due to destructive inter-point signal combining. If the error was due to destructive combining the phase is adjusted.
    Type: Application
    Filed: April 30, 2013
    Publication date: November 21, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Karol SCHOBER, Timo Eric ROMAN, Helka-Liina MAATTANEN, Mihai Horatiu ENESCU
  • Publication number: 20130308355
    Abstract: The number of ICs used for a power converter is reduced. The power converter includes n power transistors each having an emitter terminal or a source terminal connected to a common line, and driver ICs. Each of the driver ICs includes n pre-drivers that drive the respective n power transistors, and a receiver circuit that is integrated monolithically with the n pre-drivers. The receiver circuit is coupled with a transmitter circuit by AC coupling, and outputs a control signal that controls the n pre-drivers in response to a signal received from the transmitter circuit.
    Type: Application
    Filed: April 18, 2013
    Publication date: November 21, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Shunichi KAERIYAMA
  • Publication number: 20130308557
    Abstract: Embodiments include a method for physical layer transmission in a network equipment including receiving, from a higher layer, messages to be transmitted during a subframe on one or more control channels. The number of elements required (i.e. aggregation level) for each control channel is determined. A plurality of physical resource blocks (PRBs) for transmitting the control channels and partitioning the PRBs into clusters is allocated. The interleaving depth (IDP) for each cluster is determined. Each element is mapped to a cluster according to the IDP for that cluster. A transmission signal including the clusters is generated.
    Type: Application
    Filed: February 11, 2013
    Publication date: November 21, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Chunyan GAO, Shuang TAN, Erlin ZENG, Tommi Tapani KOIVISTO, Tero Heikki Petteri KUOSMANEN
  • Publication number: 20130300477
    Abstract: A semiconductor device includes a controlled oscillator and a control unit. The controlled oscillator includes a resonance circuit, an amplification unit, and a current adjustment unit. The resonance circuit includes one or a plurality of inductors and a first capacitive unit having a variable capacitance value. The amplification unit is connected to the resonance circuit, and outputs a local oscillation signal having an oscillation frequency corresponding to a resonance frequency of the resonance circuit. The current adjustment unit adjusts a value of a drive current to be supplied to the amplification unit. The control unit controls the capacitance value of the first capacitive unit and the current adjustment unit. When the control unit instructs the current adjustment unit to change the value of the drive current to be supplied to the amplification unit, the control unit also changes the capacitance value of the first capacitive unit.
    Type: Application
    Filed: January 26, 2011
    Publication date: November 14, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Keisuke Ueda, Toshiya Uozumi, Ryo Endo
  • Publication number: 20130301442
    Abstract: A method, apparatus and computer program product are provided in order to provide for periodic measurements related to a frequency identified by the network, such as a downlink frequency associated with a secondary uplink frequency. In the context of a method, a message is caused to be transmitted to a mobile terminal indicating that the mobile terminal is to perform periodic measurements in relation to a secondary uplink frequency. Following the performance of the periodic measurements by the mobile terminal, the method also includes receiving an indication of the periodic measurements in relation to the secondary uplink frequency that have been performed by the mobile terminal.
    Type: Application
    Filed: March 25, 2013
    Publication date: November 14, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventors: Brian Alexander MARTIN, Keiichi KUBOTA
  • Publication number: 20130299970
    Abstract: To provide a semiconductor device characterized in that lands for mounting thereon solder balls placed in an inner area of a chip mounting area have an NSMD structure. This means that lands for mounting thereon solder balls placed in an area of the back surface of a through-hole wiring board overlapping with a chip mounting area in a plan view have an NSMD structure. According to the invention, a semiconductor device to be mounted on a mounting substrate with balls has improved reliability.
    Type: Application
    Filed: April 26, 2013
    Publication date: November 14, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Kozo HARADA, Shinji BABA, Masaki WATANABE, Satoshi YAMADA
  • Publication number: 20130305065
    Abstract: A controller is formed as one chip, and controls a voltage regulator that supplies a power supply voltage to a CPU. The controller includes: an input unit for receiving a monitor voltage for monitoring the power supply voltage applied to the CPU; a control unit for detecting that the power supply voltage is decreased to a target voltage by the monitor voltage with the voltage regulator being in OFF state in a discharge mode; and an output unit for outputting a result signal indicating to make transition to a normal mode, when the power supply voltage has reached the target voltage. The control unit includes a calculation circuit, which is operated in accordance with a program. The calculation circuit is provided between the input unit and the output unit.
    Type: Application
    Filed: January 28, 2011
    Publication date: November 14, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi Tanaka, Hiroshi Murakami
  • Publication number: 20130301760
    Abstract: Methods, apparatus and computer programs are provided for performing signal interference ratio estimation with respect particularly to non-constant modulus data. A method is provided that includes causing one or more data symbols to be demodulated resulting in one or more soft bits. An estimate is determined for a second order moment and a fourth order moment for the one or more soft bits. A signal to noise ratio is determined based on a signal component and a noise component of the estimated second order moment and the estimated fourth order moment for the one or more soft bits.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 14, 2013
    Applicant: RENESAS MOBILE CORPORATION
    Inventor: Jukka Pekka Tapaninen
  • Publication number: 20130292690
    Abstract: In a high electron mobility transistor, with a normally-off operation maintained, on-resistance can be sufficiently reduced, so that the performance of a semiconductor device including the high electron mobility transistor is improved. Between a channel layer and an electron supply layer, a spacer layer whose band gap is larger than the band gap of the electron supply layer is provided. Thereby, due to the fact that the band gap of the spacer layer is large, a high potential barrier (electron barrier) is formed in the vicinity of an interface between the channel and the electron supply layer.
    Type: Application
    Filed: April 29, 2013
    Publication date: November 7, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yuji ANDO, Kazuki OTA
  • Publication number: 20130285207
    Abstract: Disclosed is a semiconductor device. The semiconductor device includes a functional circuit having a resistor formed by a plurality of polysilicon resistors, and in which the property of the functional circuit can be adjusted by trimming the resistor, and in which the polysilicon resistors are coupled in series or in parallel to each other and arranged in a direction perpendicular to one side of the semiconductor device.
    Type: Application
    Filed: April 17, 2013
    Publication date: October 31, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Satoshi MAEDA, Maya UENO