Abstract: An apparatus and a method are provided, which, for example in a user equipment, measure a transmission channel based on reference resources with respect to at least two transmission points, establish a feedback report based on the measurement, the feedback report including a plurality of channel feedback information related to each transmission point, and send the feedback report on a physical uplink control channel.

Abstract: An object of the present invention is to provide a semiconductor device having a nonvolatile memory cell of a high operation speed and a high rewrite cycle and a nonvolatile memory cell of high reliability. In a split gate type nonvolatile memory in which memory gate electrodes are formed in the shape of sidewalls of control gate electrodes, it is possible to produce a memory chip having a memory of a high operation speed and a high rewrite cycle and a memory of high reliability at a low cost by jointly loading memory cells having different memory gate lengths in an identical chip.

Abstract: Embodiments provide a transmitter and a method for transmitting data via a combination of a first signal modulated at a first carrier frequency, and a second signal modulated at a second carrier frequency, different to the first carrier frequency. In one embodiment the transmitter includes a local oscillator and is configured to adaptively configure the local oscillator to operate at a first local oscillator frequency and an alternative local oscillator frequency, different to the first frequency, in dependence on a required signal strength of the first signal relative to a required signal strength of the second signal.

Abstract: A semiconductor device includes a one-segment tuner I/F that is connected to a one-segment tuner, a tuner I/F that is connected to a digital terrestrial tuner, a decoder that selectively decodes a first broadcast signal supplied from the one-segment tuner I/F and a second broadcast signal supplied from the tuner I/F, a general purpose processor that is provided separately from the decoder and decodes the first broadcast signal, and a switch unit that, based on signal intensity of the second broadcast wave, switches the decoding by the decoder between the first broadcast signal and the second broadcast signal while the general purpose processor is decoding the first broadcast signal. The one-segment tuner I/F, the tuner I/F, the decoder, the general purpose processor, and the switch unit are integrated on one chip.

Abstract: For efficient issue of a superscalar instruction a circuit is employed which retrieves an instruction of each instruction code type other than a prefix based on a determination result of decoders for determining instruction code type, adds the immediately preceding instruction to the retrieved instruction, and outputs the resultant. When an instruction of a target code type is detected in a plurality of instruction units to be searched, the circuit outputs the detected instruction code and the immediately preceding instruction other than the target code type as prefix code candidates. When an instruction of a target code type cannot be detected at the rear end of the instruction units, the circuit outputs the instruction at the rear end as a prefix code candidate. When an instruction of a target code type is detected at the head in the instruction code search, the circuit outputs the instruction code at the head.

Abstract: A display panel driver includes a color reducing circuit and a driving section. The driving section is configured to drive a first pixel and a second pixel. If a second input image data and a third input image data corresponding to the second pixel are supplied as an image data of a second image display format, then the color reducing circuit generates a third color reduction image data and a fourth color reduction image data. If the first input image data is supplied as the image data of the first image display format, then the first selector selects the third error value, and if the second input image data and the third input image data are supplied as the image data of the second image display format, then the first selector selects the second error value.

Abstract: There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary BL between the element forming region DA and dummy region FA by placing the first dummy pattern DP1 of relatively wider area and the second dummy pattern DP2 of relatively small area in the dummy region FA. Thereby, the flatness of the surface of the silicon oxide film embedded within the isolation groove can be improved over the entire part of the dummy region FA. Moreover, an increase of the mask data can be controlled when the first dummy patterns DP1 occupy a relatively wide region among the dummy region FA.

Abstract: A semiconductor device includes a semiconductor substrate, a wiring layer provided over the semiconductor substrate, a high frequency wiring provided in the wiring layer, and plural dummy metals provided in the wiring layer apart from the high frequency wiring. In a plan view, the wiring layer includes a high frequency wiring vicinity region and an external region surrounding the high frequency wiring vicinity region. The high frequency wiring vicinity region includes a first region enclosed by an outer edge of the high frequency wiring, and a second region surrounding the first region. The plural dummy metals are disposed dispersedly in the high frequency wiring vicinity region and in the external region respectively. An average interval between the dummy metals in the high frequency wiring vicinity region is wider than that in the external region.

Abstract: Methods and apparatus for enabling ciphering error detection and recovery in a telecommunications network. Predetermined data is inserted into at least one radio link control service data unit at a network entity. The predetermined data has the same form as a packet data convergence protocol header. The at least one radio link control service data unit comprising the predetermined data is transmitted to a user equipment in the network. As a result, the user equipment is able to apply, on the basis of the predetermined data, either an unacknowledged mode radio link control ciphering error detection and recovery mechanism or a packet data convergence protocol ciphering error detection and recovery mechanism to the at least one radio link control service data unit.

Abstract: A manufacturing yield of a semiconductor device including a power transistor is improved. When forming a tip portion LE1c of a first lead, a tip portion LE2c of a second lead, and a tip portion LE3c of a third lead by using a spanking die SDM1, the tip portion LE1c of the first lead, the tip portion LE2c of the second lead, and the tip portion LE3c of the third lead are pressed by an upper surface of a protrusion portion provided on a pressing surface of a lower die SD1 and a bottom surface of a groove portion provided in a pressing surface of an upper die SU1, and a bent portion of the second lead and a bent portion of the third lead are pressed by a flat pressing surface of the lower die SD1 and a flat pressing surface of the upper die SU1.

Abstract: Examples are described relating to methods, apparatus and computer programs for configuring a user equipment in a cellular wireless network. Certain exemplary methods involve receiving (440), at the user equipment (430), control information regarding one or more of a plurality of channel-state information (CSI) reference signals. The plurality of CSI reference signals are receivable by the user equipment (430) from one or more of a plurality of antenna ports that form part of the cellular wireless network, the plurality of CSI reference signal being associated with corresponding antenna ports. The control information is for use in configuration of the user equipment (430) and is received over a radio communications downlink from a node (410) in the cellular wireless network. If estimation of one or more radio communication channels at the user equipment (430) is configured (450) based on the received control information, improvements in demodulation and CSI feedback are achieved.

Abstract: There is a need to highly integrate a circuit area of content addressable memory (CAM) and ensure faster operation thereof. A priority encoder and row decoder portion shares a row address register including more than one row. Each row of the row address register corresponds to each entry of a TCAM array mat and retains each address. Each row of the row address register corresponds to each word line and match line of the TCAM array mat. Writing data to the TCAM array mat activates word line for a row retained in the row address register corresponding to a specified address. Searching for the TCAM array mat activates a match line for the TCAM array mat. The row address register for the corresponding row stores the address of an entry for the TCAM array mat matching search data.

Abstract: A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a MOS type first transistor section (3) used for information storage, and a MOS type second transistor section (4) which selects the first transistor section. The second transistor section has a bit line electrode (16) connected to a bit line, and a control gate electrode (18) connected to a control gate control line. The first transistor section has a source line electrode (10) connected to a source line, a memory gate electrode (14) connected to a memory gate control line, and a charge storage region (11) disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section.

Abstract: A semiconductor storage device includes a memory cell array, a plurality of word lines, a plurality of bit lines, a first gate wiring element 3a, 3b, a second gate wiring element 3c, 3d, a first connector 5a, 5b, and a second connector 5c, 5d. Each memory cell 10 has first and second sets having a driver transistor 11, a load transistor 12, and an access transistor 13. The word lines are arranged in parallel to each other along a first direction. The bit lines are arranged in parallel to each other along a second direction perpendicular to the first direction. The first gate wiring element comprises a gate electrode of the first driver transistor and the first load transistor, and has a rectangular shape having straight line on opposite sides. The second gate wiring element comprises a gate electrode of the access transistor and has a rectangular shape having straight line on opposite sides.

Abstract: Provided are a semiconductor device having a high breakdown voltage and attaining the restraint of the action of a parasite bipolar transistor, and a method for producing the device. A high-breakdown-voltage p-channel-type transistor included in the semiconductor device has a first n-type semiconductor layer arranged in a semiconductor substrate and at a main-surface-side (upside) of a p-type region in the semiconductor substrate, and a local n-type buried region arranged just below a first p-type dopant region to contact the first n-type semiconductor layer.

Abstract: Passivation films 3a, 3b are formed to cover both surfaces of semiconductor substrate 1 which comprises terminal pads 2a, 2b on both surfaces. Openings 3c, 3d are provided at positions on passivation films 3a. 3b which match with terminal pads 2a, 2b. Throughholes 9 are formed inside of openings 3c, 3d to extend through terminal pad 2a, semiconductor substrate 1, and terminal pad 2b. Insulating layer 4 made of SiO2, SiN, SiO, or the like is formed on the inner surfaces of throughholes 9. Buffer layer 5 made of a conductive adhesive is formed to cover insulating layer 4 and terminal pads 2a, 2b in openings 3c, 3d. Further, conductive layer 6 made of a metal film is formed on buffer layer 5 by electrolytic plating, non-electrolytic plating, or the like.

Abstract: Disclosed is a technique in which an excessive resin can be stably cut and removed in a molding step. In a step for separating part of a runner leading to a resin-sealing body from the resin-sealing body, the runner is formed by a first runner and a second runner coupled to the first runner and the resin-sealing body. The runner is separated from a middle of the second runner by supporting, with a first supporting portion, the second runner from the side of the second surface of a lead frame, and by pushing down, with a break pin, the first runner in the direction from the side of the first surface of the lead frame toward the side of the second surface thereof, while the resin-sealing body is in a condition of floating in the air.

Abstract: There is provided a regulator circuit capable of increasing the capacity of the output transistor for supplying current, stably generating an internal power supply voltage and adapting to the reduction of a power supply voltage. The regulator circuit includes an output transistor which is supplied with an external power supply voltage and supplies dropped voltage to an internal circuit, a differential amplifier for outputting a gate potential applied to the gate of the output transistor, a reference voltage generating circuit for supplying a reference voltage to the differential amplifier, and a cut-off transistor for turning off the output transistor to stop supplying power to the internal circuit. The output transistor is comprised of a depression NMOS transistor whose threshold voltage is a negative voltage. The regulator circuit further includes substrate potential control means for controlling the substrate potential of the depression NMOS transistor.

Abstract: An apparatus and method suppress unwanted signal components in receiving signals during wireless communication. A first circuitry is arranged to process a first signal, a second circuitry is arranged to apply transferred impedance filtering on a second signal according to a filter clock frequency, a signal branching circuitry is arranged to branch an input signal into the first circuitry and the second circuitry, and a signal combining circuitry is arranged to combine the processed first signal and the filtered second signal such that signal components of the first signal processed in the first circuitry and the filtered second signal are in-phase for signal frequencies equal to the filter clock frequency.

Abstract: To provide a semiconductor device and a mobile terminal device capable of operating with stability. A semiconductor device includes an HSIC physical layer circuit fixedly connected to another semiconductor device through a bus line, a USB link control unit that operates with either a USB host function or a USB device function, and link-connects to the another semiconductor device, a nonvolatile storage unit that stores selection data, the selection data being used to select the USB function with which the USB link control unit operates, and a semiconductor substrate on which the HSCI physical control unit, the USB link control unit, and the nonvolatile storage unit are formed.