Abstract: Systems and methods for bi-directional power flow control using a single battery charger are described. According to one example, a semiconductor device is generally described. The semiconductor device may include a charger configured to supply power from a charging interface to a battery in a forward mode, and supply power from the battery to a load in a reverse mode. The semiconductor device may include a first isolation switch disposed between the charging interface and the charger, a second isolation switch disposed between the charger and the load, and a controller configured to enable the first isolation switch and operate the charger in the forward mode, and enable the second isolation switch and operate the charger in the reverse mode.

Abstract: Semiconductor devices for implementing an isolator are described. The semiconductor device can include a first chip including at least a first coil and a second coil magnetically coupled in a vertical alignment and isolated by a first insulator in the first chip. The semiconductor device can further include a second chip including at least a third coil and a fourth coil magnetically coupled in a vertical alignment and isolated by a second insulator in the second chip. The semiconductor device can include at least one bonding wire that connects the second coil in the first chip to the fourth coil in the second chip.

Abstract: A first ESD protection circuit is provided between a first high-potential side power supply and a first low-potential side power supply of a first power supply system and a second ESD protection circuit is provided between a second high-potential side power supply and a second low-potential side power supply of a second power supply system. A coupling circuit includes a bidirectional diode and couples the first and second low-potential side power supplies. A first transistor is composed of an n-channel MOS transistor, has a drain coupled to the first high-potential side power supply of the first power supply system, and has a back gate coupled to the second low-potential side power supply of the second power supply system. A resistor element is inserted in series between the drain of the first transistor and the first high-potential side power supply.

Abstract: Systems and methods for phase demodulation is described. A wireless power transmitter can include a controller, a transmission coil, and an integrated circuit connected to the controller and the transmission coil. The integrated circuit can be configured to measure a voltage of a transmission coil of a wireless power transmitter. The integrated circuit can be further configured to generate, based on the measured voltage, a pulse signal comprising a plurality of pulses. The integrated circuit can be further configured to send the pulse signal to the controller of the wireless power transmitter. The controller can be configured to perform phase demodulation using the pulse signal.

Abstract: A buck-boost power converter is operable in a first mode (step-down) or in a second mode (step-up). The power converter has an inductor, a flying capacitor, a network of six switches and a driver adapted to drive the network of switches with a sequence of states. Depending on the mode of operation the sequence of states comprises at least one of a first state and a second state. In the first state the ground port is coupled to the second port via two paths, a first path comprising the flying capacitor and the inductor, and a second path comprising the flying capacitor while bypassing the inductor. In the second state the first port is coupled to the second port via a path that includes the inductor and the ground port is coupled to the first port via a path that includes the flying capacitor while bypassing the inductor.

Abstract: A semiconductor device comprising a wiring member with which a semiconductor chip is electrically connected including: a first wiring layer having a plurality of first conductive patterns; a second wiring layer arranged next to the first wiring layer in a thickness direction of the wiring member, and having a second conductive pattern; and a third wiring layer arranged next to the second wiring layer in the thickness direction of the wiring member, and having a third conductive pattern. Here, in plan view, a first opening portion of each of two, which are arranged next to each other, of a plurality of first opening portions each penetrating through the second conductive pattern is overlapped with a pair of differential signal wirings contained in plurality of first conductive patterns, and is overlapped with two or more of a plurality of second opening portions each penetrating through the third conductive pattern.

Abstract: A pulse density modulator encodes an electrical parameter of an external element into a data stream signal. The electrical parameter has a property which causes a predetermined error in the data stream signal. The pulse density modulator includes a digital to analog converter having a sensor element connectable to the external element, and an adjuster circuit adapted to adjust an output of the digital to analog converter based on the data stream signal to correct the predetermined error in the data stream signal. A corresponding method of correcting a data stream signal of a pulse density modulator is also presented.

Abstract: In an embodiment, a semiconductor device is disclosed that includes at least one processing device and firmware including a dynamic demodulation engine. The dynamic demodulation engine, when executed by the at least one processing device, is configured to obtain a digital signal waveform, dynamically select a bit detection method based at least in part on a characteristic of the digital signal waveform, perform demodulation of the digital signal waveform using the selected bit detection method and generate decoded packets based at least in part on the demodulation.

Abstract: Systems and methods for routing communication among a plurality of devices are described. In an example, a controller can detect a communication initiated from a first device to a target device among a second device and a third device. The controller can identify the second device as the target device. The controller can, in response to identifying the second device as the target device, activate a direct communication path between the first device and the second device to allow the first device to communicate with the second device using direct communication mode. The controller can, in response to identifying the second device as the target device, activate redriver path between the first device and the third device to allow the first device to communicate with the third device using redriver mode.

Abstract: A circuit including a first circuit, a second circuit and a controller is provided, the first circuit and the second circuit each including a sample-and-hold circuit configured to hold a level of an input signal of a specific timing and an analog-to-digital converter circuit configured to convert the level of the input signal held in the sample-and-hold circuit into digital data and to output the digital data, the controller being configured to cause the first circuit to output the level of the input signal of a first timing and to cause the second circuit to output the level of the input signal of a second timing.

Abstract: A first gate electrode is formed on a semiconductor substrate via a first insulating film containing a metal element. A sidewall insulating film is formed on a side surface of the first gate electrode. A second gate electrode is formed on the semiconductor substrate via a second insulating film. The second gate electrode is formed so as to adjacent to the first gate electrode via the second insulating film. The second insulating film is made of a stacked film having a third insulating film, a fourth insulating film having a charge accumulating function, and a fifth insulating film. The third insulating film is formed on the semiconductor substrate as a result of an oxidation of a portion of the semiconductor substrate, and formed on the side surface of the first gate electrode as a result of an oxidation of the sidewall insulating film, by the thermal oxidation treatment.

Abstract: An integrated circuit, for example, a system-on-a-chip is disclosed. The integrated circuit includes a timing synchronisation unit including a hardware timer, for example, a gPTP timer. The integrated circuit also includes a non-Ethernet network interface, for example, a PCIe interface, for communicating with another integrated circuit having another hardware timer. The timing synchronisation unit is configured, in response to receiving a timing trigger from the other integrated circuit, to capture a local time t2. The timing synchronisation unit is further configured to provide the local time t2 to a processor for the processor to compute a timing offset between a remote time t1 of the other hardware timer which generated the timing trigger and the local time for time synchronisation.

Abstract: A signal processing unit for an inductive position sensor is provided. The inductive position sensor provides a first position signal and a second phase-shifted position signal, such as, a sine position signal and a cosine position signal. The signal processing unit has an integrator for integrating an integer number of periods of the first position signal respectively an integer number of periods of the second phase-shifted position signal. The position of the moving target of the position sensor is calculated from the integrated first position signal and the integrated second phase-shifted position signal.

Abstract: In an embodiment, a semiconductor device is disclosed. The semiconductor device includes a plurality of output pins. Each of the output pins is electrically connected to an input pin of a buzzer and to a buzzer driver. The buzzer driver is configured to cause the buzzer to emit an audible sound. The semiconductor device further includes a plurality of ground switches. Each ground switch is configured to connect a corresponding output pin of the plurality of output pins to ground when closed. The semiconductor device further includes a current generator that is configured to supply a test current to a given output pin of the plurality of output pins and a clamp switch that is configured to connect the given output pin to an analog-to-digital converter.

Abstract: A first amorphous film containing hafnium, oxygen and a first element such as zirconium is formed, a plurality of grains containing a second element different from any of hafnium, oxygen and the first element are formed on the first amorphous film, a second amorphous film made of the same material as the first amorphous film is formed on the plurality of grains and on the first amorphous film, and a metal film is formed on the second amorphous film. Thereafter, by performing heat treatment, the first amorphous film is crystallized to form a first orthorhombic ferroelectric film and the second amorphous film is crystallized to form a second orthorhombic ferroelectric film.

Abstract: The present document describes a control circuit for controlling a buck-boost power converter, which is configured to provide at an output node of the power converter an output current at an output voltage based on electrical power at an input voltage which is provided at an input node of the power converter. The control circuit is configured to determine an operation mode that the power converter is operated in; to determine an error voltage signal based on the output voltage, based on a reference voltage for the output voltage and based on the determined operation mode of the power converter; and to determine a control signal for controlling one or more power switches of the power converter in dependence of the error voltage signal.

Abstract: Placement of bridges connecting CAE tools and virtual ECU simulation tools is facilitated. A virtual developmental environment apparatus includes a processing execution unit and a memory for storing a MILS model including a controller block and a plant block, first setting information, a program for realizing a function in the controller block used in executing simulation of the virtual ECU, and second setting information. The processing execution unit identifies a controller block in the MILS model based on the first setting information, arranges a bridge for connecting the input port and the output port and the I/O port of the virtual ECU to the input port and the output port of the identified controller block, and connects the bridge and the I/O port of the virtual ECU based on the second setting information.

Abstract: A technique capable of improving linearity at a low illuminance is provided. A solid-state sensing image device includes: a pixel array including a plurality pixels arranged in a matrix form and a plurality of pixel signal lines connected to the plurality of pixels and receiving pixel signals supplied from the plurality pixels; a column-parallel A/D converting circuit connected to the plurality of pixel signal lines; and a reference-voltage generating circuit generating ramp-wave reference voltage that linearly changes in accordance with time passage. The column-parallel A/D converting circuit includes a first A/D converter, the first A/D converter includes: a first input terminal connected to the pixel signal line; a second input terminal receiving the reference voltage; and an offset generating circuit connected to the first input terminal and generating an offset voltage for the first input terminal.

Abstract: Apparatuses and methods for adjusting a power capability of a system is described. In an example, a system can include an antenna array and a beamformer connected to the antenna array. The beamformer can include a communication channel. The system can further include a first power converter that can be configured to convert a supply voltage to a first regulated voltage. The first power converter can apply the first regulated voltage to the beamformer. The system can further include a second power converter that can be configured to convert the supply voltage to a second regulated voltage different from the first regulated voltage. The second power converter can apply the second regulated voltage to a power amplifier in the communication channel to adjust a maximum power capability of the power amplifier.

Abstract: Systems and methods for wireless power transfer systems are described. A controller of a device can communicate with a power device by a first modulation mode. The controller can detect a failure condition between the controller and the power device. The controller can, in response to the detection of the failure condition, communicate with the power device by a second modulation mode. The first modulation mode can include capacitive modulation and the second modulation mode can include resistive modulation.