Abstract: A wireless transmission device includes an input terminal, control terminals, an amplifying circuit, a matching circuit, and an output terminal coupled to the output of the matching circuit. The amplifying circuit includes unit amplifiers and capacitive elements. Each unit amplifier includes a sub-input terminal, a sub-control terminal, and a sub-output terminal. The sub-input terminal is coupled to the input terminal, the sub-control terminal is coupled to the corresponding control terminal in the control terminals, and the sub-output terminal is coupled to the input of the matching circuit through the corresponding capacitive element in the capacitive elements in series. Each unit amplifier includes a tri-state-type class-D amplifier. The sub-output terminal of each unit amplifier is set to a low level state, a high level state, or a high impedance state based on a control signal supplied to the sub-control terminal or an input signal supplied to the sub-input terminal.

Abstract: A video encoding/decoding system includes a video encoding device, and a video decoding device. The video encoding device includes an encoding circuit for encoding an image including a diagnostic image or a normal image. The video decoding device includes a decoding circuit for decoding the image encoded in the encoding circuit, a check signal generation circuit for generating a check signal of the decoded image, a storage circuit for storing the check signal generated by the check signal generation circuit, and a comparison circuit for comparing the check signal stored in the storage circuit with the check signal generated by the check signal generation circuit. The failure is detected by comparing the check signal including an expected value stored in the storage circuit with the check signal including a comparison value generated by the check signal generation circuit by processing the same image data a plurality of times.

Abstract: A semiconductor device is provided where high-speed search operation can be performed. The semiconductor device includes a plurality of search memory cells arranged in a matrix form a plurality of search line pairs which are respectively provided corresponding to memory cell columns and which respectively transmit a plurality of search data to be compared with data stored in the search memory cells, a plurality of search drivers which are respectively arranged at corresponding to one end sides of the search line pairs and which drive the search line pairs according to the search data, and a plurality of assist circuits which are respectively provided corresponding to the other end sides of the search line pairs and which assist driving corresponding search line pairs according to the search data.

Abstract: There is provided a semiconductor integrated circuit device that can generate a unique ID with the suppression of overhead. When a unique ID is generated, the potential of a word line of a memory cell in an SRAM is raised above the power supply voltage of the SRAM, and then lowered below the power supply voltage of the SRAM. When the potential of the word line is above the power supply voltage of the SRAM, the same data is supplied to both the bit lines of the memory cell. Thereby, the memory cell in the SRAM is put into an undefined state and then changed so as to hold data according to characteristics of elements or the like configuring the memory cell. In the manufacture of the SRAM, there occur variations in characteristics of elements or the like configuring the memory cell. Accordingly, the memory cell in the SRAM holds data according to variations occurring in the manufacture.

Abstract: A control system 9 according to the present invention is mounted on a moving object. The control system 9 includes: an observing device 92 which transmits observation result data indicating an observation result of surroundings of the moving object; a first control instruction device 91 which transmits first control data indicating the control contents determined based on the observation result data; a movement control device 93 which controls movement of the moving object; and a relay device 95 which relays the first control data transmitted from the first control instruction device 91, to the movement control device 93. When a second control instruction device 94 which transmits second control data indicating the control contents determined based on the observation result data is provided to the control system 9, the relay device 95 transmits the second control data instead of the first control data, to the movement control device 93.

Abstract: A semiconductor device (1) includes a first processing unit (10-1), a second processing unit (10-2), a writing unit (12), a storage unit (14), and a processing control unit (20). The writing unit (12) writes first information related to processing of each of the first processing unit (10-1) and the second processing unit (10-2) into the storage unit (14). The processing control unit (20) controls the operations of the first processing unit (10-1) and the second processing unit (10-2). The processing control unit (20) performs control to stop the first processing unit (10-1) when an error occurs in the first processing unit (10-1). When it is determined that the second processing unit (10-2) where an error has not occurred is able to maintain execution of the first processing by using first information stored in the storage unit (14), the second processing unit (10-2) maintains execution of the first processing.

Abstract: A semiconductor device of the present invention includes: an element isolation part which is disposed between fins and whose height is lower than the height of each fin; a memory gate electrode placed over the fins and the element isolation part with a memory gate insulating film having a charge storage part in between; and a control gate electrode disposed in line with the memory gate electrode. The height of the element isolation part below the memory gate electrode is higher than the height of the element isolation part below the control gate electrode. A mismatch between electron injection and hole injection is improved, rewriting operation speed is accelerated, and reliability is enhanced by making the height of the element isolation part below the memory gate electrode higher than the height of the element isolation part below the control gate electrode as mentioned above.

Abstract: An output control unit controls a drive terminal for a BEMF detection object phase to a high-impedance state in a mask term. A BEMF detection unit detects a voltage of the drive terminal for the detection object phase when a center tap voltage is set as a reference as BEMF in a PWM on-term for remaining two phases per PWM period in the mask term and asserts a zero-crossing signal when the voltage is reduced to zero. A PWM fixing unit fixes the remaining two phases to the PWM on-terms in a first term from a predetermined timing after an amplitude level of BEMF becomes smaller than a BEMF threshold amplitude to assertion of the zero-crossing signal. The BEMF detection unit continuously detects BEMF in the first term.

Abstract: It is possible to update firmware of domain masters during travelling. An in-vehicle communication system includes a plurality of domain masters, and a redundant domain master configured to be able to perform alternative operations of the plurality of domain masters. The domain masters transmits operation information to the redundant domain master prior to update of firmware. The redundant domain master executes the alternative operation of the domain master using the received operation information. The domain master receives, after the update of the firmware, operation information generated in the alternative operation from the redundant domain master and operates in the updated firmware.

Abstract: A calculation apparatus 100 includes an encoder 101 configured to detect rising edges of PWM signals having at least three or more phases in each of the phases, and a register 103 configured to store, at a timing after the PWM signals having the respective phases rise and after AD conversion of a current value of a drive signal of a motor obtained by the PWM signals, a difference value between the AD-converted current value and a previous AD-converted current value for each phase.

Abstract: An address generation circuit generates a target address to be tested in a memory. A test data generation circuit generates write data for the address and expected value data for read data from the address. A judgment circuit compares matching/non-matching of the read data and the expected value data, for each address, judges that error correction is possible when the number of non-matching bits is within a range of numbers of bits to be error-corrected by an ECC circuit, and judges that error correction is not possible when the number is not within the range.

Abstract: In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.

Abstract: An optical waveguide formed at the same layer as that of a microscopic optical device and a spot size converter largely different in size are integrally formed. A semiconductor device has an optical waveguide part functioning as a spot size converter. The optical waveguide part includes a plurality of optical waveguide bodies penetrating through an interlayer insulation layer in the thickness direction.

Abstract: Provided herein are various systems, methods and architectures for enabling a microcontroller manufacturer to provide certain modification and configuration functionality to product vendors, while still maintaining the level of control needed to ensure that a product vendor does not inadvertently (or otherwise) create code that causes the microcontroller to not work properly. In one embodiment, this functionality can be performed through the steps of displaying a set of microcontroller properties that are available for configuration, receiving user information regarding a first value corresponding to a first microcontroller property, determining whether the user information results in a valid microcontroller configuration, and in response to determining that the user information results in a valid microcontroller configuration, generating compiled code for the microcontroller.

Abstract: A logic circuit in a system LSI (Large Scale Integrated Circuit) is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM (Static Random Access Memory) circuit of the system LSI controls a substrate bias to reduce leakage current.

Abstract: Provided is a communication system capable of transmitting an emergency notification with a short delay without waiting until the completion of a current transmission of a frame or retransmitting the frame. The communication system includes a transmission device for generating a frame compliant with the Ethernet standard and transmitting the frame to the outside of the device, and a reception device for receiving the frame. The transmission device inserts emergency notification data into the frame at predetermined data intervals. The reception device acquires the emergency notification data from the received frame at the same data intervals as the transmission device, and acquires the remaining data as data (normal data) in a header region and payload region of the frame.

Abstract: According to certain aspects, the present embodiments provide a solution for sampling and converting an analog signal at high frequencies but with low power consumption. In some embodiments, a low power, low resolution, AC coupled ADC is used to track the high frequency component of the analog input signal, in parallel with a high resolution ADC to sense the DC signal at a significantly lower sample rate. According to some aspects, the AC coupled ADC requires no reference or a low resolution reference. In these and other embodiments, a plurality of low resolution, low power ADCs having a high sampling rate may be time multiplexed together with a precision ADC at a low sampling rate.

Abstract: A semiconductor device includes a first and second semiconductor chips, a resistive component, and a semiconductor chip including a first circuit coupled to electrodes on both ends of the resistive component. A sealing body has a first long side, a second side, a third short side, and a fourth short side. In a Y-direction, each of the first and second semiconductor chips is disposed at a position closer to the first side than to the second side, while the semiconductor chip is disposed at a position closer to the second side than to the first side. Also, in the Y-direction, the resistive component, the second semiconductor chips, and the first semiconductor chips are arranged in order of increasing distance from the third side toward the fourth side, while the semiconductor chip is disposed at a position closer to the third side than to the fourth side.

Abstract: A location search method using a mobile device in multiple locations. In one embodiment of the method, the mobile device receives a first radio frequency (RF) signal transmitted by a first device while the mobile device is at a first geographical location. The mobile device receives a second RF signal transmitted by the first device while the mobile device is at a second geographical location, which is different from the first mobile device geographical location. The mobile device determines a geographical location of the first device based on the first RF signal, the second RF signal, the first mobile device geographical location, and the second mobile device geographical location.

Abstract: The improvement of the reliability of a semiconductor device having a split gate type MONOS memory is implemented. An ONO film and a second polysilicon film are sequentially formed so as to fill between a first polysilicon film and a dummy gate electrode. Then, the dummy gate electrode is removed. Then, the top surfaces of the first and second polysilicon films are polished, thereby to form a memory gate electrode formed of the second polysilicon film at the sidewall of a control gate electrode formed of the first polysilicon film via the ONO film. As a result, the memory gate electrode high in perpendicularity of the sidewall, and uniform in film thickness is formed.