Abstract: A first rectified voltage obtained by rectifying an AC voltage is input to an input detection terminal of a control circuit. A first NMOS transistor configured as a depletion-type high-voltage element, and its drain is connected to the input detection terminal, and its gate is connected to its source. An AC voltage detection circuit detects the amplitude of the AC voltage based on a current that flows through the first NMOS transistor.

Abstract: A method for pretexturing the polishing surface of a chemical mechanical polishing layer, comprising providing a chemical mechanical polishing layer having a polishing surface; providing a belt sanding machine; feeding the chemical mechanical polishing layer through a gap between a transport belt and a calibrating sanding belt of the belt sanding machine; and, wherein the polishing surface comes into contact with the calibrating sanding belt; wherein the thickness of the polishing layer is reduced.

Abstract: A semiconductor device of the present invention includes a semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode being in contact with a surface of the semiconductor layer. The semiconductor layer includes a drift layer that forms the surface of the semiconductor layer and a high-resistance layer that is formed on a surface layer portion of the drift layer and that has higher resistance than the drift layer. The high-resistance layer is formed by implanting impurity ions from the surface of the semiconductor layer and then undergoing annealing treatment at less than 1500° C.

Abstract: Disclosed is an illuminating device which has: a first illuminating lamp which is disposed at a first predetermined position and is identifiable; a second illuminating lamp which is disposed at a second predetermined position having a predetermined relationship with the first predetermined position and is identifiable; a determining means which determines the mutual relationship between the first illuminating lamp and the second illuminating lamp; and a transmitting means which transmits identifiable control signals to the first illuminating lamp and the second illuminating lamp, respectively, so as to achieve the determination made by the determining means.

Abstract: The present invention relates to a process for the production of coated mouldings, by injecting a moulding composition into an injection mould and cooling the composition to obtain a moulding, and altering the injection mould in such a way as to produce an intermediate space between a surface to be coated of the moulding and the inner surface of the injection mould, and using injection moulding to charge a reactive mixture to the resultant intermediate space, where the temperature of at least a portion of the injection mould is increased for the curing of the reactive mixture. The present invention moreover describes a system for the conduct of the process described above.

Abstract: A semiconductor device of the present invention includes a resin package, a semiconductor chip sealed in the resin package, and having first and second pads on a front surface, a lead integrated island sealed in the resin package, to one surface of which a back surface of the semiconductor chip is bonded, and the other surface of an opposite side to the one surface of which is partially exposed from a bottom surface of the resin package as a first pad connecting terminal for electrical connection between the first pad and outside and a back connecting terminal for electrical connection between the back surface of the semiconductor chip and outside separately from each other, and a lead formed separately from the lead integrated island, sealed in the resin package, one surface of which is connected with the second pad by a wire, and the other surface of an opposite side to the one surface of which is exposed from a bottom surface of the resin package as a second pad connecting terminal for electrical connectio

Abstract: A Schottky metal 9 is in Schottky-contact with a center portion of a surface of an epitaxial layer 4. A peripheral trench 13 is formed by digging from the surface of the epitaxial layer 4 on a boundary portion between an active region 21 where the Schottky metal 9 is in Schottky-contact with the surface of the epitaxial layer 4 and a peripheral region 22 outside of the active region in a surface layer portion of the epitaxial layer 4. An insulating film 14 is formed on an entire area of inner wall surfaces of the peripheral trench 13. There is provided with a conductor 15 which is connected to the Schottky metal 9 and is opposed to the entire area of the inner wall surfaces of the peripheral trench 13 via the insulating film 14 in the peripheral trench 13.

Abstract: A semiconductor device includes a semiconductor chip, a wiring on the chip, an insulating film coating the wiring and having an opening partially exposing the wiring, a Ti/W film on a portion of the wiring facing the opening, a Cu layer on the Ti/W film and the wiring's exposed portion, and having a peripheral edge protruding away from the opening more than Ti/W film's peripheral edge in parallel to an insulating film surface, and a solder ball bonded to the Cu layer. The protrusion of the Cu layer's peripheral edge with respect to the Ti/W film's peripheral edge is greater than the Ti/W film's thickness. The Ti/W film's surface doesn't vertically surpass the Cu layer's upper surface in the opening's center. A Cu layer/solder ball interface is arc-shaped on both sides of the Cu layer's upper surface in a cross section taken perpendicularly to the Cu layer's upper surface.

Abstract: A semiconductor device that includes the following is manufactured: an n? base layer; a p-type base layer formed on the surface of the n? base layer; an n+ source layer formed in the inner area of the p-type base layer; a gate electrode formed so as to face a channel region across a gate insulating film; a plurality of p-type columnar regions that are formed in the n? base layer so as to continue from the p-type base layer and that are arranged at a first pitch; and a plurality of p+ collector layers that are selectively formed on the rear surface of the n? base layer and that are arranged at a second pitch larger than the first pitch.

Abstract: The invention provides a multilayer film comprising at least two layers A1 and B: A1. a first film layer A1 formed from a composition A1 comprising at least one of the following: an hydroxyl (OH) functionalized ethylene-based polymer and/or a amine-functionalized ethylene-based polymer; and B. a second film layer B formed from a composition B comprising at least one isocyanate. The invention also provides a multilayer film comprising at least two layers A2 and B: A2. A first film layer A2 formed from a composition A2 comprising an anhydride functionalized ethylene-based polymer; and B. A second film layer B formed from a composition B comprising at least one isocyanate.

Abstract: There is provided a coating composition comprising (a) one or more binder, (b) one or more water-insoluble biocide, and (c) particles comprising polymer, wherein said particles have specific surface area of 900 m2/g or more.

Abstract: A semiconductor device of the present invention includes a resin package, a semiconductor chip sealed in the resin package, and having first and second pads on a front surface, a lead integrated island sealed in the resin package, to one surface of which a back surface of the semiconductor chip is bonded, and the other surface of an opposite side to the one surface of which is partially exposed from a bottom surface of the resin package as a first pad connecting terminal for electrical connection between the first pad and outside and a back connecting terminal for electrical connection between the back surface of the semiconductor chip and outside separately from each other, and a lead formed separately from the lead integrated island, sealed in the resin package, one surface of which is connected with the second pad by a wire, and the other surface of an opposite side to the one surface of which is exposed from a bottom surface of the resin package as a second pad connecting terminal for electrical connectio

Abstract: The present invention is directed to a chip diode with a Zener voltage Vz of 4.0 V to 5.5 V, including a semiconductor substrate having a resistivity of 3 m?·cm to 5 m?·cm and a diffusion layer formed on a surface of the semiconductor substrate and defining a diode junction region with the semiconductor substrate therebetween, in which the diffusion layer has a depth of 0.01 ?m to 0.2 ?m from the surface of the semiconductor substrate.

Abstract: A driving device comprises a first transistor (B13), a second transistor (B14), and a resistance element. The first transistor (B13) has one terminal receiving a pulsed current and a control terminal connected to the one terminal. The second transistor (B14) has one terminal connected to at least one load, the other terminal connected to a reference potential together with the other terminal of the first transistor (B13), and a control terminal connected to the control terminal of the first transistor (B13). The resistance element is connected between the control terminal of the first transistor (B13) and the other terminal of the first transistor (B13).

Abstract: A method of chemical mechanical polishing a substrate is provided, including: providing a substrate; providing a chemical mechanical polishing pad, comprising: a polishing layer having a composition and a polishing surface, wherein the composition of polishing layer is selected to exhibit an initial hydrolytic stability; coupled with a sustained hydrolytic instability; a rigid layer having a top surface and a bottom surface; a hot melt adhesive interposed between the base surface of the polishing layer and the top surface of the rigid layer; wherein the hot melt adhesive bonds the polishing layer to the rigid layer; a pressure sensitive platen adhesive layer having a stack side and a platen side; wherein the stack side of the pressure sensitive platen adhesive layer is adjacent to the bottom surface of the rigid layer; and, creating dynamic contact between the polishing surface and substrate to polish a surface of the substrate.

Abstract: A ZT comparator is configured to compare a voltage VZT at a ZT terminal with a predetermined threshold voltage VTH—BOTTOM, and to generate a bottom detection signal. A bottom count controller is configured to determine a count setting value based on an ON/OFF time which is a period of time from the time point at which a pulse signal SPWM transits to an on level that corresponds to the on state of a switching transistor up to the time point at which a bottom detection signal is first asserted, and based on the input voltage level of the DC/DC converter. Furthermore, the bottom count controller is configured to assert a set signal SSET every time the number of times the bottom detection signal is asserted reaches the count setting value.

Abstract: A first resistive film is arranged such that one edge thereof is connected to a first terminal, and an edge that is opposite to the aforementioned edge is connected to a second terminal. A second resistive film is arranged with a gap between it and the first resistive film such that one edge thereof is connected to a third terminal. A voltage generating unit applies a predetermined first bias voltage and a predetermined second bias voltage to the first terminal and the second terminal, respectively. A voltage detection unit detects a panel voltage that occurs at the third terminal. A current detection unit detects a panel current that flows through a path including the first terminal, the first resistive film, and the second terminal. A computation unit determines the coordinates touched by the user, based upon the values of the panel voltage and the panel current.

Abstract: The invention provides a process for removing a film from a substrate, said process comprising applying a composition to the film, and wherein the composition comprises at least the following: a) water; and b) at least one compound selected from the following compounds (i-v): i) NR4HF2 (Formula 1), wherein R?H, alkyl, substituted alkyl, ii) NR4F (Formula 2), wherein R?H, alkyl, substituted alkyl, iii) HF (hydrofluoric acid), iv) H2SiF6 (hexafluorosilicic acid), or v) combinations thereof. The invention also provides a composition comprising at least the following: a) water; and b) at least one compound selected from the following compounds (i-v): i) NR4HF2 (Formula 1), wherein R?H, alkyl, substituted alkyl, ii) NR4F (Formula 2), wherein R?H, alkyl, substituted alkyl, iii) HF (hydrofluoric acid), iv) H2SiF6 (hexafluorosilicic acid), or v) combinations thereof.

Abstract: A composition including a core-shell polymeric particle, the core including, when dry, at least one void and the shell including, as polymerized units, from 18% to 50%, by weight based on the weight of the shell, monomer selected from the group consisting of acrylonitrile, methacrylonitrile, acrylamide, methacrylamide, and mixtures thereof is provided. Also provided is a composition including an organic medium and a core-shell polymeric particle, the core including, when dry, at least one void and the shell having a calculated shell-organic medium interaction parameter, XPS>1.15 and a method for providing opacity to a dry composition.

Abstract: An LED lamp includes a plurality of LED modules arranged in direction x, a tubular enclosure for housing the LED modules that is open at ends spaced from each other in direction x, and end caps respectively closing the ends of the tubular enclosure in direction x. Each of the end caps is configured to diffuse light from the LED modules while transmitting the light, and includes an emission surface for emitting light in a direction z perpendicular to direction x. This arrangement ensures that the LED lamp has a good appearance even when it is made long.