Abstract: The inspection of semiconductors or like substrates by the present mechanism minimizes deflection in the checkplate and probe card. An inspection device including a housing, a toggle assembly within the housing, an objective lens assembly attached within the toggle assembly including an objective coupled within an objective focus, wherein the objective focus is deflectable along an optics axis, and a cam assembly including a rotary cam and a window carrier, wherein the window carrier is moveable along the optics axis with rotation of the rotary cam, wherein the cam assembly is coupled to the toggle assembly with the objective and window are aligned along the optics axis.

Abstract: An automated defect inspection system has been invented and is used on patterned wafers, whole wafers, broken wafers, partial wafers, sawn wafers such as on film frames, JEDEC trays, Auer boats, die in gel or waffle packs, MCMs, etc., and is specifically intended and designed for second optical wafer inspection for such defects as metalization defects (such as scratches, voids, corrosion, and bridging), diffusion defects, passivation layer defects, scribing defects, glassivation defects, chips and cracks from sawing, solder bump defects, and bond pad area defects.

Abstract: Methods of monitoring critical dimensions in a semiconductor fabrication process include capturing at least one image of a first structure that has an effect on the polarization state of light reflected therefrom. For at least some of the first structure images, a value is calculated indicative of intensity of light reflected from the first structure. A critical dimension of the first structure is obtained and correlated with the calculated value. At least one image of a subsequent structure is captured. A determination is made, based at least in part on the calculated value, of a critical dimension of the subsequent structure.

Abstract: A system for monitoring thin-film fabrication processes is herein disclosed. Diffraction of incident light is measured and the results are compared to a predictive model based on at least one idealized or nominal structure. The model and/or the measurement of diffracted incident light may be modified using the output of one or more additional metrology systems.

Abstract: A wafer holding mechanism for holding a wafer of the type used in the manufacture of semiconductor devices is herein described. The mechanism has a first plate having a number of offsets that define at least one lip that extends radially inward of the offsets. A second plate is positioned adjacent the first plate and generally between the first plate and the lip such that one or more fingers coupled to the second plate oppose the lip that depends from the first plate. When the second plate is moved to a closed position, the at least one lip and the one or more fingers cooperatively grasp an edge of a wafer therebetween. The wafer holding mechanism is coupled to a drive that rotates the wafer before an imaging mechanism for capturing images of the wafer as it rotates.

Abstract: A film frame aligner for automatically aligning a film frame includes a film frame support, a film frame pusher for pushing the film frame, and a film frame location mechanism for locating at least one notch in the film frame.

Abstract: A system and method allow accurate calculation of probe float through optical free-hanging and electrical planarity measurement techniques. In accordance with an examplary embodiment, probe float may be determined by acquiring a free-hanging planarity measurement, obtaining a first electrical contact planarity measurement, and calculating probe float using results of the acquiring and the obtaining operations.

Abstract: Methods and apparatus for placing wafers axially in an optical inspection system. A “best worst” focus method includes a series of through-focus images of a test wafer acquired using full field of view of the inspection optics. The value of the worst quality in each image is associated with the respective axial location, forming a locus of “worst” values as a function of axial location. The axial location is chosen which optimizes the locus, giving an axial location that provides the “best-worst” image quality. A “video focus” method includes a series of through-focus images generated using reduced field of view. A figure of merit is associated with each image, providing through-focus information. The “video focus” can be calibrated against the “best worst” focus. Further, a point sensor can be used to generate a single z-value for one (x,y) location that can be calibrated with “video focus”.

Abstract: Wafer edge inspection approaches are disclosed wherein an imaging device captures at least one image of an edge of a wafer. The at least one image can be analyzed in order to identify an edge bead removal line. An illumination system having a diffuser can further be used in capturing images.

Abstract: A reflective objective is disclosed, in which essentially all the optical power is in a single, off-axis, concave mirror, which is oriented generally perpendicular to the central axis of the objective. An incident beam is directed to and from the concave mirror by a pair of flat mirrors, so that a central on-axis ray in the incident beam is collinear with the corresponding thrice-reflected ray at the object. The object is one focal length away from the concave mirror. The aperture stop is also one focal length away from the concave mirror, leading to a condition of telecentricity at the object. Different focal lengths for the objectives are realized by using mirrors with different curvatures, located at different distances away from the central axis of the objective. The reflective objective can optionally be retrofitted into a turret typically used for microscope objectives, and can optionally have refractive elements, making the objective catadioptric.

Abstract: A system and method of mitigating the effects of component deflections in a probe card analyzer system may implement three-dimensional comparative optical metrology techniques to model deflection characteristics. An exemplary system and method combine non-bussed electrical planarity measurements with fast optical planarity measurements to produce “effectively loaded” planarity measurements.

Abstract: A system and method for defect analysis of multi-level memory cell devices and embedded multi-level memory in system-on-chip integrated circuits are disclosed wherein a defect data set is input into the system. When a defect data set is received, an automated test engineering system running a memory test program analyzes the defect data set to generate one or more fail bit locations and one or more fail states of the memory. The multi-level memory defect analysis system and method then classify failed bits or patterns comprising a vertical fail pattern, whereby after being classified, each memory cell failure vertical fail pattern has three data attributes comprising fail type, a number of fail bits/states, and a sequence of the fail states. The vertical fail pattern may comprise a single fail state or multi-state fail. The multi-state fail may be a continuous-states fail, discontinuous-states fail, or all-state fail.

Abstract: A system and method for evaluating wafer test probe cards under real-world wafer test cell condition integrates wafer test cell components into the probe card inspection and analysis process. Disclosed embodiments may utilize existing and/or modified wafer test cell components such as, a head plate, a test head, a signal delivery system, and a manipulator to emulate wafer test cell dynamics during the probe card inspection and analysis process.

Abstract: Some aspects of the present invention relate to a wafer inspection method. A plurality of images is acquired about an edge portion of a wafer. Each of the images comprises a pixel array having a first dimension and a second dimension. A composite image of compressed pixel arrays is generated by compressing each of the pixel arrays in the first dimension and concatenating the pixel arrays. The composite image is analyzed to identify a wafer feature, for example using a sinusoidal line fit.

Abstract: A method includes selecting one of performing ellipsometry or performing optical stress generation and detection. The method also includes, in response to selecting performing ellipsometry, applying at least one first control signal to a controllable retarder that modifies at least polarization of a light beam, and performing ellipsometry using the modified light beam. The method further includes, in response to selecting performing optical stress generation and detection, applying at least one second control signal to the controllable retarder, and performing optical stress generation and detection using the modified light beam. Apparatus and computer readable media are also disclosed.

Abstract: Systems and method for monitoring semiconductor wafer fabrication processing, for example based upon EBR line inspection, including capturing at least one image of a wafer at an intermediate stage of fabrication. The captured image(s) are compressed to generate a composite representation of at least an edge zone of the wafer. An edge bead removal area is identified in the representation, and at least one feature attribute is extracted from the identified area. The extracted feature attribute is automatically assessed, and information relating to a status of the fabrication processing in generated based upon the assessment. For example, recommended modifications to the fabrication processing, either upstream or downstream of the current stage of fabrication (or both) can be generated and implemented.

Abstract: An apparatus for electrically testing a semiconductor device is herein disclosed. The apparatus includes carriers for a semiconductor device and a probe card (52) that are adapted for complementary registration with one another. The coupled carriers may be stacked or used in another high-density arrangement during electrical test or burn-in to improve test cell utilization.

Abstract: Some aspects of the present invention relate to a wafer inspection method. A plurality of images is acquired about an edge portion of a wafer. Each of the images comprises a pixel array having a first dimension and a second dimension. A composite image of compressed pixel arrays is generated by compressing each of the pixel arrays in the first dimension and concatenating the pixel arrays. The composite image is analyzed to identify a wafer feature, for example using a sinusoidal line fit.

Abstract: A system and method allow accurate calculation of probe float through optical free-hanging and electrical planarity measurement techniques. In accordance with an examplary embodiment, probe float may be determined by acquiring a free-hanging planarity measurement, obtaining a first electrical contact planarity measurement, and calculating probe float using results of the acquiring and the obtaining operations.

Abstract: A system and method for yield management is disclosed wherein a data set containing one or more prediction variable values and one or more response values is input into the system. The system can pre-process the input data set to remove prediction variables with missing values and data sets with missing values. The pre-processed data can then be used to generate a model that may be a decision tree. The system can accept user input to modify the generated model. Once the model is complete, one or more statistical analysis tools can be used to analyze the data and generate a list of the key yield factors for the particular data set.