Patents Assigned to SanDisk Technologies Inc.
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Patent number: 12175751Abstract: Systems, methods, and data storage devices using a video group classifier based on an object tracker are described. A group classifier may be trained using machine learning to classify image objects from a video frame and assign a classifier identifier. An object tracker and the group classifier may be used to determine correspondence between tracker identifiers and classifier identifiers for assigning group identifiers. The object tracker may then be used to determine image objects, assign tracker identifiers, and track the movement of those image objects through a video data stream to associate tracker identifiers with the video frames. The tracker identifier may be used to assign a group identifier to each video frame based the correspondence between the tracker identifier and the classifier identifier.Type: GrantFiled: April 26, 2022Date of Patent: December 24, 2024Assignee: Sandisk Technologies, Inc.Inventors: Shaomin Xiong, Toshiki Hirano
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Patent number: 12175125Abstract: Aspects of the present disclosure generally relate to data storage devices, systems, and related methods that group commands of doorbell transactions from host devices into a plurality of groupings. A controller of a data storage device is configured to receive a plurality of submission doorbell transactions comprising a plurality of commands from a host device. The controller is configured to group the plurality of commands of the plurality of submission doorbell transactions into a plurality of groupings having a grouping order. Each grouping of the plurality of groupings corresponds to a single doorbell transaction of the plurality of submission doorbell transactions. The controller is configured to send one or more completion doorbell transactions to the host device. Each completion doorbell transaction of the one or more completion doorbell transactions identifies a completed grouping of the plurality of groupings.Type: GrantFiled: October 20, 2021Date of Patent: December 24, 2024Assignee: Sandisk Technologies, Inc.Inventors: Shay Benisty, Judah Gamliel Hahn, Ariel Navon
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Patent number: 12165735Abstract: The present disclosure generally relates to optimizing memory storage performance and power usage. Read operations from flash memory are comprised of a sense operation and a read transfer operation. Usually, these two operations are performed in parallel to achieve high read performance. However, these two operations typically do not take the same amount of time, leading to inefficiencies. By measuring sense busy time, the read transfer clock may be set accordingly so the two operations are equal in time. In so doing, the system will be optimized from both a performance and power consumption point of view.Type: GrantFiled: September 29, 2022Date of Patent: December 10, 2024Assignee: Sandisk Technologies, Inc.Inventor: Refael Ben-Rubi
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Patent number: 12164782Abstract: Aspects of a storage device including a memory and a controller are provided. The memory includes a plurality of non-volatile memory packages coupled to the switch, with each non-volatile memory package including a plurality of non-volatile memory dies. The controller monitors a wear level of each non-volatile memory package in the plurality of non-volatile memory packages connected to the controller via the switch. The controller determines whether a wear level of a first non-volatile memory package of the plurality of non-volatile memory packages exceeds a wear level threshold. The controller also can transfer data from the first non-volatile memory package to a second non-volatile memory package of the plurality of non-volatile memory packages through the switch based on the wear level of the first non-volatile memory package exceeding the wear level threshold. Thus, the controller may facilitate a persistent switch-based storage controller, thereby improving memory capacity of the storage device.Type: GrantFiled: May 5, 2022Date of Patent: December 10, 2024Assignee: Sandisk Technologies, Inc.Inventors: Ramanathan Muthiah, Akhilesh Yadav
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Patent number: 12164775Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a read command to read data from the memory device or a write command to write data to the memory device from a host device, determine whether a bottleneck exists in a data/control path between the host device and the memory device, wherein the bottleneck exists in a hardware module of the plurality of hardware modules, and execute a bottleneck release operation when the bottleneck exists in the data/control path between the host device and the memory device, wherein the bottleneck release operation is dependent on whether the bottleneck exists in the input queue. The bottleneck release operation includes changing a clock of the hardware module, moving the command to a different hardware module configured to process the command, and combinations thereof.Type: GrantFiled: October 3, 2022Date of Patent: December 10, 2024Assignee: Sandisk Technologies, Inc.Inventor: Refael Ben-Rubi
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Patent number: 12164807Abstract: Systems and methods are disclosed for providing speculative command processing. In certain embodiments, a data storage device includes a non-volatile memory, a buffer, and a controller configured to: receive one or more actual requests for data from one or more hosts, wherein an actual request is associated with data confirmed to be required by an application on a host; receive one or more speculative requests for data from the one or more hosts, wherein a speculative request is associated with data that has not been confirmed to be required by an application on a host; process the one or more actual requests prior to the one or more speculative requests; and in response to determining that resources are available after processing the one or more actual requests, perform preprocessing for the one or more speculative requests.Type: GrantFiled: April 11, 2022Date of Patent: December 10, 2024Assignee: Sandisk Technologies, Inc.Inventor: Ramanathan Muthiah
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Patent number: 12166505Abstract: A data storage device with partial speed changes to improve in-order data transfer. Rather than determining an ECC decoder on a first available decoder basis, the ECC decoder may be based on the ECC decoder level. A memory device will have at least one FMU that has a syndrome weight (SW). The disclosure proposes assigning FMU's based on the SW rate. At the time the command is read, the data storage device determines which level of decoder will be assigned to the FMU. The determination will then be checked according to different system environment parameters to maintain performance or reduce power consumption. The arrangement allows a more flexible system design that can adapt according to the current system status.Type: GrantFiled: October 25, 2023Date of Patent: December 10, 2024Assignee: Sandisk Technologies, Inc.Inventors: Shay Benisty, Ariel Navon, Alexander Bazarsky, David Avraham
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Patent number: 12154860Abstract: A method of forming a semiconductor device includes forming vertical contact fingers in a substrate having side portions that are flexible. Contact fingers are formed near one or more edges of the flexible side portions of the substrate. After semiconductor dies are mounted to and electrically coupled to the substrate, the semiconductor device may be encapsulated by placing the device in a mold chase including upper and lower mold plates. The lower mold plate is sized smaller than the substrate so that the flexible side portions of the substrate including the contact fingers fold vertically upward to fit within the mold.Type: GrantFiled: June 16, 2021Date of Patent: November 26, 2024Assignee: Sandisk Technologies, Inc.Inventors: Zhongli Ji, Ning Ye, Chin-Tien Chiu, Fen Yu
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Patent number: 12153831Abstract: Disclosed are systems and methods for accelerating commands from accelerators in data storage devices using accelerator queues. A data storage device includes accelerator interfaces, each accelerator interface couples a controller to a respective accelerator. The device also includes a device memory comprising one or more memories and one or more sets of queues. Each set of queues corresponds to a respective memory, at least one queue is configured to queue one or more tasks associated with an accelerator, and each queue is associated with a respective priority level of a plurality of priority levels. A controller is configured to: receive an accelerator command, identify a first memory corresponding to a task for the accelerator command; and enqueue the task to a first queue corresponding to the first memory, the first queue configured to queue one or more tasks associated with the first accelerator corresponding to the first accelerator interface.Type: GrantFiled: September 9, 2022Date of Patent: November 26, 2024Assignee: Sandisk Technologies, Inc.Inventor: Ramanathan Muthiah
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Patent number: 12153804Abstract: Some areas (e.g., boundary wordlines) in a block of memory can be more error prone than others. Typically, errors in these areas are not detected until after the entire block is programmed. Handling such errors then can result in performance penalties and large data relocations. With the embodiments presented herein, a two-stage programming operation is provided. In the first stage, only the error-prone areas of the block are programmed, and a check is made to determine if an error occurred in that programming. In the second stage, the remaining portions of the block are programmed, but that only occurs after it is determined that the error-prone areas have been programmed successfully. Detecting and dealing with errors in the error-prone areas before the entire block is programmed avoid the performance penalties and large data relocations noted above.Type: GrantFiled: July 21, 2023Date of Patent: November 26, 2024Assignee: Sandisk Technologies, Inc.Inventors: Nitin Jain, Maharudra Nagnath Swami
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Publication number: 20240387295Abstract: To provide more test data during the manufacture of non-volatile memories and other integrated circuits, machine learning is used to generate virtual test values. Virtual test results are interpolated for one set of tests for devices on which the test is not performed based on correlations with other sets of tests.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Applicant: Sandisk Technologies, Inc.Inventors: Tsuyoshi Sendoda, Yusuke Ikawa, Nagarjuna Asam, Yoshihiro Suzumura, Kei Samura, Masaaki Higashitani
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Patent number: 12147704Abstract: A data storage device having a flash translation layer configured to handle file-system defragmentation in a manner that avoids, reduces, and/or optimizes physical data movement in flash memory. In an example embodiment, the memory controller maintains in a volatile memory thereof a lookaside table that supplants pertinent portions of the logical-to-physical table. Entries of the lookaside table are configured to track source and destination addresses of the host defragmentation requests and are logically linked to the corresponding entries of the logical-to-physical table such that end-to-end data protection including the use of logical-address tags to the user data can be supported by logical means and without physical data rearrangement in the flash memory. In some embodiments, physical data rearrangement corresponding to the file-system defragmentation is performed in the flash memory in response to certain trigger events, which can improve the input/output performance of the data-storage device.Type: GrantFiled: July 15, 2022Date of Patent: November 19, 2024Assignee: Sandisk Technologies, Inc.Inventors: Judah Gamliel Hahn, Ramanathan Muthiah, Bala Siva Kumar Narala, Narendhiran Chinnaanangur Ravimohan
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Patent number: 12148245Abstract: Systems, methods, and data storage devices for image grouping in an end user device using trained machine learning group classifiers are described. The end user device may include an image group classifier configured to classify new image data objects using an image classification algorithm and set of machine learning parameters previously trained for a specific image group. The end user device may determine embeddings that quantify features of the target image object and use those embeddings and the image group classifier to selectively associate group identifiers with each new image data object received or generated by the end user device. Calibration, including selection and training, of the image group classifiers and ranking of classified images are also described.Type: GrantFiled: December 21, 2021Date of Patent: November 19, 2024Assignee: Sandisk Technologies, Inc.Inventors: Shaomin Xiong, Toshiki Hirano
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Patent number: 12141123Abstract: System and method of verifying validity of a metadata modification request to prevent improper metadata operations. During initialization of a volume in a storage device and once a metadata area is reserved for a metadata structure, information characterizing the metadata structure and metadata area is stored in the storage device, which may be in the form of an area legend composed of descriptors such as a magic signature, a node size, a clump size of reservation, and extent of the metadata area. Responsive to a request for operating on metadata, relevant information provided in the request is verified against the stored characteristic information. If the verification discovers an inconsistency between the information provided in the request and the stored characteristic information, the request modification is treated as invalid and blocked from operation.Type: GrantFiled: May 13, 2022Date of Patent: November 12, 2024Assignee: Sandisk Technologies, Inc.Inventors: Viacheslav Dubeyko, Adam Manzanares
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Patent number: 12144185Abstract: A method includes forming a first electrode layer over a substrate, forming an ovonic threshold switch (OTS) material layer over the first electrode layer, microwave annealing the OTS material layer, and forming a second electrode layer over the OTS material layer.Type: GrantFiled: February 2, 2022Date of Patent: November 12, 2024Assignees: Sandisk Technologies, Inc., POHANG UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Oleksandr Mosendz, Hyunsang Hwang, Jangseop Lee, Raghuveer S. Makala
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Patent number: 12142402Abstract: A data storage device includes a substrate including a number of contact pads and a number of passive component packages coupled to the contact pads. The data storage device further includes a memory controller coupled to the substrate, and one or more NAND die stacks coupled to the substrate and in electrical communication with the memory controller. One or more of the passive component packages include a first passive component, a second passive component electrically connected to the first passive component, and a first terminal coupled to the first passive component. The passive component packages further include a second terminal coupled to the second passive component, and a third terminal coupled to a common node of the first passive component and the second passive component.Type: GrantFiled: June 10, 2021Date of Patent: November 12, 2024Assignee: Sandisk Technologies, Inc.Inventors: Ai-Wen Wang, Wei-Chun Shen, Yu-Mei Chen, Guiyang Jiang
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Publication number: 20240369628Abstract: The present disclosure generally relates to an embedded physical layer (EPHY) for a field programmable gate array (FPGA). The EPHY for the FPGA is for a testing device that can receive and transmit in both the high speed PHYs, as well as low speed PHYs, such as MIPI PHYS (MPHYs), to meet universal flash storage (UFS) specifications. The testing device with the EPHY for the FPGA provides flexibility to support any specification updates without the need of application specific (ASIC) production cycles.Type: ApplicationFiled: July 16, 2024Publication date: November 7, 2024Applicant: Sandisk Technologies, Inc.Inventors: Doron GANON, Eitan LERNER
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Publication number: 20240370178Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller and a media unit. The capacity of the media unit is divided into a plurality of zones. The controller is configured to make informed use of errors by update zone metadata to indicate one or more first logical block addresses were skipped and to indicate the next valid logical block address is available to store data. The controller is further configured to update zone metadata to recommend to the host device to reset one or more full zones, to recommend to the host device to transition one or more open zones to a full state, to alert the host device that one or more open zones have been transitioned to the full state, and to notify the host device of the writeable zone capacity of each of the plurality of zones.Type: ApplicationFiled: July 18, 2024Publication date: November 7, 2024Applicant: Sandisk Technologies, Inc.Inventors: Matias BJORLING, Horst-Christoph Georg HELLWIG, David LANDSMAN, Daniel L. HELMICK, Liam PARKER, Alan D. BENNETT, Peter GRAYSON, Judah Gamliel HAHN
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Publication number: 20240370195Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device comprises a controller comprising first random access memory (RAM1), second random access memory (RAM2), and a storage unit divided into a plurality of streams. When a write command is received to write data to a stream, change log data is generated and stored in the RAM1, the previous delta data for the stream is copied from the RAM2 to the RAM1 to be updated with the change log data, and the updated delta data is copied to the RAM2. The delta data stored in the RAM2 is copied to the storage unit periodically. The controller tracks which delta data has been copied to the RAM2 and to the storage unit. During a power failure, the delta data and the change log data are copied from the RAM1 or the RAM2 to the storage unit.Type: ApplicationFiled: July 18, 2024Publication date: November 7, 2024Applicant: Sandisk Technologies, Inc.Inventors: Daniel L. HELMICK, Peter GRAYSON
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Patent number: 12137164Abstract: Techniques for storage-free message authentication for error-correcting-codes are disclosed. A storage controller of a storage device receives a request to encode a message in a format having an error-correcting code schema that generates a parity code. A key generator generates a pseudorandom transposition of the message and the parity code as a first part of a secret key. A pseudorandom character string is determined as a second part of the secret key. The output of the pseudorandom transposition and the pseudorandom character string are combined to generate the encoded message which is returned in response to the request. The secret key associated with the message is stored in non-volatile memory.Type: GrantFiled: August 10, 2023Date of Patent: November 5, 2024Assignee: Sandisk Technologies, Inc.Inventors: Dongwoo Kim, Cyril Guyot