Patents Assigned to Semtech Corporation
  • Patent number: 9899285
    Abstract: A semiconductor device has a plurality of first semiconductor die. A plurality of first bumps is formed over the first semiconductor die. A first protection layer is formed over the first bumps. A portion of the first semiconductor die is removed in a backgrinding operation. A backside protection layer is formed over the first semiconductor die. An encapsulant is deposited over the first semiconductor die and first bumps. A portion of the encapsulant is removed to expose the first bumps. A conductive layer is formed over the first bumps and encapsulant. An insulating layer and plurality of second bumps are formed over the conductive layer. A plurality of conductive vias is formed through the encapsulant. A plurality of the semiconductor devices is stacked with the conductive vias electrically connecting the stacked semiconductor devices. A second semiconductor die having a through silicon via is disposed over the first semiconductor die.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: February 20, 2018
    Assignee: Semtech Corporation
    Inventors: Kok Khoon Ho, Satyamoorthi Chinnusamy
  • Patent number: 9897770
    Abstract: A novel, hybrid optical fiber stub device comprises a first ferrule transparent to UV light and a second ferrule including a conventional material. An optical fiber is disposed through the first ferrule and second ferrule. The input and output faces of the optical fiber are prepared suitable for optical coupling. A photonic device is coupled to the first optical fiber surface. A UV curable epoxy is disposed between the photonic device and the first optical fiber surface. The UV curable epoxy includes an index of refraction between an index of refraction of the first optical fiber and an index of refraction of the photonic device. A second optical fiber is coupled to the first optical fiber.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: February 20, 2018
    Assignee: Semtech Corporation
    Inventors: Christopher A. Park, Nayla El Dahdah
  • Publication number: 20180047688
    Abstract: A semiconductor device includes a semiconductor wafer. A plurality of pillar bumps is formed over the semiconductor wafer. A solder is deposited over the pillar bumps. The semiconductor wafer is singulated into a plurality of semiconductor die after forming the pillar bumps while the semiconductor wafer is on a carrier. An encapsulant is deposited around the semiconductor die and pillar bumps while the semiconductor die remains on the carrier. The encapsulant covers an active surface of the semiconductor die between the pillar bumps.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 15, 2018
    Applicant: Semtech Corporation
    Inventors: Kok Khoon Ho, Jonathan Clark, John MacLeod
  • Patent number: 9875988
    Abstract: A semiconductor device has a first semiconductor die disposed over a substrate. A plurality of composite interconnect structures are formed over the semiconductor die. The composite interconnect structures have a non-fusible conductive pillar and a fusible layer formed over the non-fusible conductive pillar. The fusible layer is reflowed to connect the first semiconductor die to a conductive layer of the substrate. The non-fusible conductive pillar does not melt during reflow eliminating a need to form a solder resist over the substrate. An encapsulant is deposited around the first semiconductor die and composite interconnect structures. The encapsulant flows between the active surface of the first semiconductor die and the substrate. A second semiconductor die is disposed over the substrate adjacent to the first semiconductor die. A heat spreader is disposed over the first semiconductor die. A portion of the encapsulant is removed to expose the heat spreader.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 23, 2018
    Assignee: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Andrew Pan, Kok Khoon Ho
  • Publication number: 20180019194
    Abstract: A semiconductor device has an interposer and a surface mount technology (SMT) component disposed on the interposer. The interposer is disposed on an active surface of a semiconductor die. The semiconductor die is disposed on a substrate. A first wire bond connection is formed between the interposer and semiconductor die. A second wire bond connection is formed between the interposer and substrate. A third wire bond connection is formed between the substrate and semiconductor die. An encapsulant is deposited over the substrate, semiconductor die, interposer, and SMT component. In one embodiment, the substrate is a quad flat non-leaded substrate. In another embodiment, the substrate is a land-grid array substrate, ball-grid array substrate, or leadframe.
    Type: Application
    Filed: July 12, 2017
    Publication date: January 18, 2018
    Applicant: Semtech Corporation
    Inventor: Jean-Marc Papillon
  • Patent number: 9864464
    Abstract: A proximity sensor has a sensing node. A radio frequency signal is received at the sensing node. The radio frequency signal is coupled to an intermediate node through a first capacitor. The radio frequency signal is coupled from the intermediate node to a ground node through a second capacitor. An RF amplifier is coupled to the sensing node. The radio frequency signal is generated using the RF amplifier. A third capacitor is coupled between the RF amplifier and the sensing node. An antenna is coupled to the sensing node. The radio frequency signal is transmitted using the antenna. A capacitance of the antenna is measured using the proximity sensor. The capacitance of the antenna is compared to a threshold to determine proximity of a conductive object. An inductor is coupled between the sensing node and the antenna. A shielding area is coupled to the intermediate node.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: January 9, 2018
    Assignee: Semtech Corporation
    Inventors: Chaouki Rouaissia, Eric Vandel
  • Patent number: 9837375
    Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: December 5, 2017
    Assignee: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
  • Patent number: 9800288
    Abstract: A wireless communication method in a network comprising one or several beacons and a plurality of end-points, comprising: sending by a beacon a timing message modulated according to a chirp spread spectrum format, receiving said timing message in one or several end-nodes a receiver, detecting said timing message aligning a local frequency reference and/or time reference of the end-node to the time reference of the transmitter by means of said timing message.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: October 24, 2017
    Assignee: Semtech Corporation
    Inventors: Olivier Bernard Andre Seller, Nicolas Sornin
  • Patent number: 9794748
    Abstract: A proximity sensor for detecting proximity of a body portion in a first region while avoiding unwanted detection of a body portion in a second region, based on the capacities seen by a plurality of electrodes. An application of the inventive detector to a mobile phone, whereby the display is switched off, or various energy saving measure are taken, when the proximity sensor determines directional proximity with a body part, indicating that the user has brought the phone to the ear for placing a call.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: October 17, 2017
    Assignee: Semtech Corporation
    Inventors: Chaouki Rouaissia, Sebastien Grisot
  • Patent number: 9794095
    Abstract: A gateway device having a baseband processor for processing a plurality signals carrying a digital information modulated in the form of chirp signal, the chirp signals being either base chirps, for which the frequency changes from an initial instant to a final instant according to a predetermined base chirp function or modulated chirps, whose instantaneous frequencies vary according to one of a plurality of a functions that differ from said base chirp function, characterized in that the gateway device is arranged for simultaneously demodulating a plurality of signals having received at a same frequency and exhibiting different bitrates.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 17, 2017
    Assignee: Semtech Corporation
    Inventors: Nicolas Sornin, Ludovic Champion
  • Patent number: 9766751
    Abstract: A readout system for capacitive touch panel, particularly for single-ended capacity sensing matrixes, capable of internally calibrate and equalize the response of its capacity-to-digital converters (CDC). The readout system includes reference lines for interconnecting together different sub-circuits, and measuring the response of CDC in different circuits on common reference capacitors.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: September 19, 2017
    Assignee: Semtech Corporation
    Inventors: Olivier Nys, Pascal Monney
  • Publication number: 20170250172
    Abstract: A semiconductor device has a first semiconductor die including a first protection circuit. A second semiconductor die including a second protection circuit is disposed over the first semiconductor die. A portion of the first semiconductor die and second semiconductor die is removed to reduce die thickness. An interconnect structure is formed to commonly connect the first protection circuit and second protection circuit. A transient condition incident to the interconnect structure is collectively discharged through the first protection circuit and second protection circuit. Any number of semiconductor die with protection circuits can be stacked and interconnected via the interconnect structure to increase the ESD current discharge capability. The die stacking can be achieved by disposing a first semiconductor wafer over a second semiconductor wafer and then singulating the wafers. Alternatively, die-to-wafer or die-to-die assembly is used.
    Type: Application
    Filed: February 13, 2017
    Publication date: August 31, 2017
    Applicant: Semtech Corporation
    Inventors: Changjun Huang, Jonathan Clark
  • Publication number: 20170250158
    Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.
    Type: Application
    Filed: February 26, 2016
    Publication date: August 31, 2017
    Applicant: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Kevin Simpson, Mark C. Costello
  • Patent number: 9749012
    Abstract: A method and a device are disclosed including a PLC node having a synchronizer, a modem with a transceiver, and a computing device coupled with a power line for power line data communications. In various embodiments, a coordinator or Data Concentrator Unit (DCU) coordinates the communication of PLC nodes. The PLC nodes are configured to detect a zero crossing of the power line wave form and transmit or receive data within time slots defined with respect to the detected zero crossing. In other embodiments, the time slots may be synchronized using a frame sync signal, an external signal, or polling. In various embodiments, the time slots may be random access or assigned. In some embodiments, the modem and/or node may be placed in a sleep mode when not communicating to reduce power consumption and be awaken when an allocated time slot is approaching.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 29, 2017
    Assignee: SEMTECH CORPORATION
    Inventors: Farrokh Farrokhi, Michael Anburaj
  • Publication number: 20170236790
    Abstract: A semiconductor device includes a substrate and a first conductive layer formed over a first surface of the substrate. The first conductive layer is patterned into a first portion of a first passive circuit element. The first conductive layer is patterned to include a first coiled portion. A second conductive layer is formed over a second surface of the substrate. The second conductive layer is patterned into a second portion of the first passive circuit element. The second conductive layer is patterned to include a second coiled portion exhibiting mutual inductance with the first coiled portion. A conductive via formed through the substrate is coupled between the first conductive layer and second conductive layer. A semiconductor component is disposed over the substrate and electrically coupled to the first passive circuit element. An encapsulant is deposited over the semiconductor component and substrate. The substrate is mounted to a printed circuit board.
    Type: Application
    Filed: February 12, 2016
    Publication date: August 17, 2017
    Applicant: Semtech Corporation
    Inventors: Satyamoorthi Chinnusamy, Weng Hing Tan, Jayson Nathaniel S. Reyes
  • Patent number: 9727118
    Abstract: A measuring circuit connectable to a capacitive touch-sensitive panel, the panel including a plurality of sense electrodes and optionally a common guard electrode, adapted to measure variations in the instantaneous electric capacity of the sense electrodes in response to proximity to conductive bodies, wherein the sense electrodes are biased at a fixed voltage relative to the common guard electrode, the measuring circuit comprising: a power management integrated circuit comprising a voltage source generating a modulation voltage that is available at a guard terminal of the power management integrated circuit that is in electric connection with the guard electrode; one or more slave integrated circuits, each connected to a plurality of sense electrodes and comprising a Capacity-to-Digital converter or a plurality of Capacity-to-Digital converters that are operatively arranged for generating digital measure codes representing the instantaneous electric capacity of sense electrodes; a means for varying the frequ
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: August 8, 2017
    Assignee: Semtech Corporation
    Inventors: Olivier Nys, Pascal Monney, Mathieu Hoffmann
  • Publication number: 20170187423
    Abstract: A mobile device includes a conductive element and a ground node. The conductive element is configured to be detected by a proximity sensor. A switch is coupled between the conductive element and ground node. The conductive element is coupled to the ground node by closing the switch. A first memory element is configured to control the switch. The first memory element includes a register bit coupled to a control terminal of the switch. A data output is configured to control the switch. A FIFO is configured to provide data to the data output. The first memory element includes a FIFO. A capacitive touch controller is configured to measure a capacitance of the conductive element. A digital processing unit is configured to convert the capacitance of the conductive element to a bit of data. A second memory element is configured to store the bit of data.
    Type: Application
    Filed: March 13, 2017
    Publication date: June 29, 2017
    Applicant: Semtech Corporation
    Inventor: Chaouki Rouaissia
  • Patent number: 9692364
    Abstract: Examples are provided for a multi-stage track-and-hold circuit (THA). The multi-stage THA may include a first stage, a second stage, and a third stage. The first stage may be coupled to an input signal and configured to sample the input signal. The second stage may be coupled to the first stage and may include a buffer circuit. The third stage may be coupled to the second stage and can include a bootstrapped THA. The first stage may further include a shunted source-follower circuit and a switched source-follower circuit. The shunted source-follower circuit may include a first switch that can be operable to couple an output node of the shunted source-follower circuit to ground potential.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: June 27, 2017
    Assignee: SEMTECH CORPORATION
    Inventors: Sandeep Louis D'Souza, Kenneth Colin Dyer, Raghava Manas Bachu
  • Patent number: 9679785
    Abstract: A semiconductor device has a semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die. An insulating layer is formed over an active surface of the semiconductor die. A trench is formed in a non-active area of the semiconductor wafer between the semiconductor die. The trench extends partially through the semiconductor wafer. A carrier with adhesive layer is provided. The semiconductor die are disposed over the adhesive layer and carrier simultaneously as a single unit. A backgrinding operation is performed to remove a portion of the semiconductor wafer and expose the trench. The adhesive layer holds the semiconductor die in place during the backgrinding operation. An encapsulant is deposited over the semiconductor die and into the trench. The carrier and adhesive layer are removed. The encapsulated semiconductor die are cleaned and singulated into individual semiconductor devices. The electrical performance and functionality of the semiconductor devices are tested.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: June 13, 2017
    Assignee: Semtech Corporation
    Inventor: Satyamoorthi Chinnusamy
  • Publication number: 20170147145
    Abstract: A mobile device has a proximity sensor. A compensation value of the proximity sensor is determined. The compensation value is compared to a reference compensation value to determine validity of the compensation value. A capacitance of the proximity sensor is measured. A value of the capacitance of the proximity sensor is adjusted based on the compensation value. A coefficient defining a relationship between a capacitance of the proximity sensor and a temperature of the mobile device is calculated. A temperature sensor is coupled to the proximity sensor. The temperature of the mobile device is measured. A value of the capacitance of the proximity sensor is adjusted based on the coefficient and the temperature of the mobile device. The adjusted capacitance value is compared to a threshold capacitance value to determine proximity of an object to the mobile device. A radio frequency signal is adjusted by detecting proximity.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 25, 2017
    Applicant: Semtech Corporation
    Inventors: Chaouki Rouaissia, Jerald G. Ott, III