Patents Assigned to Silicon Graphics
  • Publication number: 20020059500
    Abstract: A node controller (12) in a computer system (10) includes a processor interface unit (24), a memory directory interface unit (22), and a local block unit (28). In response to a memory location in a memory (17) associated with the memory directory interface unit (22) being altered, the processor interface unit (24) generates an invalidation request for transfer to the memory directory interface unit (22). The memory directory interface unit (22) provides the invalidation request and identities of processors (16) affected by the invalidation request to the local block unit (28). The local block unit (28) determines which ones of the identified processors (16) are present in the computer system (10) and generates an invalidation message for each present processor (16) for transfer thereto. Each of the present processors (16) process their invalidation message and generate an acknowledgment message for transfer to the processor interface unit (24) that generated the invalidation request.
    Type: Application
    Filed: January 14, 2002
    Publication date: May 16, 2002
    Applicant: Silicon Graphics, Inc., a Delaware corporation
    Inventors: David E. McCracken, Martin M. Deneroff, Gregory M. Thorson, John S. Keen
  • Patent number: 6389154
    Abstract: A computer-based method for determining a property of a location on a computer surface model where the location is described by a set of parameters and the surface model is described by a set of control vertices having a corresponding set of subdivision rules, and the control vertices admit a parameterization of regular sets of control vertices, includes receiving input specifying coordinates of control vertices that describe the surface model, projecting the specified coordinates of the control vertices into an eigenspace derived from a matrix representation of the subdivision rules to produce a set of projected control vertices, determining which of a hierarchically nested set of regular tiles of the surface model contains the location, and evaluating the location as a function of a valence of one of the control vertices, the determined nested tile, and the set of projected control vertices. The evaluated location is stored in a computer memory.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: May 14, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Jos Stam
  • Patent number: 6384835
    Abstract: A system that predistorts a computer generated paint stamp for paint being applied to a 3D computer model of an object. The predistortion is based on a difference in shape and orientation of a texture space polygon, to which the stamp is initially applied, and the corresponding world space target polygon of the model. Because the paint stamps often overlap several polygons of different shapes and orientations, the distortion compensation becomes a weighted average of the distortion compensation for the polygon under the stamp and its nearest neighbors.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: May 7, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Jesse Chaim Reiter, Jonathan Shekter, Peter Liepa
  • Patent number: 6381139
    Abstract: A peripheral wrapper having a wrapper frame for enclosing the computer peripheral. The frame includes a first end for containing a connecting end of the computer peripheral. The wrapper includes a clip or gripping member attached to the frame near the second end of the frame, wherein the clip for grippedly and removably couples the frame to a dock section of a computer peripheral container chassis. The clip has a first leg coupled to the frame and a second leg generally parallel to first leg, the second leg not coupled to the frame. The second leg having a spring force towards the first leg when the clip is engaged to an edge of the chassis dock so that the clip is grippedly and removably attached to the chassis dock. In one embodiment, the clip includes a damping material located between the frame and the chassis dock. Another aspect of the present invention provides a computer peripheral modular system including a chassis having at least one dock.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: April 30, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Benjamin Kao-Shing Sun
  • Patent number: 6381681
    Abstract: A memory protection system for shared memory in a multiprocessor computer is provided that comprises a multiprocessor computer (10) having a plurality of processor regions and a plurality of memory pages (16). Each processor region includes one or more processors (12). Each processor (12) includes a cache (18), and each memory page (16) includes one or more cache lines (20) for coupling to the cache (18) of processors (12) within the plurality of processor regions using the memory page (16). Each memory page (16) includes a set of protection bits (82) associated with each processor region in the plurality of processor regions. The set of protection bits (82) includes an acquire protection bit (84) for each processor region in the plurality of processor regions. The acquire protection bit (84) determines whether the associated processor is enabled to perform acquire operations on the memory page (16).
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: April 30, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: David E. McCracken, Allan James Christie, James A. Stuart Fiske
  • Patent number: 6380942
    Abstract: A method and apparatus for transferring commands to a graphics processor is provided. The method and apparatus are intended for use in a host computer system having a memory that is addressable by a host processor and a graphics processor. One or more queues of packet descriptors are maintained in the memory of the host computer system. Each packet descriptor includes a pointer to a region of memory known as a packet buffer. Each packet descriptor also includes a ready variable. To pass commands to the graphics processor, a graphics process selects a packet buffer. The packet buffer must have a ready variable that is set to the value false. After selection of the appropriate packet descriptor, the graphics process writes the desired commands into the packet descriptor associated with the selected packet descriptor. The graphics process then sets the ready variable included in the selected packet descriptor to true. The graphics processor traverses the queues of packet descriptors.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: April 30, 2002
    Assignee: Silicon Graphics, Incorporated
    Inventors: Zahid S. Hussain, Timothy J. Millet
  • Patent number: 6377240
    Abstract: An electronic design guide, such as a french curve, can be placed in the geometry layer of a drawing program. This allows the design guide and a drawing tool, such as an electronic paint brush, to be moved about with in the drawing simultaneously using two different input control devices, such as a mouse and an electronic stylus/tablet. The design guide can then be used block or mask paint from being applied to the drawing by comparing the coordinates of the cursor with the area of the guide and setting pixels of the drawing accordingly. The masking can be performed even as the guide is moved. The system also can be set to constrain the path of the ink applied by the drawing tool to the edge of the drawing guide even as the guide is moved. As the cursor is moved the position of the cursor is matched with the closest next line segment of the guide and that portion painted.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: April 23, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Thomas P. H. Baudel, George W. Fitzmaurice, William A. S. Buxton, Gordon P. Kurtenbach, Charles T. Tappen, Peter E. Liepe
  • Patent number: 6373483
    Abstract: A method, system, and computer program product for a new data visualization tool for determining distribution weights that represent values of a categorical variable and then mapping a distinct color to each of the weights so as to visually represent the different values of the categorical variable (or data attribute) in a scatter plot. The distinct colors of a splat are based on the distribution of categorical variable values in a corresponding bin, the distribution of which is represented by a vector. The vector contains as many locations as the number of different values for the categorical variable. The value stored in each location is typically a weight or percentage for that particular value of the categorical variable. Each location in the vector is also associated with a distinct color.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: April 16, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Barry Glenn Becker, Roger A. Crawfis
  • Patent number: 6366461
    Abstract: A system and method for cooling individual electronic components utilizes individual manifolds to create individual flows of a negatively pressurized cooling fluid. This permits components with significantly different cooling loads to be located immediately adjacent each other on a circuit board, but without loss of space and computation time efficiencies, because cooling the components individually avoids heat generated by each component from adversely affecting the performance of the cooling system for adjacent components. A heat sink can be coupled to the components for increased heat transfer, and a preferred design of heat sink both dissipates heat and directs the flow of the fluid in an optimum manner.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: April 2, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Gregory W. Pautsch, Kent T. McDaniel, Eric Dwayne Lakin, James Joseph Jirak
  • Patent number: 6366270
    Abstract: A system for color balancing within a liquid crystal flat panel display unit. The present invention includes a method and system for altering the brightness of two or more light sources, having differing color temperatures, thereby providing color balancing of a liquid crystal display (LCD) unit within a given color temperature range. The embodiments operate for both edge and backlighting systems. In an embodiment, two planar light pipes are positioned, a first over a second, with an air gap between. The first light pipe is optically coupled to receive light from a first light source having a color temperature above the predetermined range and the second light pipe is optically coupled to receive light from a second light source having a color temperature below the predetermined range.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: April 2, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Daniel E. Evanicky
  • Patent number: 6363441
    Abstract: An electronic system and method that maintains time dependencies and ordering constraints in an electronic system. A timing controller utilizes a representative bit to track timing dependencies associated with information and ensures the information is communicated and processed in an order that preserves the timing dependencies as the information is converted from parallel to parallel or parallel to serial operations. The present invention tracks the order in which information is loaded in a electronic hardware component and ensures that the information loaded into the electronic hardware component at a particular time is processed without interruption by information loaded at a different time.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: March 26, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Ole Bentz, Ian O'Donnell
  • Patent number: 6359626
    Abstract: A method and apparatus for multisample dithering is provided. For the method of the present invention, a graphics pipeline generates a series of b-bit color sample values for each pixel that is to be processed. Each color sample is defined to include one or more omitted values. The omitted values allow the color sample values to have a range that exceeds the range that would normally be associated with the b-bits of each color sample value. The extended range of the color sample values allows the color sample values to be summed to exactly reconstruct all color values. At the same time, the values in the color samples are close to exact values. This means that constructed color values are close to their correct values.
    Type: Grant
    Filed: February 10, 1999
    Date of Patent: March 19, 2002
    Assignee: Silicon Graphics, Incorporated
    Inventor: Kurt Akeley
  • Patent number: 6359629
    Abstract: A method of efficiently removing backfacing primitives from the graphics pipeline such that rendering efficiency is increased. In one embodiment of the present invention, a bounding cone of normal vectors of a primitive is first determined during pre-processing. During the rendering process, before the primitive is drawn, the bounding cone is compared with a half-space defined by a viewing vector. Primitives whose bounding cones do not intersect with the half-space will be removed from further processing. In this way, rendering efficiency is increased. In another embodiment, a normal bit-vector is used to represent normal directions of a primitive, and a visibility bit-vector is used to represent visible normal directions. In that embodiment, primitives are culled efficiently by comparing the normal bit-vector with the visibility bit-vector.
    Type: Grant
    Filed: July 6, 1998
    Date of Patent: March 19, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Michael J. Hopcroft, Antonia Spyridi
  • Patent number: 6359389
    Abstract: A flat panel display having a programmable gamma without incidental loss in gray scale resolution. In one embodiment, the flat panel display is a liquid crystal display (LCD). The invention includes applying and adjusting a set of gamma controlling voltages to the DC reference circuit (a.k.a. ladder voltages) of an LCD module producing a change in the gamma response (or profile) of the LCD module without incidental loss of gray scale resolution. An adjustable ladder circuit (ALC) is thereby realized. Separate ALCs can be provided for red, green and blue primaries. By adjusting, in a predetermined fashion, the reference voltages applied to the row and column drivers of an LCD display, the gamma response of the LCD can be changed to a different value. Because the input digital signals are not affected, the same color resolution and dynamic range are maintained. The DC reference circuit can be a multi-node voltage divider.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: March 19, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Oscar I. Medina, Jonathan D. Mendelson, Daniel E. Evanicky
  • Patent number: 6356271
    Abstract: A system that applies computer generated paint stamps to a target polygon and to neighboring texture polygons in such a way that each texture polygon affected by a stamp that is too big for the target polygon and that is not connected to the target polygon in texture space receives an appropriately positioned and oriented stamp. The system determines the relative position and orientation of the stamp with respect to a texture polygon adjacent to the target polygon and applies the stamp centered at that relative position and orientation, so that the stamp overlaps the adjacent polygon.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: March 12, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Jesse Chaim Reiter, Jonathan Shekter
  • Patent number: 6357003
    Abstract: An x86 based computer system that implements an advanced firmware based boot process without a conventional x86 BIOS. The computer system includes an x86 processor coupled to a volatile memory and a non-volatile memory via a bus, wherein the non-volatile memory includes an advanced firmware. The advanced firmware is executed by the processor to implement a boot sequence. During the boot sequence, the computer system initializes device drivers using the advanced firmware and interfaces with advanced firmware compliant program with the device drivers of the computer system. The computer system also initializes a virtual compatibility machine for supporting legacy software programs. The virtual compatibility machine includes a plurality of compatibility models.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: March 12, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Saeed S. Zarrin, John Sully, Daniel Brown
  • Patent number: 6353917
    Abstract: Determining a switching factor is useful for optimizing integrated circuit (IC) design. One aspect of the invention is a method for determining the switching factor. The method includes applying a voltage to each interconnect of a pair of interconnects, each voltage having a waveform and a slew time. The method includes dividing the voltage waveform into time regions, and analyzing a behavior of a capacitor in each of the time regions by determining the value of an effective capacitance as seen from one of the interconnects. The method includes determining a total effective capacitance by time averaging the effective capacitance values and determining the switching factor from the total effective capacitance. The switching factor is a function of a ratio between the slew times, wherein a time-averaged effective value of the switching factor corresponds total effective capacitance.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: March 5, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Sudhakar Muddu, Egino Sarto
  • Patent number: 6353844
    Abstract: A batch job scheduler facility schedules batch jobs in a general purpose multiprocessor system having resources, such as processors and memory, and running interactive and batch jobs. The resources are allocated to the batch jobs. Completion times are calculated and guaranteed for the batch jobs based on the resources allocated to the batch jobs. The completion times are calculated and guaranteed without static partitioning, resulting in improved utilization of system resources. Batch-critical batch jobs are defined which require all their allocated resources to complete by their guaranteed completion time. The batch jobs are scheduled so that batch jobs and interactive jobs compete for the same resources. Batch-critical jobs are permitted to obtain all their allocated resources.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: March 5, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Nawaf K. Bitar, Robert M. English
  • Patent number: 6349398
    Abstract: An integrated circuit apparatus includes main logic for performing digital logic operations. The main logic is further comprised of a plurality of logic modules, each having at least one logic block associated with the logic module. Many times several logic blocks are associated with the logic modules. The main logic further also includes a number of input pins for receiving data and a number of output pins for outputting data from the main logic. Also included on the integrated circuit apparatus is testing logic for performing dynamic tests of the main logic. The testing logic further includes a first type of built-in testing logic for testing a first number of the logic modules of the main logic and a second type of built-in test logic for testing a second number of logic blocks. The second number of logic blocks connected to the second type of built-in scan logic are generally untestable using the first type of built-in logic.
    Type: Grant
    Filed: January 26, 1999
    Date of Patent: February 19, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: David Resnick
  • Patent number: 6348924
    Abstract: A system that allows a user to interactively paint volumetric particles using a brush stroke. The particles are emitted from an area around the stroke path as the stroke is being made. As each stroke input event occurs, the system emits new particles from the new stroke segment and adds a segment to the particles that have already been emitted. This allows the user to interact with the particles as they are being “grown” and change a direction of a stroke thereby affecting the final image. As the particles are growing they can be affected by forces and displacements which change the position of the volumetric particle segments. The user can set or designate the stroke itself as a force which allows the user to control the flow of the generated particles.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: February 19, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Duncan Richard Brinsmead