Abstract: In one aspect, a method includes: determining a power mode of a device; setting a first reference voltage level and a second reference voltage level based at least in part on the power mode; and using at least one of the first reference voltage level and the second reference voltage level for comparison against incoming data.

Abstract: Systems and methods are provided that may be implemented to produce customized integrated circuit (IC) device parts together from a common base IC device part that is customized with settings or code to build different unique IC device parts for different purposes that are processed and output together from the manufacturing process. Different individual devices of the common base part may be customized (e.g., programmed) with different settings and/or code to build respective uniquely configured parts for different purposes, e.g., such as according to different respective part orders.

Abstract: A technique for sensing an environmental parameter is disclosed. The technique generates an oscillating signal using a variable resistance sensitive to a variable parameter. A frequency of the oscillating signal is directly dependent on the variable resistance. A time-to-digital converter generates a digital code indicative of the variable resistance. The digital code is generated based on the frequency of the oscillating signal and a second frequency of a reference clock signal. The second frequency is insensitive to the variable parameter. The variable resistance may be a metal resistor and the reference resistance may be generated using a capacitor that is switched at a particular frequency. The measured resistance may be used to control a voltage-controlled oscillator. The oscillating signal frequency may be converted to a digital signal and post-processed for use as an indicator of absolute temperature or other environmental parameter.

Abstract: An integrated circuit includes: a voltage converter to receive a first supply voltage signal via a first power path and to output a first output voltage signal; and a voltage regulator to receive the first output voltage signal and to output a regulated voltage signal. The voltage regulator may further be configured to receive the first supply voltage signal via a second power path, and to selectively output the regulated voltage signal from one of the first supply voltage signal and the first output voltage signal.

Abstract: An apparatus includes a first set of circuits adapted to operate in a first mode of operation of the apparatus. The apparatus further includes a second set of circuits adapted to operate in a second mode of operation of the apparatus, where a power consumption of the apparatus is lower in the second mode of operation of the apparatus than in the first mode of operation of the apparatus. The apparatus also includes a charge pump adapted to convert a first supply voltage of the apparatus to a second supply voltage, and the second supply voltage powers the second set of circuits.

Abstract: A light detector includes a semiconductor die that provides a photo sensor. An interference filter is formed on the semiconductor die and has a pass band corresponding to a wavelength of a light emitting diode to supply filtered light in the pass band to the photo sensor.

Abstract: A technique that reduces or eliminates trading-off power amplifier efficiency and costly external filtering in amplitude and phase modulated sinusoidal signal generation uses multi-phase outphasing and a multi-phase switching mode power amplifier to generate the amplitude and phase modulated sinusoidal signals. The technique combines multiple clock phases with sinusoidally weighted circuits of the switching mode power amplifier to improve amplitude and phase modulated sinusoidal signal generation.

Abstract: A system and method of minimizing interference and retries in an environment where two or more network protocols utilize the same frequency spectrum is disclosed. A lower-power network controller is co-located with a WIFI controller. The lower-power network controller parses incoming packets as they are received and generates a request signal once it is determined that the incoming packet is destined for this device. This maximizes the likelihood that no WIFI traffic will occur while the incoming packet is being received.

Abstract: In one aspect, an apparatus includes: a pulse frequency modulation (PFM) voltage converter to receive a first voltage and provide a second voltage to a load; and a pulse generator. The PFM voltage converter may include an inductor to store energy based on the first voltage and a switch controllable to switchably couple the first voltage to the inductor. The pulse generator may be configured to generate at least one pulse pair to control the switch, where this pulse pair is formed of a first pulse and a second pulse substantially identical to the first pulse, where the second pulse is separated from the first pulse by a pulse separation interval, when the second voltage is less than a first threshold voltage.

Abstract: An apparatus includes an integrated circuit (IC). The IC includes a regulator to receive a plurality of input voltages and to provide a regulated output voltage to a load. The regulator includes a plurality of voltage regulators that receive the plurality of input voltages and provide the regulated output voltage as an output of the regulator. The IC further includes a controller that controls the regulator by using a voltage regulator in the plurality of voltage regulators to generate the regulated output voltage from the plurality of input voltages.

Abstract: An apparatus includes a signal generator. The signal generator includes a voltage controlled oscillator (VCO) coupled to provide an output signal having a frequency. The signal generator further includes an asymmetric divider coupled to receive the output signal of the VCO and to provide an output signal. The output signal of the asymmetric divider has a frequency that is half the frequency of the output signal of the VCO. The asymmetric divider presents a balanced load to the VCO.

Abstract: An apparatus includes a first oscillator to generate an output signal that has a first frequency. The apparatus further includes a second oscillator to generate an output signal that has a second frequency. The second frequency varies as a function of temperature. The apparatus further includes a controller that counts a number of cycles of the output signal of the second oscillator in order to determine whether to calibrate the first oscillator.

Abstract: An apparatus includes a voltage regulator to regulate a voltage from a power source and to provide an output current at an output. The apparatus further includes a battery charger, coupled to the voltage regulator, to provide a charge current. The apparatus further includes a controller to control the charge current such that the charge current is less than or equal to a current available from the power source minus the output current.

Abstract: Systems and methods are provided that allow a BLE scanning device or other receiving device to use packet transmission timing parameter discovery to synchronize its listening times to the actual packet transmission times from a transmitting device such as a BLE advertising device. Once discovered, the packet transmission timing parameter/s may be used by the receiving device to calculate the same pseudorandom delay time component (such as BLE advDelay) that is being used by the transmitting device to determine intervals between the transmitted packets. This allows the receiving device to calculate the exact time that the transmitting device is transmitting each packet, so that the receiving device may synchronize its listening times to coincide with the packet transmitting intervals used by the transmitting device.

Abstract: In some embodiments, a circuit may include a configurable logic module including a multiplexer. The multiplexer may include a plurality of data inputs configured to receive one or more bit strings. Each of the one or more bit strings may correspond to a logic operation. The multiplexer may further include a first control input configured to receive a first input signal, a second control input configured to receive a second input signal, and an output configured to provide an output signal corresponding to a selected logic operation based on the first input signal and the second input signal.

Abstract: Bypass techniques are provided herein to protect noise sensitive circuits from both internal and external noise sources. According to one embodiment, an integrated circuit (IC) chip may include a noise sensitive circuit coupled between a power supply pad and a first ground pad of the IC chip. In order to protect the first ground pad of the noise sensitive circuit, two distinct bypass paths are provided to route noise current around the noise sensitive circuit. Each bypass path terminates in its own ground pad (e.g., a second ground pad and third ground pad), which is separate from the first ground pad of the noise sensitive circuit.

Abstract: In one embodiment, an apparatus includes a controller to control a voltage regulator. The controller may have a first comparator circuit to compare a first reference voltage to a feedback voltage. In turn, the first comparator circuit may include: a first comparator having a first input terminal to receive the feedback voltage and a second input terminal to receive the reference voltage and an output node to output an error signal based on the comparison; and a first pre-charge circuit coupled between the first input terminal and the output node configured to pre-charge a first portion of a compensation network to a pre-charge level. The first controller may further include a second comparator circuit coupled to the first comparator circuit compare the error signal to a ramp signal and to generate a first control output to control a power train of the voltage regulator in a first mode of operation.

Abstract: In some embodiments, powered devices, circuits, and methods are disclosed that may include biasing a hot swap switch to couple a capacitor of a DC-DC converter to negative supply node when an input voltage exceeds a threshold and biasing a telephony switch to couple a positive supply node to a negative supply node when the input voltage exceeds the threshold. Further, the method may further include deactivating the hot swap switch after a period of time, and continuing to bias the telephony switch.

Abstract: An apparatus includes a plurality of delay elements, a plurality of multipliers and an accumulator to form a biquad stage; and a precision logic circuit. The biquad stage includes feedback paths; at least one feedback path has an adjustable bit precision; and the precision logic is adapted to regulate the bit precision of the feedback path(s) based at least in part on at least one parameter that is associated with the biquad stage.

Abstract: A metering circuit includes a comparator including a first input to receive an input signal, and including a second input and an output. The metering circuit further includes a reference source to provide a time-varying reference signal to the second input during a peak counting operation.