Patents Assigned to Silicon Laboratories
  • Patent number: 9948313
    Abstract: Apparatus and methods are disclosed that utilize magnetically differential loop filter capacitor elements that are physically positioned adjacent voltage-controlled oscillator (VCO) inductor/s in the device layout of a phase locked loop (PLL) circuit. Such a PLL circuit may be employed, for example, to produce a PLL output signal for RF receivers, RF transmitters, RF transceivers and any other type of circuit configured to utilize a PLL output signal having a phase that is based on the phase of an input signal.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: April 17, 2018
    Assignee: Silicon Laboratories Inc.
    Inventor: Aslamali A. Rafi
  • Patent number: 9942848
    Abstract: A technique for arbitrating conflicting usage of a communications channel of a wearable communications device is disclosed. In at least one embodiment of the invention, a method includes transmitting a voice signal from a microphone to a portable device using a first communications channel in a first mode of operating a system. The method includes transmitting a monitor signal to the portable device using the first communications channel for a predetermined period of time in response to detection of a beacon signal initiated by an application executing on the portable device. The first and second signals may be ultrasonic signals received over the first communications channel and may have the same frequency and different phases. The beacon signal may be detected based on the first and second signals. The first communications channel may include an audio jack of the portable device.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: April 10, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Jefferson Lim Gokingco, Moshe Morrie Altmejd
  • Patent number: 9935649
    Abstract: A quantizer including passive summers, dynamic comparators and a clock generator. Each passive summer samples the input voltages and a reference voltage scaled by one of multiple graduated gains, and subtracts the scaled reference voltage from the sum of the input voltages. The graduated gains divide a predetermined voltage range into multiple voltage subranges, each between sequential pairs of the passive summers. The dynamic comparators compare each sequential pair of passive summer output voltages according to multiple splitting ratios and provide corresponding quantization bits. The dynamic comparators are activated in groups to reduce comparator kickback. Each dynamic comparator recharges the passive summer output voltages coupled to its inputs back to their initial voltage values to reduce kickback residual. The passive summers eliminate the need for a resistor string to generate the reference voltages.
    Type: Grant
    Filed: August 21, 2017
    Date of Patent: April 3, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Axel Thomsen, Chao Yang, Xiaodong Wang
  • Patent number: 9927779
    Abstract: A method includes monitoring total energy supplied, during a power-on phase, to a power field effect transistor (FET) coupled to a network port of a power sourcing equipment (PSE) device using a controller. The method further includes detecting an error when the total energy exceeds a pre-determined threshold.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: March 27, 2018
    Assignee: Silicon Laboratories Inc.
    Inventor: John C. Gammel
  • Patent number: 9921683
    Abstract: Defects in a touch sensor are detected by coupling the sensor lines to a common signal line. Each of the sensor lines is tested by disconnecting the sensor line from the common signal line, connecting it to a voltage (e.g., ground) and comparing the voltage on the common signal line to a reference voltage. Detected defects include a short circuit between any two transmit and/or receive lines and a short between any transmit or receive line to ground.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: March 20, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Daniel J. Cooley, Jeffrey L. Sonntag
  • Patent number: 9923643
    Abstract: An apparatus for communicating using an isolation channel includes a transmitter circuit having a first terminal configured to communicate a first signal. The first signal oscillates in response to a data signal having a first signal level and is constant in response to the data signal having a second signal level. The transmitter circuit includes a second terminal configured to communicate that oscillates in response to the data signal having the second signal level and is constant in response to the data signal having the first signal level. The apparatus may include a receiver circuit configured to generate a recovered data signal having a first transition in a first direction between first and second levels based on an edge of a first received signal and having a second transition in a second direction between the first and second levels based on an edge of a second received signal.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: March 20, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, Jeffrey L. Sonntag, Michael J. Mills, Riad Wahby
  • Patent number: 9923710
    Abstract: In one aspect, an apparatus includes: a first time-to-data converter (TDC) to oversample a first duration of incoming data and hold the oversampled first duration during receipt of a second duration of the incoming data; a second TDC to oversample the second duration of the incoming data and hold the oversampled second duration during receipt of a third duration of the incoming data; a processing circuit coupled to the first and second TDCs, the processing circuit including a first filter to filter the oversampled first duration and the oversampled second duration and generate a control output therefrom; and a digitally controlled oscillator (DCO) coupled to the processing circuit to receive the control output and generate a recovery clock signal therefrom.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: March 20, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Hua Beng Chan, Rex Wong Tak Ying, Ricky Setiawan, Obaida Mohammed Khaled Abu Hilal
  • Patent number: 9893823
    Abstract: In one embodiment, an apparatus includes: a first demodulator to demodulate a digital signal into a first demodulated audio signal; a second demodulator to demodulate an analog signal into a second demodulated audio signal, the first and second demodulated audio signals including common content; and a delay determination circuit to determine a delay value between the common content of the two demodulated audio signals based at least in part on a first delay estimate having a first resolution and a second delay estimate having a second resolution.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: February 13, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Junsong Li, John Allen
  • Patent number: 9886412
    Abstract: A system for communicating information includes one device that communicates information via a communication link. The system also includes a second device to communicate information via the communication link. The second device includes a receiver to receive information from the communication link. The second device also includes an oscillator that provides at least one timing signal to the receiver. The oscillator is disabled when the communication link is in an idle state. The oscillator is enabled when the communication link is in a non-idle state.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: February 6, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Kenneth W. Fernald, Phillip Matthews, Thomas Saroshan David
  • Patent number: 9874887
    Abstract: A voltage regulator circuit with variable feedback is disclosed. In one embodiment, a voltage regulator includes an amplifier having a first input configured to receive a reference voltage and a second input configured to receive a feedback signal. The voltage regulator further includes first and second transistors each having respective gate terminals coupled to an output of the amplifier. A resistor network coupled to the second input of the amplifier and further coupled to the first and second transistors. The resistor network is configured to produce the feedback signal based on currents through the first and second transistors, respectively.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: January 23, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Shouli Yan, Alan Westwick
  • Patent number: 9870103
    Abstract: A controller for a capacitive touch screen or the like includes a touch resolve subsystem and a processor. The touch resolve subsystem, when activated, measures a plurality of capacitance values using a plurality of input pins. The processor uses the plurality of capacitance values at each of a plurality of values of a parameter to create an interference map.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: January 16, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Vadim Konradi, Parker Dorris, Michael Franklin, David R. Welland
  • Patent number: 9866215
    Abstract: In one embodiment, a voltage comparator circuit includes a first comparator circuit to compare a first voltage and a second voltage and a second comparator circuit to compare the first voltage and the second voltage. The voltage comparator circuit may include charge storage circuitry and positive feedback circuitry. Such circuitry may boost current within the first and second comparator circuits to enable the voltage comparator circuit to output a comparison decision within a delay threshold in response to input transitions within a slew rate threshold.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: January 9, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Nicholas Montgomery Atkinson, Praveen Kallam, Mohamed Mostafa Elsayed
  • Patent number: 9860392
    Abstract: In some embodiments, a power converter circuit includes a first power converter coupled between a direct-current (DC) node and a first pair of output nodes. The first power converter may be configured to provide a first power signal having a first phase to the first pair of output nodes. The power converter circuit may also include a second power converter coupled between the DC node and a second pair of output nodes. The second power converter may be configured to provide a second power signal having a second phase to the second pair of output nodes. The second phase and the first phase may differ by an odd multiple of ninety degrees.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: January 2, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Sean Anthony Lofthouse, Bassem ElAzzami
  • Patent number: 9846205
    Abstract: An integrated circuit includes a magnetic sensor and a magnetic field generating coil. A control circuit on the integrated circuit responds to an activation indication received by the integrated circuit to cause activation of generation of a first magnetic field by the magnetic field generating coil. The control circuit responds to a subsequent activation indication to generate a second magnetic field different from the first magnetic field. The first magnetic field may have a polarity opposite to a polarity of the second magnetic field. A communication interface may be used to communicate one or more indications associated with an expected magnetic field strength, such as coil resistance, and a measured magnetic field strength measured by the magnetic sensor. The magnetic field generating coil may be coaxial with the magnetic sensor and the magnetic field generating coil may have an inner diameter greater than a diameter of the magnetic sensor.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: December 19, 2017
    Assignee: Silicon Laboratories Inc.
    Inventor: Jeffrey L. Sonntag
  • Patent number: 9841804
    Abstract: A technique includes clocking a processor; and in response to the processor providing a signal indicating that the processor is transitioning between a first power state that is associated with a first power consumption and a second power state that is associated with a second power consumption different than the first power consumption, changing a frequency of the clocking.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: December 12, 2017
    Assignee: Silicon Laboratories Inc.
    Inventors: Subrata Roy, Xiaohui Wang
  • Patent number: 9836071
    Abstract: An apparatus includes an integrated circuit (IC). The IC includes a power controller, which includes a regulator and a controller. The regulator receives a plurality of input voltages and provides a regulated output voltage. The controller controls the regulator to generate the regulated output voltage from the plurality of input voltages. The power controller provides power to a load integrated in the IC from a set of arbitrary input voltages. The set of arbitrary input voltages includes the plurality of input voltages.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: December 5, 2017
    Assignee: Silicon Laboratories Inc.
    Inventors: Nicholas M. Atkinson, Praveen Kallam, Timothy T. Rueger
  • Patent number: 9831836
    Abstract: An automatic gain control (AGC) circuit and method are provided herein to control the gain, and the gain step size, of an amplifier circuit based on a duration of a detected overload condition. According to one embodiment, a method of gain control may include comparing a received signal to a threshold value, detecting an overload condition if the received signal exceeds the threshold value, detecting a duration of the overload condition, and controlling the gain, and the gain step size, of the amplifier circuit based on the detected duration of the overload condition.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: November 28, 2017
    Assignee: Silicon Laboratories Inc.
    Inventor: Hendricus de Ruijter
  • Patent number: 9831889
    Abstract: In an example embodiment, an apparatus includes: a first sampling capacitor and a comparator to compare a sum voltage at a first input terminal to a voltage level at a second input terminal according to a thermometer cycle. The sum voltage is based at least in part on an analog input voltage and a divided reference voltage, where the analog input voltage and the reference voltage (VREF) are of a first voltage range and the divided reference voltage is according to ( ( 2 M - 1 ) ? V REF / 2 M ) , to enable the comparator to operate at a second voltage range, the second voltage range less than V REF / 2 M , and M is a number of bits of a digital output to be decided in the thermometer cycle and is greater than one.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: November 28, 2017
    Assignee: Silicon Laboratories Inc.
    Inventor: Obaida Mohammed Khaled Abu Hilal
  • Patent number: 9817636
    Abstract: A method includes using an analog-to-digital converter (ADC) to provide an entropy signal at an output of the ADC. The method includes controlling a reference signal to the ADC to cause an internal noise level of the ADC to correspond to more than one least significant bit (LSB) of the ADC.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: November 14, 2017
    Assignee: Silicon Laboratories Inc.
    Inventor: Xiaodong Wang
  • Patent number: 9819524
    Abstract: In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an amplifier coupled to the mixer to amplify the second frequency signal; an image rejection (IR) circuit coupled to the programmable gain amplifier (PGA) to orthogonally correct a gain and a phase of the amplified second frequency signal to output a corrected amplified second frequency signal; and a complex filter to filter the corrected amplified second frequency signal.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: November 14, 2017
    Assignee: Silicon Laboratories Inc.
    Inventors: John M. Khoury, Navin Harwalkar