Abstract: An apparatus includes a module. The module includes a radio frequency (RF) circuit to transmit or receive RF signals, and a loop antenna to transmit or receive the RF signals. The module further comprises an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit comprises lumped reactive components.
Type:
Grant
Filed:
December 20, 2019
Date of Patent:
September 19, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Attila Zolomy, Pasi Rahikkala, Tuomas Hänninen
Abstract: A communications processor is operative in a plurality of modes including at least a high performance mode, a power savings mode with lower computational capability, and a shutdown mode with a wakeup capability. A memory for the communications processor has a high speed segment and a low speed segment, the high speed segment and low speed segment respectively on a high speed data bus and a low speed data bus, the high speed data bus and low speed data bus coupled by a bidirectional bridge.
Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.
Type:
Grant
Filed:
March 25, 2022
Date of Patent:
September 12, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Attila Zolomy, Pasi Rahikkala, Thomas E. Voor
Abstract: An apparatus includes a module, which includes an impedance matching circuit. The apparatus further includes a capacitor that is external to the module, and is coupled to the impedance matching circuit. The apparatus further includes a loop antenna to transmit or receive the RF signals. The loop antenna is coupled to the capacitor.
Type:
Grant
Filed:
March 25, 2022
Date of Patent:
September 12, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Thomas E. Voor, Attila Zolomy, Pasi Rahikkala
Abstract: An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.
Type:
Grant
Filed:
March 25, 2022
Date of Patent:
September 12, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Attila Zolomy, Pasi Rahikkala, Thomas E. Voor
Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.
Abstract: A radio-frequency (RF) apparatus includes a wideband receive (RX) impedance matching circuit to provide a received differential RF signal to RF receive circuitry. The wideband RX impedance matching circuit includes first and second inductors to receive the differential RF signal. The wideband RX impedance matching circuit further includes a third inductor coupled across an input o the RF receive circuitry. The third inductor performs the functionality of a capacitor having a negative capacitance value.
Abstract: An apparatus includes a radio frequency (RF) receiver to receive packets. The RF receiver includes first and second synchronization field detectors (SFDs). The first and second SFDs detect synchronization headers generated using first and second physical layer (PHY) modes, respectively.
Type:
Grant
Filed:
January 11, 2018
Date of Patent:
September 5, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Hendricus de Ruijter, Wentao Li, Lauri Mikael Hintsala
Abstract: A flip-flop including a scan enable input for receiving a scan enable signal, a clock input for receiving a clock signal, input select circuitry that is configured to select between a data input and a scan input based on a state of the scan enable signal for providing a selected input, latching circuitry that is configured to latch the selected input to a preliminary output node in response to transitions of the clock signal, and output select circuitry that is configured to provide a state of the preliminary output node to a selected one of a scan output and a data output based on a state of the scan enable signal. The flip-flop may be implemented using fast yet leaky transistors. The data output may be disabled to prevent toggling other circuitry when scanning into or out of a memory for data retention.
Abstract: An apparatus includes a module, which includes an impedance matching circuit. The apparatus further includes a capacitor that is external to the module, and is coupled to the impedance matching circuit. The apparatus further includes a loop antenna to transmit or receive the RF signals. The loop antenna is coupled to the capacitor.
Type:
Grant
Filed:
May 22, 2019
Date of Patent:
September 5, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Thomas E. Voor, Attila Zolomy, Pasi Rahikkala
Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.
Type:
Grant
Filed:
November 30, 2020
Date of Patent:
August 29, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
John M. Khoury, Yan Zhou, Michael A. Wu
Abstract: An apparatus includes a comparator. The comparator includes a plurality of pregain stages, and a switch network coupled to the plurality of pregain stages. The comparator further includes a latch coupled to the plurality of pregain stages.
Type:
Grant
Filed:
April 23, 2020
Date of Patent:
August 29, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Sheng Jue Peh, Obaida Mohammed Khaled Abu Hilal
Abstract: A method for communicating between a first radio frequency communications device including a first local oscillator and a second radio frequency communications device including a second local oscillator includes generating phase values based on samples of a received signal. Each of the phase values indicates an instantaneous phase of the received signal. The method includes unwrapping the phase values to generate unwrapped phase values. The method includes generating frequency offset estimates based on the unwrapped phase values. The method includes generating an average frequency offset estimate based on the unwrapped phase values. The method includes wrapping the average frequency offset estimate to generate a residual frequency offset estimate. The method includes adjusting the first local oscillator based on the residual frequency offset estimate, thereby reducing a frequency offset between the first local oscillator and the second local oscillator.
Type:
Grant
Filed:
November 30, 2020
Date of Patent:
August 22, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Michael A. Wu, Wentao Li, John M. Khoury, Yan Zhou
Abstract: A system that includes a Viterbi Equalizer having adaptive signal levels is disclosed. Each branch metric of the Viterbi Equalizer compares the value of the incoming bit to one of a plurality of different expected signal levels. A set of default signal values may be used by the Viterbi Equalizer. The system is also configured to determine whether these default expected signal levels are acceptable by monitoring the incoming data bits. If it is determined that the actual signal levels of the incoming data bits differ from the default expected signal levels by more than a predetermined amount, the signal levels used by the Viterbi Equalizer may be changed from default signal levels to the adaptive signal levels. The adaptive signal levels may be determined using the synchronization pattern.
Abstract: A system and method for allowing a companion device to serve as a user interface for another network device is disclosed. The companion device includes a display element, an input device and a software program that enables the companion device to create standard graphical items on that display. The network device transmits a list of graphical descriptors to the companion device, which the companion device uses to create the user interface. Additionally, the network device also transmits to the companion device, the commands that the companion device is to transmit based on user input. In this way, the companion device does not require any knowledge of the operation or functionality of the network device in order to serve as its user interface.
Abstract: A system and method of keyword spotting using two neural networks is disclosed. The system is in sleep mode most of the time, and wakes up periodically. Upon waking, a limited duration of audio is examined. This may be performed using an auxiliary neural network. If any audio activity is detected in this duration, the system fully wakes and examines a longer duration of audio for keywords. The keyword spotting is also performed by the main neural network, which may be a convolutional neural network (CNN).
Type:
Grant
Filed:
December 12, 2019
Date of Patent:
August 22, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Antonio Torrini, Ramin Khoini-Poorfard, Sebastian Ahmed
Abstract: Systems and methods are provided that may be implemented to use resource filtering to provide multiple different device personalities and/or multiple different resources from a radio frequency (RF)-enabled wireless device or apparatus to one or more other connecting RF-enabled wireless devices across one or more wireless connections. In one example, each different given resource of a wireless device may be associated with at least one filter which may be used by the device to determine which connection/s the given resource may be provided, and a given resource may only be provided to a given connecting device only if the given resource passes the filter.
Abstract: A loop type ground radiating antenna having dual resonance is disclosed. The antenna including a feeding path that traverses the ground clearance, creating a first portion and a second portion. One or more first capacitors are disposed along a first conductive path between the ground clearance and the edge of the ground layer, proximate the first portion, while one or more second capacitors are disposed along a second conductive path between the ground clearance and the edge of the ground layer, proximate the second portion. An input capacitor is used to feed the feeding path. The values of the input capacitor and the first capacitors determine a resonant frequency of the first feeding loop, while the values of the input capacitor and the second capacitors determine a resonant frequency of the second feeding loop. By proper selection of the capacitor values, a wide bandwidth may be created.
Type:
Grant
Filed:
May 20, 2021
Date of Patent:
August 8, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Pasi Rahikkala, Tuomas Hänninen, Attila Zólomy
Abstract: A first three state driver injects a first clock signal into a crystal through an input node during a startup phase of a crystal oscillator and a second three state driver injects a second signal into the crystal through an output node during the startup phase. The first and second signals are anti-phase signals. The crystal oscillator circuit includes a first amplifier that is used during starting up and steady-state operation and includes a second amplifier. The injection through the input and output nodes is disabled after a fixed time. After injection ends, the second amplifier is turned on if voltage on the output node has reached a desired voltage and left off otherwise. If the second amplifier is turned on, the second amplifier is turned off when the voltage on the output node reaches the desired voltage.
Type:
Grant
Filed:
June 29, 2022
Date of Patent:
July 18, 2023
Assignee:
Silicon Laboratories Inc.
Inventors:
Mohamed M. Elkholy, Francesco Barale, Tiago Pinto Guia Marques, Steffen Skaug, Håkon Børli
Abstract: Systems and methods are disclosed for side-channel attack mitigation for secure devices including cryptographic circuits using block ciphers that are not based upon feedback. For disclosed embodiments, an integrated circuit includes a cryptographic circuit and a controller. The cryptographic circuit performs cryptographic operations in a block cipher AES mode without feedback. The controller outputs control signals to the cryptographic circuit that cause the cryptographic circuit to perform the cryptographic operations on sequential data blocks with an internally permuted order to mitigate block cipher side-channel attacks. The internally permuted order can be generated using one or more random number generators, one or more pre-configured permutated orders, or other techniques.