Patents Assigned to Siltronic AG
  • Patent number: 7964275
    Abstract: Silicon wafers in the entire volume of which crystal lattice vacancies are the prevalent point defect type, have a rotationally symmetric region whose width is at least 80% of the wafer radius, crystal lattice vacancy agglomerates of at least 30 nm in a density ?6·103 cm?3, crystal lattice vacancy agglomerates of from 10 nm to 30 nm in a density of 1·105 cm?3 to 3·107 cm?3, OSF seeds in a density of 0 to 10 cm?2, and an average bulk BMD density of 5·108 cm?3 to 5·109 cm?3, which varies at most by a factor of 10 radially over the entire silicon wafer, and a BMD-free layer on the front side, wherein the first BMD is found at a depth of at least 5 ?m and on average at a depth of at least 8 ?m.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: June 21, 2011
    Assignee: Siltronic AG
    Inventors: Timo Müller, Martin Weber, Gudrun Kissinger
  • Publication number: 20110139064
    Abstract: A graphite crucible for silicon single crystal manufacturing by the Czochralski method, having a long life cycle, contains at least one gas venting hole provided in a corner portion of the crucible. Gas generated by reaction between the graphite crucible and a quartz crucible is released to the outside through the gas venting hole, and formation of SiC on the surface of the graphite crucible and deformation of the quartz crucible caused by the pressure of the generated gas are prevented.
    Type: Application
    Filed: October 28, 2010
    Publication date: June 16, 2011
    Applicant: SILTRONIC AG
    Inventors: Hideo Kato, Hideaki Murakami, Mikio Suehiro
  • Publication number: 20110133314
    Abstract: A method for producing a semiconductor wafer includes pulling a single crystal of semiconductor material, slicing a semiconductor wafer from the single crystal and polishing the semiconductor wafer with the polishing pad and polishing agent. The polishing agent is free of solid materials having abrasive action and the polishing pad contains fixedly bonded solid materials with abrasive action. During polishing the polishing agent is supplied in a gap between the semiconductor wafer and polishing pad. The polishing agent has a pH value in a range of 9.5 to 12.5.
    Type: Application
    Filed: November 4, 2010
    Publication date: June 9, 2011
    Applicant: SILTRONIC AG
    Inventors: Georg Pietsch, Walter Haeckl, Juergen Schwandner, Noemi Banos
  • Publication number: 20110126757
    Abstract: Single crystal composed of silicon with a section having a diameter that remains constant, are pulled by a method wherein the single crystal is pulled with a predefined pulling rate vp having the units [mm/min]; and the diameter of the single crystal in the section having a diameter that remains constant is regulated to the predefined diameter by regulating the heating power of a first heating source which supplies heat to the single crystal and to a region of the melt that adjoins the single crystal and is arranged above the melt, such that diameter fluctuations are corrected with a period duration T that is not longer than (2·18 mm)/vp.
    Type: Application
    Filed: October 28, 2010
    Publication date: June 2, 2011
    Applicant: SILTRONIC AG
    Inventors: Thomas Schroeck, Wilfried von Ammon, Claus Kropshofer
  • Publication number: 20110111677
    Abstract: A method for polishing a semiconductor wafer having a first side and a second side, the method includes polishing the first side using a Fixed Abrasive Polishing (FAP) with a polishing pad including fixedly bonded abrasives having an average particle size of 0.1-1.0 ?m; applying a cement layer with a thickness of at most 3 ?m to the polished first side; fixing the polished and cemented first side on a carrier plate of a polishing machine; and polishing the second side using a single-side chemical mechanical polishing.
    Type: Application
    Filed: October 19, 2010
    Publication date: May 12, 2011
    Applicant: SILTRONIC AG
    Inventor: Juergen SCHWANDNER
  • Publication number: 20110107960
    Abstract: Silicon single crystals are grown by a method of remelting silicon granules, by crystallizing a conically extended section of the single crystal with the aid of an induction heating coil arranged below a rotating plate composed of silicon; feeding inductively melted silicon through a conical tube in the plate, the tube enclosing a central opening of the plate and extending below the plate, to a melt situated on the conically extended section of the single crystal in contact with a tube end of the conical tube, wherein by means of the induction heating coil below the plate, sufficient energy is provided to ensure that the external diameter of the tube end is not smaller than 15 mm as long as the conically extended section of the single crystal has a diameter of 15 to 30 mm.
    Type: Application
    Filed: October 28, 2010
    Publication date: May 12, 2011
    Applicant: SILTRONIC AG
    Inventors: Wilfried von Ammon, Ludwig Altmannshofer, Martin Wasner
  • Patent number: 7938911
    Abstract: Semiconductor wafers are cleaned using a cleaning solution containing an alkaline ammonium component in an initial composition, wherein the semiconductor wafer is brought into contact with the cleaning solution in an individual-wafer treatment, and in the course of cleaning hydrogen fluoride is added as further component to the cleaning solution, and the cleaning solution has at the end of cleaning, a composition that differs from the initial composition.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: May 10, 2011
    Assignee: Siltronic AG
    Inventors: Clemens Zapilko, Thomas Buschhardt, Diego Feijoo, Guenter Schwab
  • Publication number: 20110104904
    Abstract: A method of processing a silicon wafer including sequentially carrying out the steps of (1) preparing a lapped semiconductor silicon wafer, (2) cleaning the wafer with a surfactant, (3) cleaning the wafer with alkali or acid, and (4) etching the wafer with high-purity sodium hydroxide.
    Type: Application
    Filed: November 1, 2010
    Publication date: May 5, 2011
    Applicant: SILTRONIC AG
    Inventor: Shigeki Nishimura
  • Patent number: 7935614
    Abstract: A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 ?m relative to an edge exclusion of 2 mm.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: May 3, 2011
    Assignee: Siltronic AG
    Inventors: Reinhard Schauer, Norbert Werner
  • Publication number: 20110097974
    Abstract: A method of polishing a semiconductor wafer using a holding system including a lined cutout the size of the semiconductor wafer that is fixed to a carrier. The method includes holding the semiconductor wafer in the cutout through adhesion of a first side of the semiconductor wafer to a bearing surface in the cutout and polishing a second side of the held semiconductor wafer using a polishing pad that is fixed on a polishing plate while introducing a polishing agent between the second side of the semiconductor wafer and the polishing pad, the polishing pad including fixedly bonded abrasive materials. The carrier is guided during polishing such that a portion of the second side of the semiconductor wafer temporarily projects beyond a lateral edge of a surface of the polishing pad.
    Type: Application
    Filed: October 4, 2010
    Publication date: April 28, 2011
    Applicant: Siltronic AG
    Inventors: Juergen SCHWANDNER, Thomas BUSCHHARDT, Roland KOPPERT
  • Publication number: 20110095018
    Abstract: A device for producing a silicon single crystal by remelting granules has a rotating plate of silicon having a central opening and having a silicon tubular extension which encloses the opening and extends below the plate; a first induction heating coil above the plate for melting granules; and a second induction heating coil below the plate for crystallizing the molten granules, wherein the second induction heating coil has, on its side lying opposite the silicon plate, a lower layer composed of a magnetically permeable material and an upper layer in which there is at least one cooling channel for conducting a coolant.
    Type: Application
    Filed: October 25, 2010
    Publication date: April 28, 2011
    Applicant: SILTRONIC AG
    Inventors: Wilfried von Ammon, Ludwig Altmannshofer, Andris Muiznieks
  • Publication number: 20110097975
    Abstract: A method for producing a semiconductor wafer sliced from a single crystal includes rounding an edge using a grinding disk containing abrasives with an average grain size of 20.0-60.0 ?m. A first simultaneous double-side material-removing process is performed wherein the semiconductor wafers are processed between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 5.0-20.0 ?m, wherein the semiconductor wafer is placed in a cutout in one of a plurality of carriers rotatable by a rolling apparatus such that the semiconductor wafer lies in a freely movable manner in the carrier and the wafer is movable on a cycloidal trajectory. A second simultaneous double-side material-removing process is performed including processing the semiconductor wafers between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 0.5-15.0 ?m.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 28, 2011
    Applicant: SILTRONIC AG
    Inventors: Juergen SCHWANDNER, Thomas BUSCHHARDT, Diego FEIJOO, Michael KERSTAN, Georg PIETSCH, Guenter SCHWAB
  • Publication number: 20110084366
    Abstract: The epitaxial layer defects generated from voids of a silicon substrate wafer containing added hydrogen are suppressed by a method for producing an epitaxial wafer by: growing a silicon crystal by the Czochralski method comprising adding hydrogen and nitrogen to a silicon melt and growing from the silicon melt a silicon crystal having a nitrogen concentration of from 3×1013 cm?3 to 3×1014 cm?3, preparing a silicon substrate by machining the silicon crystal, and forming an epitaxial layer at the surface of the silicon substrate.
    Type: Application
    Filed: October 1, 2010
    Publication date: April 14, 2011
    Applicant: SILTRONIC AG
    Inventors: Katsuhiko Nakai, Timo Mueller, Atsushi Ikari, Wilfried von Ammon, Martin Weber
  • Patent number: 7922813
    Abstract: Epitaxially coated silicon wafers, are produced by epitaxially coating a multiplicity of wafers polished at least on their front sides, successively and individually in an epitaxy reactor, by placing a silicon wafer on a susceptor, pretreating under a hydrogen atmosphere followed by addition of an etching medium to the hydrogen atmosphere, coating epitaxially on the polished front side and removing the water from the epitaxy reactor. The susceptor is then heated, in each case, to a temperature of at least 1000° C. under a hydrogen atmosphere, and furthermore an etching treatment of the susceptor and a momentary coating of the susceptor with silicon are effected after a specific number of epitaxial coatings. Silicon wafers characterized by a parameter R30-1 mm of ?10 nm to +10 nm, determined at a distance of 1 mm from the edge of the silicon wafer are produced.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: April 12, 2011
    Assignee: Siltronic AG
    Inventors: Reinhard Schauer, Christian Hager
  • Publication number: 20110081840
    Abstract: A method for polishing a plurality of semiconductor wafers includes providing a polishing pad containing an abrasive substance bonded in the polishing pad; providing an alkaline polishing agent at a volumetric flowrate greater than or equal to 5 liters/min.; polishing the plurality of semiconductor wafers using the polishing pad; and circulating the polishing agent in a polishing agent circuit during the polishing.
    Type: Application
    Filed: September 9, 2010
    Publication date: April 7, 2011
    Applicant: SILTRONIC AG
    Inventor: Juergen SCHWANDNER
  • Publication number: 20110081836
    Abstract: A method for processing a semiconductor wafer includes bringing at least one grinding tool in contact with the semiconductor wafer; removing material from the semiconductor wafer using the grinding tool; disposing a liquid medium having a viscosity of at least 3×10?3 N/m2·s and at most 100×10?3 N/m2·s between the at least one grinding tool and the semiconductor wafer; and separating the at least one grinding tool and the semiconductor wafer so as to end the processing.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 7, 2011
    Applicant: SILTRONIC AG
    Inventor: Juergen SCHWANDNER
  • Publication number: 20110073041
    Abstract: In a method for producing epitaxially coated semiconductor wafers, a multiplicity of prepared, front side-polished semiconductor wafers are successively coated individually with an epitaxial layer on their polished front sides at temperatures of 800-1200° C. in a reactor, while supporting the prepared semiconductor wafer over a susceptor having a gas-permeable structure, on a ring placed on the susceptor which acts as a thermal buffer between the susceptor and the supported semiconductor wafer, the semiconductor wafer resting on the ring, and its backside facing but not contacting the susceptor, so that gaseous substances are delivered from a region over the backside of the semiconductor wafer by gas diffusion through the susceptor into a region over the backside of the susceptor, the semiconductor wafer contacting the ring only in an edge region of its backside, wherein no stresses measurable by means of photoelastic stress measurement (“SIRD”) occur in the semiconductor wafer.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 31, 2011
    Applicant: SILTRONIC AG
    Inventors: Reinhard Schauer, Norbert Werner
  • Publication number: 20110039411
    Abstract: A polished semiconductor wafer of high flatness is produced by the following ordered steps: slicing a semiconductor wafer from a rod composed of semiconductor material, material-removal processing of at least one side of the semiconductor wafer, and polishing of at least one side of the semiconductor wafer, wherein the semiconductor wafer has, after the material-removing processing and before the polishing on at least one side to be polished, along its margin, a ring-shaped local elevation having a maximum height of at least 0.1 ?m, wherein the local elevation reaches its maximum height within a 10 mm wide ring lying at the edge of the semiconductor wafer.
    Type: Application
    Filed: August 4, 2010
    Publication date: February 17, 2011
    Applicant: SILTRONIC AG
    Inventors: Bertram Moeckel, Helmut Franke
  • Patent number: 7875115
    Abstract: This disclosure is aimed at providing a method for producing an epitaxial wafer allowing uniform occurrence of oxygen precipitate in a substrate plane in the radial direction in a base plate and excelling in the crystal quality of an epi-layer. A method for the production of an epitaxial wafer, characterized by using as a substrate a base plate of nitrogen- and carbon-added silicon single crystal having a nitrogen concentration of 5×1014 to 5×1015 atoms/cm3 and a carbon concentration of 1×1016 to 1×1018 atoms/cm3, having a crystal growth condition during the production of silicon single crystal in a range in which the whole surface of substrate becomes an OSF region, and being pulled at a cooling speed of not less than 4° C./minute between 1100 and 1000° C. during the growth of crystal, and depositing the silicon single crystal layer on the surface of the substrate by the epitaxial method.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: January 25, 2011
    Assignee: Siltronic AG
    Inventors: Katsuhiko Nakai, Koji Fukuhara
  • Patent number: 7867059
    Abstract: The invention relates to a process for producing a semiconductor wafer by double-side grinding of the semiconductor wafer, in which the semiconductor wafer is simultaneously ground on both sides, first by rough-grinding and then by finish-grinding, using a grinding tool. The semiconductor wafer, between the rough-grinding and the finish-grinding, remains positioned in the grinding machine, and the grinding tool continues to apply a substantially constant load during the transition from rough-grinding to finish-grinding. The invention also relates to an apparatus for carrying out the process and to a semiconductor wafer having a local flatness value on a front surface of less than 16 nm in a measurement window of 2 mm×2 mm area and of less than 40 nm in a measurement window of 10 mm×10 mm area.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: January 11, 2011
    Assignee: Siltronic AG
    Inventors: Georg Pietsch, Michael Kerstan, Werner Blaha