Abstract: Silicon wafers and a process for their manufacture wherein both slip dislocation and occurrence of warpage are suppressed include heat treatment to provide wafers having plate-shaped BMDs, a density of BMDs whose diagonal lengths are in a range of 10 nm to 120 nm, of BMDs present in the bulk of the wafer at a distance of 50 ?m or more is 1×1011/cm3 or more, and the density of BMDs whose diagonal lengths are 750 nm or more in the wafer bulk is 1×107/cm3 or less, and the interstitial oxygen concentration is 5×1017 atoms/cm3 or less. The process involves low and high temperature heat treating at under defined temperature ramping rates.

Abstract: An epitaxially coated silicon wafer comprises a plane surface misoriented relative to a {110} crystal plane, wherein the <110> direction of the single silicon crystal is tilted away by the angle ? from the normal to the wafer surface and the projection of the tilted <110> direction forms an angle ? with the direction <?110> in the wafer, and ? is given by 0???3° and 45°???90°, as well as for all symmetrically equivalent directions.

Abstract: Silicon wafers having an oxygen concentration of 5·1017 to 7.5·1017 cm?3 have the following BMD densities after the following thermal processes, carried out alternatively: a BMD density of at most 1·108 cm?3 after a treatment for three hours at 780° C. and subsequently for 16 hours at 1000° C., and a BMD density of at least 1·109 cm?3 after heating of the silicon wafer at a heating rate of 1 K/min from a start temperature of 500° C. to a target temperature of 1000° C. and subsequent holding at 1000° C. for 16 hours. The wafers are prepared by a method of irradiation of a heated wafer with flashlamp which delivers energy which is from 50 to 100% of the energy density necessary for melting the wafer surface.

Abstract: Simultaneous double-side grinding of a plurality of semiconductor wafers involves positioning each wafer freely in a cutout of one of plural carriers which rotate on a cycloidal trajectory, wherein the wafers are machined between two rotating ring-shaped working disks, each disk having a working layer of bonded abrasive, wherein the form of the working gap between working layers is determined during grinding and the form of the working area of at least one disk is altered such that the gap has a predetermined form. The wafers, during machining, may temporarily overhang the gap. The carrier is optionally composed only of a first material, or is completely or partly coated with the first material such that during machining only the first material contacts the working layer, and the first material does not reduce the machining ability of the working layer.

Abstract: A multilayer semiconductor wafer has a substrate wafer having a first side and a second side; a fully or partially relaxed heteroepitaxial layer deposited on the first side of the substrate wafer; and a stress compensating layer deposited on the second side of the substrate wafer. The multilayer semiconductor wafer is produced by a method including depositing on a first side of a substrate a fully or partially relaxed heteroepitaxial layer at a deposition temperature; and at the same temperature or before significantly cooling the wafer from the deposition temperature, providing a stress compensating layer on a second side of the substrate.

Abstract: A silicon wafer contains: a silicon substrate; a first epitaxial layer on the silicon wafer, wherein the absolute value of the difference between donor and acceptor concentrations is ?1×1018 atoms/cm3; a second epitaxial layer above the first epitaxial layer, whose conductivity type is the same as the first epitaxial layer, wherein the absolute value of the difference between donor and acceptor concentrations is ?5×1017 atoms/cm3; wherein, by doping a lattice constant adjusting material into the first epitaxial layer, the variation amount ((a1-aSi)/aSi) of the lattice constant of the first epitaxial layer (a1) relative to the lattice constant of the silicon single crystal (aSi) as well as the variation amount ((a2-aSi)/aSi) of the lattice constant of the second epitaxial layer (a2) relative to the lattice constant of the silicon single crystal (aSi) are controlled to less than the critical lattice mismatch.

Abstract: Silicon single crystals having suppressed deformation and dislocations and the successful omission of the tail section are produced by growing the straight-body section of the silicon single crystal under the influence of a horizontal magnetic field with a magnetic flux density at its magnetic center being ?1000 Gauss, and ?2000 Gauss, reducing the lifting speed of the silicon single crystal relative to the surface of the melt to 0 mm/minute, maintaining a static state until there is a decrease in the apparent weight of the silicon single crystal, then further maintaining the static state so that the entire growth front of the silicon single crystal forms a convex shape protruding in a direction opposite to the lifting direction of the silicon single crystal, and separating the silicon single crystal from the melt.

Abstract: A method for trimming two working layers including bonded abrasive applied on mutually facing sides of an upper and a lower working disk of a grinding apparatus configured for simultaneous double-side processing of flat workpiece includes providing the grinding apparatus including the upper and lower working disks and providing at least one carrier including an outer toothing. The upper and lower working disks are rotated. The carrier is moved between the rotating working disks using a rolling apparatus and the outer toothing on cycloidal paths relative to working layers of the working disks. Loose abrasives are added to a working gap formed between the working layers. A carrier, without workpieces inserted therein, is moved in the working gap so as to effect material removal from the working layers.

Abstract: The edges of semiconductor wafers are examined by an imaging method and the positions and forms of defects on the edge are determined, and in addition, a ring-shaped region on the flat area of the semiconductor wafer, the outer margin of which is ?10 mm from the edge, is examined by means of photoelastic stress measurement and the positions of stressed regions in the ring-shaped region are determined, wherein the positions of the defects and the positions of the stressed regions are compared with one another, and the defects are classified in classes on the basis of their form and the results of the photoelastic stress measurement.

Abstract: A method for producing a wafer with a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front side, the method using steps in the following order: simultaneously polishing the front and the back side of the silicon single crystal substrate; depositing a stress compensating layer on the back side of the silicon single crystal substrate; polishing the front side of the silicon single crystal substrate; cleaning the silicon single crystal substrate having the stress compensating layer deposited on the back side; and depositing a fully or partially relaxed layer of SiGe on the front side of the silicon single crystal substrate.

Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.

Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.

Abstract: Silicon carbide substrate wafers are prepared by transferring a monocrystalline silicon layer from a donor wafer onto a handle wafer, the silicon layer being implanted with carbon and annealed to form a monocrystalline SiC layer prior to or after transfer of the silicon layer.

Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.

Abstract: Silicon semiconductor wafers are produced by pulling a single crystal at a seed crystal from a melt heated in a crucible; supplying heat to the center of the crucible bottom with a heating power which, in the course of the growth of a cylindrical section of the single crystal, is increased at least once to not less than 2 kW and is then decreased again; and slicing semiconductor wafers from the pulled single crystal.

Abstract: A method for the wet-chemical treatment of a semiconductor wafer involves: a) rotating a semiconductor wafer; b) applying a cleaning liquid comprising gas bubbles having a diameter of 100 ?m or less to the rotating wafer such that a liquid film forms on the wafer; c) exposing the rotating semiconductor wafer to a gas atmosphere containing a reactive gas; and d) removing the liquid film from the wafer.

Abstract: A method for producing a plurality of semiconductor wafers includes processing a single crystal. The single crystal is provided in a grown state and has a central longitudinal axis with an orientation that deviates from a sought orientation of a crystal lattice of the semiconductor wafers. A block is sliced from the single crystal along cutting planes perpendicular to a crystallographic axis corresponding to the sought orientation of the crystal lattice of the semiconductor wafers. A lateral surface of the block is ground around the crystallographic axis. A plurality of semiconductor wafers are then sliced from the ground block along cutting planes perpendicular to the crystallographic axis.

Abstract: A cleaning liquid for an electronic material, in particular, a silicon wafer, uses ultra-pure water or hydrogen water as raw material water, and performs cleaning in combination with ultrasonic irradiation under the presence of hydrogen micro-bubbles. The method enables efficient cleaning and removal of particle components and the like on the wafer surface and prevention of re-contamination.

Abstract: Hetero-semiconductor structures possessing an SOI structure containing a silicon-germanium mixed crystal are produced at a low cost and high productivity. The semiconductor substrates comprise a first layer formed of silicon having germanium added thereto, a second layer formed of an oxide and adjoined to the first layer, and a third layer derived from the same source as the first layer, but having an enriched content of germanium as a result of thermal oxidation and thinning of the third layer.

Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.