Abstract: Disclosed herein are circuits, devices and methods that address challenges associated with power amplifier systems. A power amplifier system includes two or more fast error amplifiers coupled to corresponding power amplifiers. The fast error amplifiers are configured to generate envelope tracking signals based on a signal envelope, the envelope tracking signals modifying a DC-DC regulated voltage from a DC-DC converter to more efficiently operate the power amplifiers. By splitting the envelope tracking between two or more fast error amplifiers and amplification between corresponding two or more power amplifiers, the power, frequency or bandwidth, linearity, signal-to-noise ratio, efficiency, or the like of the power amplifier system can be improved. Wireless communications configurations with such power amplifier systems can provide uplink carrier aggregation and/or cellular signals based on standards and protocols that require increased bandwidth and/or power.

Abstract: According to certain aspects, a radio-frequency module can include a packaging substrate configured to receive a plurality of components and a voltage converter implemented on the packaging substrate. The voltage converter can include a high-side switch circuit block comprising a plurality of high-side switching elements and a low-side switch circuit block comprising a plurality of low-side switching elements. The voltage converter may include an intermediate node coupled to one or more high-side switching elements and coupled to one or more low-side switching elements. The voltage converter may further include a segmentation circuit block communicatively coupled to the high-side switch circuit block and communicatively coupled to the low-side switch circuit block.

Abstract: Doherty amplifier having envelope control. In some embodiments, an amplifier system can include a Doherty amplifier having a carrier amplifier and a peaking amplifier, with each of the carrier amplifier and the peaking amplifier including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the Doherty amplifier and configured to provide a bias signal to the output transistor of the cascode stage of the peaking amplifier.

Abstract: Described herein are variable-gain amplifier configurations that include a multi-input gain stage, a cascode buffer, and a bypass block. Degeneration switching blocks can be used for the entire multi-input gain stage or for individual input nodes of the multi-input gain stage. This advantageously reduces or eliminates performance penalties in one or more gain modes. The variable impedances can be configured to improve linearity of the amplification process in targeted gain modes. The variable gain amplifier can be configured to provide a low-loss bypass mode in a low gain mode to improve signal quality.

Abstract: Quadrature amplifier having envelope control. In some embodiments, an amplifier system can include a quadrature amplifier having first and second amplifiers configured to amplify first and second signals in quadrature relative to each other, with each of the first and second amplifiers including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the quadrature amplifier and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers.

Abstract: Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using a amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. The attenuation can be tailored for individual inputs and can depend on a gain mode of the amplifier.

Abstract: Sputtering systems and methods for packaging applications. In some embodiments, a method for processing a plurality of packaged devices can include forming or providing a first assembly having a stencil and a two-sided adhesive member attached to a first side of the stencil, with the stencil having a plurality of openings, and the two-sided adhesive member having a plurality of openings corresponding to the openings of the stencil. The method can further include attaching the first assembly to a ring to provide a second assembly, with the ring being dimensioned to facilitate a deposition process. The method can further include loading a plurality of packaged devices onto the second assembly such that each packaged device is held by the two-sided adhesive member of the first assembly and a portion of each packaged device extends into the corresponding opening of the two-sided adhesive member.

Abstract: Solder bumps are placed in direct contact with the silicon substrate of an amplifier integrated circuit having a flip chip configuration. A plurality of amplifier transistor arrays generate waste heat that promotes thermal run away of the amplifier if not directed out of the integrated circuit. The waste heat flows through the thermally conductive silicon substrate and out the solder bump to a heat-sinking plane of an interposer connected to the amplifier integrated circuit via the solder bumps.

Abstract: Amplifiers for radio-frequency applications. In some embodiments, a power amplifier die can include a semiconductor substrate and a plurality of narrow band power amplifiers implemented on the semiconductor substrate. Each narrow band power amplifier can be configured to operate with a high voltage in an average power tracking mode and be capable of being coupled to an output filter associated with a respective individual frequency band. Each narrow band power amplifier can be sized smaller than a wide band power amplifier configured to operate with more than one of the frequency bands associated with the plurality of narrow band power amplifiers.

Abstract: A high-voltage power amplification system can include a supply circuit configured to provide a high supply voltage in an average power tracking mode. The power amplification system can further include a power amplifier configured to operate with the high supply voltage and provide an impedance that substantially matches an impedance of a component coupled to an output of the power amplifier. The power amplification system can further include a signal path configured to route an amplified signal from the output of the power amplifier to the component, with the output path being substantially free of an output matching network.

Abstract: Phase control for carrier aggregation. In some embodiments, a carrier aggregation circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The circuit can further include a first path implemented between the first filter and a common node, with the first path being configured to provide a substantially matched impedance for the first frequency band and a substantially open-circuit impedance for the second frequency band. The circuit can further include a second path implemented between the second filter and the common node, with the second path being configured to provide a substantially matched impedance for the second frequency band and a substantially open-circuit impedance for the first frequency band.

Abstract: Embodiments of synthetic garnet materials having advantageous properties, especially for below resonance frequency applications, are disclosed herein. In particular, embodiments of the synthetic garnet materials can have high Curie temperatures and dielectric constants while maintaining low magnetization. These materials can be incorporated into isolators and circulators, such as for use in telecommunication base stations.

Abstract: Aspects of this disclosure relate to an elastic wave device. The elastic wave device includes a sub-wavelength thick piezoelectric layer, an interdigital transducer electrode on the piezoelectric layer, and a high velocity layer configured to inhibit an elastic wave from leaking from the piezoelectric layer at anti-resonance.

Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed for particular gain modes to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores when switching gain modes to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a high gain amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity (e.g., for lower gain modes). The disclosed signal amplifiers have a first active core with amplification chains for each of a plurality of inputs and a second active core with a single amplification chain to amplify signals received at the plurality of inputs.

Abstract: Power amplifiers having reduced loss. In some embodiments, a power amplification system can include a plurality of power amplifiers, with each power amplifier being configured to receive and amplify a signal in a frequency band. The power amplification system can further include an output filter coupled to each of the power amplifiers by a separate output path such that the power amplification system is substantially free of a band selection switch between the plurality of power amplifiers and their corresponding output filters. Each power amplifier can be further configured to operate with a high-voltage supply to provide an impedance similar to an impedance of the corresponding output filter.

Abstract: A power splitter that amplifies an input radio-frequency (RF) signal. The power splitter uses a single transistor in a common emitter stage of a cascode amplifier and two or more common base stages of the cascode amplifier to amplify and to split the input RF signal. A common base biasing signal can be used to simultaneously enable two or more of the common base stages to generate two or more amplified RF output signals.

Abstract: Aspects of this disclosure relate to a band pass filter that includes LC resonant circuits coupled to each other by a capacitor. A bridge capacitor can be in parallel with series capacitors, in which the series capacitors include the capacitor coupled between the LC resonant circuits. The bridge capacitor can create a transmission zero at a frequency below the passband of the band pass filter. The LC resonant circuits can each include a surface mount capacitor and a conductive trace of the substrate, and an integrated passive device die can include the capacitor. Band pass filters disclosed herein can be relatively compact, provide relatively good out-of-band rejection, and relatively low loss.

Abstract: A radio frequency front end system can include a first module configured to provide multi-input multi-output (MIMO) receive operations for a first plurality of mid bands and a first plurality of high bands. The first module can be further configured to provide transmit operations for the plurality of mid bands. The first module can include a first node. The radio frequency front end system can include a second module configured to provide transmit and receive operations for a second plurality of mid bands and a second plurality of high bands. The second module can be a power amplifier integrated duplexer (PAiD) module. The second module can include a second node. The first module and the second module can be coupled by a signal path at the first node and the second node, respectively.

Abstract: Systems and methods related to linear load modulated power amplifiers. A power amplifier (PA) system can include a divider that splits a signal into two portions, a first portion directed to an attenuator that attenuates the first portion so that the first portion and the second portion have different powers and a second portion directed to a phase shift component that shifts a phase of the second portion so that the first portion and the second portion have different phases. The PA system can also include a Doherty amplifier circuit where a carrier amplifier amplifies the attenuated first portion and a peaking amplifier amplifies the phase-shifted second portion. The carrier amplifier includes a Class AB driver stage and a Class B output. The peaking amplifier includes a Class B driver stage a Class B output stage.

Abstract: Described herein methods of manufacturing dual-sided packaged electronic modules that control the distribution of an under-fill material between one or more components and a packaging substrate. The disclosed technologies include under-filling one or more components and deflashing a portion of the under-fill to remove under-fill material prior to attaching solder balls. The deflashing step removes a thin layer of under-fill material that may have coated contact pads for the ball grid array. Because the solder balls are not present during under-fill, there is little capillary action drawing material away from the components being under-filled. This can reduce the frequency of voids under the components being under-filled. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using under-fill deflash prior to attaching solder balls of the ball grid array.