Abstract: Systems and method related to switchable output stages in power amplifiers. In some embodiments, a power amplifier (PA) circuit can include a driver stage configured to amplify a radio-frequency (RF) signal. The PA circuit can further include a plurality of output stages, with each output stage being configured to be capable of further amplification the RF signal. The PA circuit can further include a switch implemented to route the amplified RF signal from the driver stage to a selected one of the plurality of output stages, such that the selected output stage further amplifies the amplified RF signal.

Abstract: Disclosed are embodiments of ceramic radiofrequency filters advantageous as RF components. The ceramic filters can include a ceramic stepped impedance resonator, wherein the inner diameter of the ceramic stepped impedance resonator can vary from one end to another end. The inner diameter can be, for example, tapered, sectioned, or stair-stepped in order to provide different impedances in the ceramic resonator.

Abstract: Radio-frequency (RF) switch circuits having switchable transistor coupling for improved switching performance. An RF switch system includes at least one field-effect transistor (FET) disposed between first and second nodes, each FET having a gate and body. A switchable resistive coupling circuit is connected to each of the respective gates. A switchable resistive grounding circuit is connected to each of the respective bodies. The RF switch system also includes a compensation circuit to compensate a non-linearity effect generated by at least one of the field-effect transistors.

Abstract: Disclosed are embodiments of isolator/circulator junctions that can be used for radio-frequency (RF) applications, and methods of manufacturing the junctions. The junctions can have excellent impedance matching, even as they are being miniaturized, providing significant advantages over previously used junctions. The junctions can be formed of both high and low dielectric constant material.

Abstract: A Doherty power amplifier includes a carrier amplifier, a peaking amplifier, and a peaking amplifier bias circuit coupled to the peaking amplifier and configured to provide a peaking amplifier bias signal to the peaking amplifier based on a saturation level of the carrier amplifier.

Abstract: Devices and methods are disclosed, related to high power diode switches. In some embodiments, a radio-frequency switch circuit can include a first switchable path implemented between a pole and a first throw, the first switchable path including one or more PIN diodes, and a second switchable path implemented between the pole and a second throw, the second switchable path including one or more PIN diodes. The radio-frequency switch circuit can further include a switchable shunt path implemented between the second throw and a ground, the switchable shunt path including at least one shunt PIN diode and a capacitance between the second throw and the at least one shunt PIN diode. The pole can be an antenna port, and the first and second throws can be transmit and receive ports, respectively.

Abstract: Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.

Abstract: Embodiments disclosed herein relate to a bias circuit that uses Schottky diodes. Typically, a bias circuit will include a number of transistors used to generate a bias voltage or a bias current for a power amplifier. Many wireless devices include power amplifiers to facilitate processing signals for transmission and/or received signals. By substituting the bias circuit design with a design that utilizes Schottky diodes, the required battery voltage of the bias circuit may be reduced enabling the use of lower voltage power supplies.

Abstract: Fabricating a radio-frequency switching circuit involves providing a substrate, forming, on the substrate, one or more field-effect transistors connected in series to define a radio-frequency signal path between an input end and an output end, each field-effect transistor having a source, a drain, a gate node, and a body node, and forming an element coupled to a selected body node of the one or more field-effect transistors connected in series to thereby provide reduced voltage distribution variation across the switching circuit.

Abstract: Doherty power amplifier having reduced size. In some embodiments, a power amplification system can include a supply system configured to provide a high-voltage supply signal, and a Doherty power amplifier configured to receive the high-voltage supply signal and amplify a radio-frequency (RF) signal. The power amplification system can further include an output path configured to receive and route the amplified RF signal to a filter. The output path can be substantially free of an impedance transformation circuit.

Abstract: Circuits, devices and methods for achieving small duty cycles in switching regulators. In some embodiments, a method for generating a low duty cycle output voltage can include setting a ramp signal to a first level substantially with a first edge of a clock signal, and ramping the ramp signal from the first level towards a second level such that voltage level of the ramp signal crosses a compensation level, with the ramping beginning at a time before a second edge of the clock signal. The method can further include starting an output pulse substantially with the second edge of the clock signal, and ending the output pulse substantially with an edge of a pulse-width modulation (PWM) signal that results from the ramp signal crossing the compensation level during the ramping.

Abstract: A packaged module for use in a wireless communication device has a substrate supporting an integrated circuit die that includes at least a microprocessor and radio frequency receiver circuitry and a stacked filter assembly configured as a filter circuit that is in communication with the radio frequency receiver circuitry. The stacked filter assembly includes a plurality of passive components, where each passive component is packaged as a surface mount device. At least one passive component is in direct communication with the substrate and at least another passive component is supported above the substrate by the at least one passive component that is in the direct communication with the substrate.

Abstract: In a preferred embodiment, the gain expansion in low power mode of a single chain PA is minimized by dynamically adjusting the output impedance of the bias circuit of each gain stage for each mode of operation. Instead of switching in a series attenuator or switching in additional feedback in the first gain stage of a single-chain PA to limit the gain at the increased quiescent current level, this embodiment achieves linear performance by adjusting the quiescent current in each stage to the minimum level that meets the target gain and then increasing the output resistance of the bias circuit of each gain stage in low power mode (LPM) to provide the appropriate level of negative feedback at the base of each amplifying HBT to linearize the gain versus power response.

Abstract: A voltage converter can be switched among two or more modes to produce an output voltage tracking a reference voltage that can be of an intermediate level between discrete levels corresponding to the modes. One or more voltages generated from a power supply voltage, such as a battery voltage, can be compared with the reference voltage to determine whether to adjust the mode. The reference voltage can be independent of the power supply voltage. Further, the voltage converter may implement frequency modulation and a pulse skipping mode to improve the efficiency of switching operational states of the voltage converter.

Abstract: An amplifier architecture can include an input circuit for splitting a signal into first and second portions, and carrier and peaking amplification paths for receiving the first and second portions. The architecture can further include an output circuit having a balun transformer circuit with first and second coils, with the first coil between first and second ports, the second coil between third and fourth ports, the first and third ports coupled by a first capacitance, and the second and fourth ports coupled by a second capacitance. The first port can receive a first signal from the carrier amplification path, and the fourth port can receive a second signal from the peaking amplification path. The second port can provide a combination of the first signal and the second signal as an amplified signal. A termination circuit can be provided to couple the third port to a ground.

Abstract: A zero insertion loss directional coupler includes an input port, an antenna port, an isolation port, and a detect port. The coupler has a first signal trace, a second signal trace, and an inductive winding. The first signal trace is on one of two layers and is connected to the input port and the antenna port, while the inductive winding is on another one of the two layers. A first terminal of the inductive winding is connected to the isolation port. A first terminal of the second signal trace is connected to the detect port and a second terminal of the second signal trace is connected to a second terminal of the inductive winding.

Abstract: Methods for plasma etching are disclosed. In one embodiment, a method of etching a plurality of features on a wafer includes positioning a wafer on a feature plate within a chamber of a plasma etcher, providing a plasma source gas within the chamber, providing an anode above the feature plate and a cathode below the feature plate, connecting a portion of the cathode to the feature plate, generating plasma ions using a radio frequency power source and the plasma source gas, directing the plasma ions toward the wafer using an electric field, and providing an electrode shield around the cathode. The electrode shield is configured to protect the cathode from ions directed toward the cathode including the portion of the cathode connected to the feature plate.

Abstract: According to some implementations, a power amplifier (PA) includes a common emitter configured to receive a radio-frequency (RF) signal. The PA also includes a carrier amplifier coupled to the common emitter to form a carrier cascode configuration, a collector of the carrier amplifier provided with a first supply voltage. The PA further includes a peaking amplifier coupled to the common emitter to form a peaking cascode configuration, a collector of the peaking amplifier provided with a second supply voltage greater than the first supply voltage.

Abstract: Aspects of this disclosure relate to a cascode circuit electrically coupled between an amplifier configured to amplify a radio frequency (RF) signal and different loads. The cascode circuit can function as a switch to selectively provide an output from the amplifier to a number of different loads. In certain embodiments, the cascode circuit can be electrically coupled between different stages of a multi-stage power amplifier. For instance, the amplifier can be a first stage of the multi-stage power amplifier and the different loads can include different power amplifier transistors of a second stage of the multi-stage amplifier. The cascode circuit can be implemented by bipolar transistors according to certain embodiments.

Abstract: Circuits, devices and methods are disclosed, including a phase shifter configured to provide a bypass state, a single first-handed quarter-wave state, a double first-handed quarter-wave state, or a single second-handed quarter-wave state utilizing two or less inductors. In some implementations, a phase shifter is disclosed to provide a first node and a second node, a first switchable path having a first inductance and a second inductance arranged in series between the first and second nodes, a capacitive grounding path implemented on each side of each of the first and second inductances, at least one of the capacitive grounding paths configured as a switchable capacitive grounding path, and a reconfiguring circuit assembly configured to allow the phase shifter to provide a plurality of quadrant phase shifts utilizing the first and second inductances and the at least one switchable capacitive grounding path.