Abstract: A circuit for converting a differential signal into a nondifferential signal comprising first and second inputs respectively receiving first and second components of a differential signal. The circuit comprises a single bipolar transistor having an emitter, a base and a collector. The transistor is biased so as to allow flowing of an emitter d.-c. bias current sufficient to allow a linear conversion of a differential RF signal, for example. Both components of the differential RF signal are respectively injected into the emitter and the base of the bipolar transistor so that a remarkably linear conversion is carried out by means of a very simple circuit. The circuit is particularly adapted to the realization of an integrated RF transmission chain.
Type:
Grant
Filed:
March 11, 2005
Date of Patent:
April 28, 2009
Assignee:
STMicroelectronics S.A.
Inventors:
Fabien Pousset, Jean-Charles Grasset, Philippe Cathelin
Abstract: In a multi-carrier system employing OFDM, for example DMT, an adaptive channel equalizer is normally used, operating in the frequency domain. The sampling clock is controlled so that the time delay between the transmitter and the receiver is effectively eliminated. If the information used to control the sampling clock is received from the equalized data stream, it will introduce an ambiguity between the operation of the channel equalizer and the mechanism used to control the sampling clock. Operation of the equalizer can mask an increasing time difference, between transmitter and receiver, which the sample clock controller should be tracking. The present invention eliminates the ambiguities in the operation of the equalizer and sample clock controller by preventing the equalizer accepting time differences which should be corrected by operation of the sample clock controller.
Type:
Grant
Filed:
May 17, 2006
Date of Patent:
April 28, 2009
Assignee:
STMicroelectronics S.A.
Inventors:
Magnus Johansson, Lennart Olsson, Gunnar Bahlenberg, Daniel Bengtsson, Mikael R. Isakssaon, Sven-Rune Olofsson, Sven Göeran Öekvist
Abstract: Process for configuring an xDSL-type symmetric modem, comprising the following: detecting a predetermined criterion corresponding to an asymmetric operating mode, in particular an ADSL-type; and in response to said detection, disabling a number of carriers in order to establish an asymmetric operating mode. More specifically, the modem is VDSL-type, operating with up to 4096 carriers and being reconfigurable in ADSL mode with a number of carriers reduced to 256. In one case, said criterion is the detection of signals as defined in recommendation G.994.1 of the International Telecommunications Union of (ITU). Alternatively, mode switching could be controlled based on measurement of the size of the line.
Abstract: A method and a circuit for controlling a triac intended to be series-connected with a resistive element of positive temperature coefficient or which is at least capacitive, and a winding for starting an asynchronous motor, for supply by an A.C. voltage, the present invention including the steps of: detecting a voltage representative of the voltage across the series connection of the element and of the triac; comparing this detected voltage with respect to a threshold; and blocking a turning back on of the triac when the threshold has been exceeded.
Abstract: The modification of the impedance ratio of a balun of four conductive windings formed in two metallization planes stacked by being interdigited and electrically in series two by two, by connecting a capacitor in series with the two windings defining the common mode of the balun.
Abstract: An electronic circuit, including; a logic circuit having a plurality of logic cells; storage cells able to form a shift register, able to be connected to the logic cells; a connecting control module having an input for the reception of an identification key, the module connecting the storage cells so as to form a test shift register when the receive input receives a valid identification key, and the module connecting the storage cells so as to form randomly a diversion circuit when the input does not receive a valid identification key. The invention allows the electronic circuit to be protected against fraudulent access in read or write mode. The invention also relates to a smart card including this electronic circuit.
Abstract: A vertical diode of low capacitance formed in a front surface of a semiconductor substrate, including a first area protruding from the substrate surface including at least one doped semiconductor layer of a conductivity type opposite to that of the substrate, the upper surface of the semiconductor layer supporting a first welding ball. The diode includes a second area including on the substrate a thick conductive track supporting at least two second welding balls, said first and second welding balls defining a plane parallel to the substrate plane.
Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.
Abstract: A thin soft magnetic film combines a high magnetization with an insulating character. The film is formed by nitriding Fe-rich ferromagnetic nanograins immersed in an amorphous substrate. A selective oxidation of the amorphous substrate is then performed. The result is a thin, insulating, soft magnetic film of high magnetization. Many types of integrated circuits can be made which include a component using a membrane incorporating the above-mentioned thin film.
Type:
Grant
Filed:
July 25, 2005
Date of Patent:
March 17, 2009
Assignees:
STMicroelectronics S.A., Commissariat a L'Energie Atomique
Inventors:
Guillaume Bouche, Pascal Ancey, Bernard Viala, Sandrine Couderc
Abstract: A device for protecting a circuit against a polarity reversal of a connection to a D.C. power supply, comprising a controllable switch interposed on said connection between a first terminal of a first voltage of the D.C. power supply and a first terminal of the circuit, and first means for turning-off with a delay the switch in the presence of a reverse polarity.
Abstract: An optical semiconductor package includes a support with a passage to receive a ring holding a lens situated facing an optical sensor. The support has, in the passage, at least one local release recess and the ring is equipped peripherally with a locally projecting, elastically deformable element. The local release recess and the elastically deformable element are such that, when the ring occupies an angular mounting position, the locally projecting elastically deformable element is engaged in the local recess of the support and, when the ring is pivoted from the aforementioned angular mounting position, the locally projecting elastically deformable element is moved out of the recess of the support and is compressed against the wall of the passage in order to secure the ring relative to the support.
Abstract: A frequency shift of a carrier frequency of an input signal is estimated with a frequency estimator in order to obtain an estimate value. Then, the estimate of the frequency shift is refined, and the carrier frequency is corrected in consequence, with a phase-locked loop that is initialized with the estimate value. The phase-locked loop has a locking frequency range that is narrower than a locking frequency range of the frequency estimator.
Abstract: A non-volatile memory element includes a transistor for selecting the element and a capacitor for recording a binary value by electrical breakdown of an insulating layer (13) of the capacitor. A structure of the memory element is modified in order to allow a higher degree of integration of the element within an electronic circuit of the MOS type. In addition, the memory element is made more robust with respect to a high electrical voltage (VDD) used for recording the binary value. The transistor includes a drain in the substrate with electric field drift in a longitudinal direction extending towards the capacitor. The electric field drift region for the drain includes a first extension underneath the gate of the transistor opposite the source and a second extension underneath the insulating layer of the capacitor. Doping of the substrate for the electric field drift region is limited to a region substantially corresponding to a distance between the gate and an electrode of the capacitor.
Type:
Grant
Filed:
November 15, 2006
Date of Patent:
March 17, 2009
Assignees:
STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
Inventors:
Philippe Candelier, Thierry Devoivre, Emmanuel Josse, Sébastien Lefebvre
Abstract: A method for protecting a state machine having an operation modeled by a set of states linked to each other by transitions, the state machine evaluating output signals upon each transition during an evaluation phase according to input signals comprising signals evaluated during a previous transition, the method comprising steps of determining a minimum duration of each evaluation phase according to a minimum duration to evaluate the output signals according to the input signals, and of adjusting the duration of each evaluation phase.
Abstract: A passive contactless integrated circuit includes an electrically programmable non-volatile data memory (MEM), a charge accumulation booster circuit for supplying a high voltage necessary for writing data in the memory. The integrated circuit includes a volatile memory point for memorizing an indicator flag, and circuitry for modifying the value of the indicator flag when the high voltage reaches a critical threshold for the first time after activating the booster circuit.
Type:
Application
Filed:
March 6, 2008
Publication date:
March 12, 2009
Applicant:
STMicroelectronics S.A.
Inventors:
David Naura, Christophe Moreaux, Ahmed Kari, Pierre Rizzo
Abstract: A circuit for providing an A.C. signal including a number N of nanomagnetic oscillators, N being an integer greater than or equal to 2, each nanomagnetic oscillator providing a periodic signal; a unit for providing a control signal that can take N values, each periodic signal being associated with one of the values of the control signal; and a multiplexer receiving the N periodic signals and the control signal and providing the A.C. signal equal to one of the periodic signals according to the value of the control signal.
Abstract: A spiral structure having at least one planar winding in at least one first conductive level to form at least one inductive element, wherein the winding is surrounded with a conductive plane and at least one track is formed in a second conductive level and has two ends connected by conductive vias to the plane of the first level, at diametrically opposite positions with respect to the center of the winding.
Abstract: An integrated circuit chip has a dielectric surface layer and, below this layer, internal pads. The chip is fabricated by producing multiplicities of vias made of an electrically conducting material which pass through said surface layer and are positioned respectively above the internal pads. Projecting external contact pads are formed on the surface layer and connected respectively to the multiplicities of vias.
Abstract: A system is provided for modeling an integrated circuit including at least one insulated-gate field-effect transistor. The system includes generator means for defining a parameter representing mechanical stresses applied to the active area of the transistor, and processing means for determining at least one of the electrical parameters of the transistor based at least partially on the stress parameter. Also provided is a method of modeling an integrated circuit including at least one insulated-gate field-effect transistor, and a method of producing an integrated circuit including at least one insulated-gate field-effect transistor.
Abstract: A frequency-shift modulation device includes an oscillating circuit, a phase-locked loop and a digital frequency modulation circuit. The oscillating circuit is connected to the phase-locked loop in order to produce a fixed-frequency clock signal. This clock signal is used for timing the frequency modulation circuit. A standard model crystal oscillator can be used in the oscillating circuit, given that the RF frequency of a wireless transmission signal which is produced by the modulation device is determined digitally.