Abstract: A process for realizing a positive electrode of a lithium-ion battery utilizes deposition by cathode sputtering in several steps. Two successive deposition steps are separated by a cooling of the electrode during its realization, a first intermediate step of sputtering the target without introducing oxygen, and a second intermediate step of sputtering the target while introducing oxygen. The electrode obtained is of amorphous vanadium oxide and exhibits good capacity and reversibility.

Abstract: A power management unit for a battery-operated electronic device having a bus interface for the interconnection with another electronic device, the power management unit including an electric energy storage element coupled between a battery of the battery-operated electronic device and a voltage supply line of the bus interface, the electric energy storage element being operable to charge/discharge electric energy; a drive circuitry arranged to control a charge/discharge of the electric energy storage element. The drive circuitry is operable to cause an electric power supplied by the other electronic device through the voltage supply line to re-charge the battery; or, in case the other electronic device does not supply electric power, cause the battery supply electric power to the other electronic device through the voltage supply line. The power management unit is particularly adapted for battery-operated, mobile USB OTG devices.

Abstract: A head of a cavity exploration device, with an integrated circuit support which has first and second surfaces and a plurality of through-holes associated with corresponding first and second conducting pads positioned on the respective first and second surfaces of the integrated circuit support, a respective conducting micro-cable is placed in the through-hole, with this micro-cable having a portion which is uninsulated for a length greater than or equal to the thickness of the support. The micro-cable is soldered to the associated first and second conducting pads. Next the micro-cable is glued to the first and second associated conducting pads. The micro-cable is molded in first and second resin layers onto the respective first and second conducting pads, with the resin layers covering the uninsulated portion of the micro-cable.

Abstract: Receiving circuitry having a plurality of amplifiers coupled in series, a first of the amplifiers receiving an input signal and each of the amplifiers outputting an amplified signal; a plurality of comparators each coupled to the output of one of the amplifiers and having an input for receiving the amplified signal; signal identification circuitry coupled to the outputs of the comparators and arranged to determine whether the outputs of the comparators validly represent data; and signal selection circuitry arranged to select the best signal originating from the comparators based on the validity of the outputs of the comparators.

Abstract: An integrated circuit includes at least one photodiode associated with a transfer transistor. The photodiode is formed with an upper pn junction. The transfer transistor includes a lateral spacer located on a side facing the photodiode. An upper layer of the upper pn junction includes a lateral surface extension lying beneath the spacer. A lower layer of the upper pn junction forms a source/drain region for the transfer transistor. An edge of the lateral surface extension lying beneath the spacer and adjacent a gate of the transfer transistor contacts a substrate of the integrated circuit. An oxide layer insulating the gate from the underlying substrate does not overlie the lateral surface extension of the upper layer underneath of the lateral spacer.

Abstract: A low to high voltage level converter includes first and second n-channel transistors arranged to force to the ground voltage a first connection node and a second connection node, respectively. A boosting circuit operates to boost an input voltage of at least one of a first and second control nodes for the first and second n-channel transistors above a low voltage level. The converter further includes first and second cross-coupled p-channel transistors arranged to force to the high voltage level the first connection node and the second connection node, respectively. A digital output signal is taken from one of the first and second connection nodes.

Abstract: A method and a system for blocking an integrated circuit after detection of an attempt of unauthorized access to information that it contains, in which a first program of generation of a second program to be executed in a random access memory of the integrated circuit is executed, the second program including several instruction sequences and each sequence ending with a branching to another sequence; and the second program is executed.

Abstract: Circuitry for providing an output video signal from a portable device to an external display, the circuitry including a processor block with an image processor, and a video encoder block with a video encoder for providing the output video signal to the external display, the processor block and the video encoder block being connected to each other by a serial interface arranged to provide image date from the processor block to the video encoder, the serial interface having at least one data lane and at least one first clock lane, wherein the video encoder block includes a first input connected to the at least one data lane for receiving image data and a second input connected to the at least one first clock lane for receiving a first clock signal, and wherein at least one of the video encoder block and the processor block has a third input arranged to receive a control signal for controlling data flow over the serial interface.

Abstract: A method for recording at least one information block in a first volatile memory external to a circuit, a first digital signature being calculated based on information and data internal to the circuit and a second digital signature being calculated based on first signatures of a group of information blocks and on a digital quantity internal to the circuit and assigned to said group. A method for checking the content of an information block recorded by this recording method.

Abstract: An electrical connection board includes electrical connection terminals on one face with a view toward connecting with a semiconductor component and electrical connection tracks connected respectively to these terminals. The terminals are arranged in a square matrix having two orthogonal directions. On its face, the board includes a multiplicity of identical adjacent connection groups, each group having N adjacent terminals and N tracks placed along this direction while extending towards an edge of the matrix. The terminals of a group are offset by one pitch relative to the terminals of an adjacent group. The board and a semiconductor component are connected together by electrical connection balls.

Abstract: A circuit for controlling a switch to be controlled in unidirectional fashion while the voltage present thereacross is an A.C. Voltage, including circuitry for delaying the switch turning-on with respect to a zero crossing of the voltage thereacross, and circuitry for triggering the switch turning-off after its turning on, at the end of a predetermined time interval plus or minus an error time controlled by the duty cycle of the A.C. Voltage across the switch, in one or several previous periods. The control circuit applies to the forming of a rectifying circuit by the switch.

Abstract: A method of controlling at least one transistor of a DC voltage converter to regulate an output voltage of the DC converter, the method including determining whether the output voltage of the DC converter is within a first or second voltage range, the second voltage range including a desired value of the output voltage; if the output voltage is in the first voltage range, generating a control signal using a first control method performed by a first controller, the first controller receiving the output voltage and determining the control signal based on the value of the output voltage in the first voltage range; and if the output voltage is in the second range, generating a control signal using a second control method performed by a second controller, the second controller receiving the output voltage and determining the control signal based on the value of the output voltage in the second voltage range.

Abstract: A method for reading of the state of a non-volatile memory element, comprising adjusting including conditioning the frequency of a first oscillatory to the state of this element, and comparing the frequency of the first oscillator with the predetermined frequency of a second oscillator, selected between two possible frequency values for the first oscillator, according to the state of the storage element.

Abstract: A method for controlling the execution of at least one program in an electronic circuit and a processor for executing a program, in which at least one volatile memory area of the circuit is, prior to the execution of the program to be controlled, filled with first instructions resulting in an exception processing; the program contains instructions for replacing all or part of the first instructions with second valid instructions; and the area is called for execution of all or part of the instruction that it contains at the end of the execution of the instruction program.

Abstract: Metal contacts are self-positioned on a wafer of semiconductor product. Respective placement areas for a metal contact are determined by a selective deposition of a growth material over a region of the substrate surface (for example, through epitaxial growth). The growth material is surrounded by an insulating material. The grown material is then removed to form a void in the insulating material which coincides with the desired location of the metal contact. This removal of the grown material exposes the region on the substrate surface. Conductive material is then deposited to fill the void and thus form the metal contact directly with the region of the substrate surface.

Abstract: A method protects against a global data erasure an integrated circuit comprising an electrically programmable data memory and a control unit to execute commands for reading or writing in the memory. The method includes the steps of providing, in the integrated circuit, electrically programmable reference memory cells, at putting the integrated circuit into service, storing, in the reference memory cells, bits of determined value forming an authorized combination of bits and, during the operation of the integrated circuit following its putting into service, reading and evaluating the reference memory cells and blocking the integrated circuit if the reference memory cells contain a forbidden combination of bits different from the authorized combination.

Abstract: A method to manage fast random access of a DRAM memory is described. The method includes steps of: dividing the memory into memory banks accessible independently in read and write mode; identifying the address of the bank concerned by a current request and comparing the address of the bank concerned by a current request with the addresses of the N?1 banks previously requested. N is an integral number of cycles necessary for executing a request. If the address of the bank concerned by a current request is equal to the address of a bank corresponding to one of the N?1 previous requests, then the method further includes steps of suspending and memorizing the current request until the previous request involving the same bank is executed, otherwise the current request is executed.

Abstract: A one-way dipolar component with overcurrent protection including, in parallel, a first one-way dipolar component with a positive temperature coefficient; and a second one-way dipolar component having the same biasing as the first one-way dipolar component having a conduction threshold voltage greater than the conduction threshold voltage at ambient temperature of the first one-way dipolar component, the second component comprising a silicon diode in series with a component of a zener diode type.

Abstract: A constant current generator connected between first and second terminals includes a gate turn-off thyristor in series with a resistor; a current limiting component connected between the anode gate and the cathode gate of the thyristor; and a voltage reference connected between the cathode and the cathode gate of the thyristor.

Abstract: The invention relates to a vertical-type power switch disposed in a semi-conductor chip, comprising a winding (30) located on the periphery of at least one face of said chip. Said winding comprises two binding posts (31, 32) which supply a signal that is proportional to the current fluctuations in said switch.