Abstract: A method for protecting at least one first datum to be stored in an integrated circuit, including, upon storage of the first datum, performing a combination with at least one second physical datum coming from at least one network of physical parameters, and only storing the result of this combination, and in read mode, extracting the stored result and using the second physical datum to restore the first datum.
Type:
Application
Filed:
December 20, 2007
Publication date:
May 1, 2008
Applicant:
STMicroelectronics S.A.
Inventors:
William Orlando, Luc Wuidart, Michel Bardouillet, Pierre Balthazar
Abstract: A method and a circuit for scrambling the current signature of a load including at least one integrated circuit executing digital processings, including the step of, at least on the load ground side, combining a current absorbed by a first linear regulator with a current absorbed by at least one capacitive switched-mode circuit with one or several switched capacitances.
Type:
Grant
Filed:
February 7, 2006
Date of Patent:
April 29, 2008
Assignee:
STMicroelectronics S.A.
Inventors:
Alexandre Malherbe, Edith Kussener, Vincent Telandro
Abstract: An inductance with a midpoint formed in a monolithic circuit, comprising a first conductive spiral integrally formed in a first conductive level, a second conductive spiral integrally formed in a second conductive level, and a via of spiral interconnection at the position of the inductance midpoint.
Abstract: A metal barrier is realized on top of a metal portion of a semiconductor product, by forming a metal layer on the surface of the metal portion, with this metal layer comprising a cobalt-based metal material. Then, after an optional deoxidation step, a silicidation step and a nitridation step of the cobalt-based metal material of the metal layer are performed. The antidiffusion properties of copper atoms (for example) and the antioxidation properties of the metal barrier are improved.
Type:
Application
Filed:
October 12, 2007
Publication date:
April 17, 2008
Applicant:
STMicroelectronics S.A.
Inventors:
Laurin Dumas, Cecile Jenny, Pierre Caubet
Abstract: A semiconductor package includes a flat metal leadframe including spaced apart portions, at least some of which constitute electrical connection leads. A filling material fills the spaces that separate the spaced apart portions of the leadframe to form a plate before fastening an integrated circuit chip to the front of the leadframe. Electrical connections are made between the chip and the electrical connection leads. The chip is then encapsulated on the front of the leadframe using a formed or attached encapsulant.
Abstract: An electronic component for microwave transmission includes a high resistivity substrate on which is at least located several metallization layers divided into portions. A first set of piled up portions defines a ground ribbon and a second set of piled up portions defines a power ribbon. At least a first active portion of said ground ribbon and a first active portion of said power ribbon are respectively located between the substrate and an uppermost one of the several metallization layers. The electronic component in one implementation is a coplanar waveguide.
Abstract: A monotonous counter formed as an integrated circuit, each counting bit being provided by a memory cell containing at least one memorization element formed of a polysilicon resistor, programmable by irreversible decrease in its value.
Abstract: A method for selecting images from a set of images (according to sharpness and contrast criteria), comprising pre-selecting images by a simplified sharpness and/or contrast analysis of each image in the set of images, and of selecting images by a finer analysis of the sharpness and/or contrast of each pre-selected image. This method is particularly useful to perform an identification by recognition of the iris.
Type:
Application
Filed:
September 18, 2007
Publication date:
March 27, 2008
Applicants:
STMicroelectronics S.A., Universite Paul Cezanne Aix-Marseille III
Inventors:
Lionel Martin, William Ketchantang, Stephane Derrode
Abstract: A method and a system for transferring a digital signal through a transformer, including a circuit for coding the digital signal to be transferred, having two outputs connected to the respective ends of a primary winding of the transformer, and a circuit for decoding the current in a secondary winding of the transformer generating a rising, respectively falling edge, of an output signal according to the direction of detected current pulses.
Abstract: A phase-locked loop that can be integrated into a semiconductor product comprises: a phase comparator having a first input, a second input and an output, said first input receiving a reference frequency; a low-pass filter having an input connected to said output of said phase comparator and having an output generating an electric control signal (Vtune); an oscillating circuit generating a predefined frequency signal to be controlled; a dividing block having an input receiving the oscillating signal and an output connected to said second input of said phase comparator. The oscillating circuit comprises a BAW-type acoustic resonator having first and second resonant frequencies and associated with a first inductive partner element to cancel out said second resonant frequency and with a second capacitive partner element for regulating said first resonant frequency, said at least first resonator component being adjusted via said electric signal (Vtune).
Abstract: A radiofrequency amplifier device includes a transconductor stage having an input for receiving a radiofrequency signal, and a cascode stage connected to the output of the transconductor stage. The device also includes an auxiliary radiofrequency amplifier compensation stage connected as a negative-feedback loop between the output of the transconductor stage and the base or the gate of the cascode stage.
Abstract: An amplifier including an input stage having two inputs, each input being connected to the control terminals of first and second transistors, a current output of the first transistor being connected to a first terminal of a resistor and to a reference supply rail via a variable current source having a value capable of automatically varying according to the voltage applied between said amplifier inputs up to a limiting value, and a current output of the second transistor being connected to the reference supply rail via a fixed current source and to the second terminal of the resistor.
Abstract: A method for manufacturing an integrated circuit containing fully and partially depleted MOS transistors, including the steps of forming similar MOS transistors on a thin silicon layer formed on a silicon-germanium layer resting on a silicon substrate; attaching the upper surface of the structure to a support wafer; eliminating the substrate; depositing a mask and opening this mask at the locations of the fully-depleted transistors; oxidizing the silicon-germanium at the locations of the fully-depleted transistors in conditions such that a condensation phenomenon occurs; and eliminating the oxidized portion and the silicon-germanium portion, whereby there remain transistors with a thinned silicon layer.
Abstract: A method and a circuit for scrambling an RSA-CRT algorithm calculation by an electronic circuit, in which a result is obtained from two modular exponentiation calculations, each providing a partial result, and from a recombination step, and in which a first step adds a digital quantity to at least one first partial result before said recombination step; and a second step cancels the effects of this quantity after the recombination step.
Abstract: A system and method of making a firmware self updatable depending on option information stored in a configuration module. The configuration module can either be in a memory device or a memory controller. The self-updation flexibility can be achieved by customizing the options as per the customer's requirements and can be done either through an USB interface or by pre-programming the configuration module or any other communication or programming options. The option information is provided by using a configurable module inside either the memory or the memory controller. After the basic initialization operations, the firmware reads the option information from the controller itself or any other non-volatile memory and performs the tasks to enhance the overall performance.
Abstract: A methodology for efficiently copying data is presented. An internal controller RAM is multiplexed between an existing RAM data and a copy back operation RAM. The data in the controller RAM is temporarily stored in a free space. The data of the internal RAM, which is to be copied, is read from a source page and is stored in the free space of the controller RAM, and from there, the data is written to a destination block of the internal RAM. After completion of the copy back operation, the data of the controller RAM that was moved to the free space is retrieved.
Abstract: A device for matching an output impedance of a transmitter includes at least a first output terminal connected to a first static impedance external to said transmitter and forming a component of an equivalent static load, and a first programmable resistive component in series with the first impedance. The device further includes a reference voltage generator internal to said transmitter, a comparator receiving the reference voltage and a measurement voltage representative of the voltage on the terminals of the load as seen by the transmitter and generating a comparison signal representative of the comparison result, and a control unit generating a control signal depending on the comparison signal, in order to control at least the programmable resistive component.
Abstract: A circuit for protecting an electronic equipment intended to be connected to at least one first conductor of a communication line, comprising, between this first conductor and a second conductor of the line or the ground to which is connected the equipment to be protected, at least one first branch comprising, in series, a first capacitive element and a first voltage-threshold triggering element, a first resistive element being connected in parallel on the first capacitive element.
Abstract: A digital processing unit for executing program instructions stored in at least two memories and including at least one first register of temporary storage of the operator of a current instruction to be executed and at least a second register of temporary storage of at least one argument or operand of said current instruction, and a protection circuit for submitting, upstream of the register, the operator to a deciphering function if this operator originates from one of the memories or from an area of these memories, identified from the address provided by a program counter. The present invention also relates to a method for protecting a program for updating an electronic circuit and controlling its execution, including at least one step of ciphering or deciphering of program instruction operators.