Patents Assigned to STMicroelectronics AS
  • Patent number: 9716502
    Abstract: An integrated circuit protection device, including: groups of radiation detection elements distributed in a matrix array; logic gates combining outputs of the detection elements in rows and in columns, each output of a detection element being connected to a gate combining a row and to a gate combining a column; and a circuit for interpreting signals supplied by said logic gates and including an event counter and a delay element.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: July 25, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre Sarafianos, Bruno Nicolas
  • Publication number: 20170207771
    Abstract: A digital filter with a pipeline structure includes processing structures timed by respective clock signals. Each processing structure in turn is formed by a number of processing modules for processing input samples. A phase generator aligns the processing modules with the input samples so that each input sample is processed by a respective one of the processing modules. An up-sampling buffer and a down-sampling buffer are used when the processing structures operate at different clock frequencies (thus implementing different clock domains) so as to convert signal samples between the clock domains for processing in the processing structures.
    Type: Application
    Filed: April 4, 2017
    Publication date: July 20, 2017
    Applicant: STMicroelectronics S.r.l.
    Inventor: Francesco Pirozzi
  • Publication number: 20170206099
    Abstract: A method disclosed herein includes operating a processor of a system on a chip in a configuration mode until completion of a set of tasks, and operating the processor in a normal operation mode after completion of the set of tasks. During the configuration mode, the method includes performing steps of sending by the processor of configuration information to a configuration programming block, sending by the configuration programming block of the configuration information to one or more electronic components to thereby complete a first subset of the set of tasks, while permitting the processor to complete a second subset of the set of tasks, and sending by the configuration programming block of a notification to the processor after completing the first subset of the set of tasks.
    Type: Application
    Filed: April 4, 2017
    Publication date: July 20, 2017
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventor: Gavin Probyn
  • Publication number: 20170208279
    Abstract: An array of image sensing elements is arranged in rows and columns. A readout circuit for each column includes a circuit configured to receive a column select signal. A memory stores data indicative of a voltage of an image sensing element which is being read. An analog to digital conversion circuit provides an output to the memory to control the storing of data. The output is dependent on the voltage of the image sensing element. Power control circuitry operates to disable, at least partially, the analog to digital conversion circuit when the column has not been selected.
    Type: Application
    Filed: April 5, 2017
    Publication date: July 20, 2017
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventor: Jeffrey M. Raynor
  • Patent number: 9710104
    Abstract: A touch screen device having a touch screen panel and a method for operating a touch screen device are provided. The method includes monitoring, during a noise monitoring phase, channel signals of a first set of channels and a second set of channel of the touch screen panel, detecting a stylus signal in response to a channel signal greater than a stylus threshold and less than a palm threshold, selecting the first set of channels when the stylus signal is detected on at least one channel of the first set of channels and is not detected on the second set of channels, and selecting the second set of channels when the stylus signal is detected on at least one channel of the second set of channels and is not detected on the first set of channels.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: CheeWeng Cheong, Leonard Dinu, Dianbo Guo, Kien Beng Tan
  • Patent number: 9711640
    Abstract: A vertical conduction integrated electronic device including: a semiconductor body; a trench that extends through part of the semiconductor body and delimits a portion of the semiconductor body, which forms a first conduction region having a first type of conductivity and a body region having a second type of conductivity, which overlies the first conduction region; a gate region of conductive material, which extends within the trench; an insulation region of dielectric material, which extends within the trench and is arranged between the gate region and the body region; and a second conduction region, which overlies the body region. The second conduction region is formed by a conductor.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Giuseppe Patti, Antonio Giuseppe Grimaldi
  • Patent number: 9711230
    Abstract: During a phase of programming the cell, a first voltage is applied to the source region and a second voltage, higher than the first voltage, is applied to the drain region until the cell is put into conduction. The numerical value of the item of data to be written is controlled by the level of the control voltage applied to the control gate and the item of data is de facto written with the numerical value during the putting into conduction of the cell. The programming is then stopped.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: François Tailliet
  • Patent number: 9711599
    Abstract: A switching device, such as a barrier junction Schottky diode, has a body of silicon carbide of a first conductivity type housing switching regions of a second conductivity type. The switching regions extend from a top surface of the body and delimit body surface portions between them. A contact metal layer having homogeneous chemical-physical characteristics extends on and in direct contact with the top surface of the body and forms Schottky contact metal portions with the surface portions of the body and ohmic contact metal portions with the switching regions. The contact metal layer is formed by depositing a nickel or cobalt layer on the body and carrying out a thermal treatment so that the metal reacts with the semiconductor material of the body and forms a silicide.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: July 18, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giuseppe Saggio, Simone Rascuna, Fabrizio Roccaforte
  • Patent number: 9711649
    Abstract: Metal quantum dots are incorporated into doped source and drain regions of a MOSFET array to assist in controlling transistor performance by altering the energy gap of the semiconductor crystal. In a first example, the quantum dots are incorporated into ion-doped source and drain regions. In a second example, the quantum dots are incorporated into epitaxially doped source and drain regions.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics, Inc.
    Inventor: John H. Zhang
  • Patent number: 9709739
    Abstract: A coupling module includes optical couplers that are coupled to waveguides. The optical couplers are configured to couple to cores of a multi-core optical fiber. The waveguides each include an external part extending from the module and an internal part extending into the module for connecting the external part to the associated optical coupler. The external part of some of the waveguides extends in a preferential direction, while the external part of others of the waveguides extends in a direction opposite to the preferential direction. The internal parts may include a curved portion configured for forming a turn-back.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Francois Carpentier, Patrick Le Maitre, Bertrand Borot
  • Patent number: 9710650
    Abstract: A method of detecting a cold-boot attack on an integrated circuit including the steps of: transferring, into a first volatile memory of the integrated circuit, a pattern stored in a non-volatile memory of the circuit; periodically causing a switching down and a switching up of the first volatile memory; and verifying that the number of bits having switched state is within a range of values.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: July 18, 2017
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Yannick Teglia
  • Patent number: 9709445
    Abstract: A temperature sensor, including a conduction path, between a line at a supply voltage and a common ground terminal of the temperature sensor, including a capacitor, a resistor and a reverse biased diode a junction temperature of which is to be sensed; a digital circuit coupled with the capacitor, the resistor and the diode, configured to compare a charge voltage of the capacitor with an upper threshold voltage and with a lower threshold voltage, and to generate in operation an output sense signal that switches to a first logic level when the charge voltage attains the lower threshold voltage and to a second logic level when the charge voltage attains the upper threshold voltage, the digital circuit being configured to connect the resistor electrically in parallel with the capacitor to discharge the capacitor when the output sense signal is at the second logic level, and to connect the capacitor so as to be charged by a reverse saturation current flowing throughout the reverse biased diode when the output sens
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventor: Michele Caldara
  • Patent number: 9708174
    Abstract: In order to manufacture a packaged device, a die having a sensitive region is bonded to a support, and a packaging mass of moldable material is molded on the support so as to surround the die. During molding of the packaging mass, a chamber is formed, which faces the sensitive region and is connected to the outside environment. To this end, a sacrificial mass of material that may evaporate/sublimate is dispensed on the sensitive region; the packaging mass is molded on the sacrificial mass; a through hole is formed in the packaging mass to extend as far as the sacrificial mass; the sacrificial mass is evaporated/sublimated through the hole.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: July 18, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Federico Giovanni Ziglioli
  • Patent number: 9711550
    Abstract: A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: July 18, 2017
    Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: Laurent Favennec, Didier Dutartre, Francois Roy
  • Patent number: 9710413
    Abstract: An integrated data concentrator, so-called “sensor hub”, for a multi-sensor MEMS system, implements: a first interface module, for interfacing, in a normal operating mode, with a microprocessor through a first communication bus; and a second interface module, for interfacing, in the normal operating mode, with a plurality of sensors through a second communication bus; the sensor hub further implements a pass-through operating mode, distinct from the normal operating mode, in which it sets the microprocessor in direct communication with the sensors, through the first communication bus and the second communication bus. In particular, the sensor hub implements the direct pass-through operating mode in a totally digital manner.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Leo, Alessandra Maria Rizzo Piazza Roncoroni, Marco Castellano
  • Patent number: 9710722
    Abstract: Various embodiments provide an optimized image filter. The optimized image and video obtains an input image and selects a target pixel for modification. Difference values are then determined between the selected target pixel and each reference pixel of a search area. Subsequently, a weighting function is used to determine weight values for each of the reference pixels of the search area based on their respective difference value. The selected target pixel is then modified by the optimized image filter using the determined weight values. A new target pixel in an apply patch is then selected for modification. The new target pixel is modified using the previously determined weight values reassigned to a new set of reference pixels. The previously determined weight values are reassigned to the new set of reference pixels based on each of the new set of reference pixels' position relative to the new target pixel.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: July 18, 2017
    Assignees: STMicroelectronics International N.V., STMicroelectronics SA
    Inventors: Mahesh Chandra, Antoine Drouot
  • Patent number: 9712116
    Abstract: An amplifier includes at least two amplification stages coupled in parallel. Each amplification stage includes at differential pair of amplifying MOS transistors having gates connected to a first and second input nodes common to amplifying stages, and bulk regions connected to each other but insulated from bulk regions of the amplifying MOS transistors of the other amplification stages. A configuration circuit generates bias voltage for application to the bulk terminals in each amplification stage to set the threshold voltages of the amplifying MOS transistors, and thus configuring the operating range of each amplification stage so that different amplification stages have different operating ranges.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics SA
    Inventors: Lionel Vogt, Baudouin Martineau, Aurelien Larie
  • Patent number: 9709533
    Abstract: A method determines a resonance frequency of a resonant device. The method includes stimulating the resonant device with a periodic input signal having a frequency in a frequency interval; determining a frequency value for said periodic input signal in said frequency interval for which a phase-difference between said periodic input signal and a corresponding periodic output signal of the resonant device is minimum; generating a flag indicating that a resonance frequency has been determined; and generating signals representing said resonance frequency as a value of the frequency of said periodic input signal.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: July 18, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Nicolo Nizza, Paolo Pascale, Andrea Diruzza, Michele Berto Boscolo
  • Patent number: 9712060
    Abstract: A method manages hysteretic DC-DC buck converters each including a hysteretic comparator operating according to a respective hysteresis window. The method includes, in a given converter, verifying if a respective feedback voltage reaches a lower threshold in order to enter a switch-on period of the converter, The method comprises: while the verifying indicates that the lower threshold is not reached, detecting if another converter has entered a respective switch on period and, in the affirmative, entering a hysteresis voltage adjustment procedure, include increasing by a given amount the amplitude of the hysteresis window of the given converter by reducing the lower threshold of the hysteresis window.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: July 18, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Pulici, Massimo Mazzucco
  • Patent number: 9707761
    Abstract: A nozzle plate for a fluid-ejection device, comprising: a first substrate made of semiconductor material, having a first side and a second side; a structural layer extending on the first side of the first substrate, the structural layer having a first side and a second side, the second side of the structural layer facing the first side of the first substrate; at least one first through hole, having an inner surface, extending through the structural layer, the first through hole having an inlet section corresponding to the first side of the structural layer and an outlet section corresponding to the second side of the structural layer; a narrowing element adjacent to the surface of the first through hole, and including a tapered portion such that the inlet section of the first through hole has an area larger than a respective area of the outlet section of the first through hole.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: July 18, 2017
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS, INC.
    Inventors: Dino Faralli, Michele Palmieri