Patents Assigned to STMicroelectronics AS
  • METHOD AND DEVICE FOR TESTING A CHAIN OF FLIP-FLOPS
    Publication number: 20170227602
    Abstract: A chain of flip-flops is tested by passing a reference signal through the chain. The reference signal is generated from a test pattern that is cyclically fed back at the cadence of a clock signal. The reference signal propagates through the chain of flip-flops at the cadence of the clock signal to output a test signal. A comparison is carried out at the cadence of the clock signal of the test signal and the reference signal, where the reference signal is delayed by a delay time taking into account the number of flip-flops in the chain and the length of the test pattern. An output signal is produced, at the cadence of the clock signal, as a result of the comparison.
    Type: Application
    Filed: August 23, 2016
    Publication date: August 10, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Sylvain Clerc, Gilles Gasiot
  • FULLY INTEGRATED LOW-NOISE AMPLIFIER
    Publication number: 20170230014
    Abstract: A low-noise amplifier device includes an inductive input element, an amplifier circuit, an inductive output element and an inductive degeneration element. The amplifier device is formed in and on a semiconductor substrate. The semiconductor substrate supports metallization levels of a back end of line structure. The metal lines of the inductive input element, inductive output element and inductive degeneration element are formed within one or more of the metallization levels. The inductive input element has a spiral shape and the an amplifier circuit, an inductive output element and an inductive degeneration element are located within the spiral shape.
    Type: Application
    Filed: August 5, 2016
    Publication date: August 10, 2017
    Applicant: STMicroelectronics SA
    Inventor: Raphael Paulin
  • Method for processing an analog signal coming from a transmission channel, in particular a signal carried by power line communications
    Patent number: 9729199
    Abstract: A method is for processing an analog signal coming from a transmission channel. The analog signal may include a useful signal modulated on a sub-set of carriers. The method may include analog-to-digital converting of the analog signal into a digital signal, and synchronization processing the digital signal. The synchronizing may include determining, in a time domain, a limited number of coefficients of a predictive filter from an autoregressive model of the digital signal, and filtering the digital signal in the time domain by a digital finite impulse response filter with coefficients based upon the limited number of coefficients to provide a filtered digital signal. The method may include detecting of an indication allowing a location in the frame structure to be identified, using the filtered digital signal and a reference signal.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: August 8, 2017
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Mark Wallis, Yoann Bouvet, Pierre Demaj
  • Integrated circuits with backside metalization and production method thereof
    Patent number: 9728411
    Abstract: An embodiment of an integrated device, including a chip of semiconductor material wherein an integrated circuit is integrated, is proposed; the integrated device includes a set of contact terminals for contacting the integrated circuit. At least one contact terminal of said set of contact terminals includes a contact layer of metal material being suitable to be directly coupled mechanically to an element external to the chip, and a coupling element for improving an electrical and/or mechanical coupling between the contact layer and the chip. The coupling element includes a coupling layer being formed by a combination between the metal material of the contact layer and the semiconductor material of the chip, with the coupling layer that is directly coupled to the chip and to the contact layer.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: August 8, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandra Alberti, Paolo Badala′, Antonello Santangelo
  • Method for producing a capacitor
    Patent number: 9728337
    Abstract: A method for producing a capacitor stack in one portion of a substrate, the method including: forming a cavity along a thickness of the portion of the substrate from an upper face of the substrate, depositing a plurality of layers contributing to the capacitor stack onto the wall of the cavity and onto the surface of the upper face, and removing matter from the layers until the surface of the upper face is reached. The forming of the cavity includes forming at least one trench and, associated with each trench, at least one box. The at least one trench includes a trench outlet that opens into the box. The box includes a box outlet that opens at the surface of the upper face, and the box outlet being shaped to be larger than the trench outlet.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: August 8, 2017
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STMICROELECTRONICS SA
    Inventors: Yann Lamy, Olivier Guiller, Sylvain Joblot
  • Pixel circuit
    Patent number: 9728578
    Abstract: A pixel arrangement includes a photodiode, a reset transistor configured to be controlled by a reset signal and coupled to a reset input voltage, a transfer gate transistor configured to transfer charge from the photodiode to a node, wherein the transfer gate transistor is controlled by a transfer gate voltage, and a source follower transistor controlled by the voltage on the node and coupled to a source follower voltage. A capacitor is coupled between the node and an input voltage. During a read operation the input voltage is increased to boost the voltage at the node. The increased input voltage may, for example, be one the reset input voltage, said source follower voltage, said transfer gate voltage and a boosting voltage.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: August 8, 2017
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMicroelectronics (Research & Development) Limited
    Inventors: Graeme Storm, Christophe Mandier, Laurence Stark
  • Method of connecting one or more contactless components to a single antenna, and corresponding system
    Patent number: 9729202
    Abstract: A first component (CMP1) is connected to the antenna (ANT) and to an impedance matching circuit (CAI) configurable on command and connected to the antenna, and in the absence of another component (CMP2) connected to the antenna, the impedance matching circuit is placed in a first configuration in which it forms with the first component and the antenna a resonant circuit having a first resonant frequency compatible with a carrier frequency. In the presence of a second component (CMP2) connected to the antenna, the impedance matching circuit is placed in a second configuration in which it forms with the first component, the second component and the antenna a resonant circuit having a second resonant frequency compatible with the carrier frequency.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Alexandre Tramoni, Pierre Rizzo
  • Converter circuit with injection of ripple current for comparison
    Patent number: 9729058
    Abstract: A boost-type converter circuit includes a pair of converter switches that are alternatively switchable on and off. An inductor is coupled to the intermediate point between the converter switches. A driver module controls switching on and off of the converter switches in respond to a comparator output signal. A reference signal line provides to the comparator a reference signal, and an output feedback line provides to the comparator an output feedback signal. These signals are compared to each other to generate the comparator output signal for controlling the driver module. A low-pass filter network is coupled to the inductor and configured to provide a ripple current which is a low-pass filtered replica of the current through the inductor. An injector circuit injects the ripple current into the reference signal line coupled to the comparator.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Manuela Larosa, Giovanni Sicurella, Giuseppe Platania
  • Terahertz imager
    Patent number: 9726548
    Abstract: A terahertz imager includes an array of pixel circuits. Each pixel circuit has an antenna and a detector. The detector is coupled to differential output terminals of the antenna. A frequency oscillator is configured to generate a frequency signal on an output line. The output line is coupled to an input terminal of the antenna of at least one of the pixel circuits.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics SA
    Inventors: Hani Sherry, Andreia Cathelin, Andreas Kaiser, Ullrich Pfeiffer, Janusz Grzyb, Yan Zhao
  • SPAD device with radiation blocking rings and vias and related arrays and methods
    Patent number: 9728659
    Abstract: A Single-Photon Avalanche Diode (SPAD) device an active region configured to detect incident radiation, a first radiation blocking ring surrounding the active region, and a radiation blocking cover configured to shield part of the active region from the incident radiation. The radiation blocking cover is configured to define a second radiation blocking ring vertically spaced apart from the first radiation blocking ring. The SPAD device may include radiation blocking vias extending between the first and second radiation blocking rings.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: August 8, 2017
    Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Flavien Hirigoyen, Bruce Rae, Gaelle Palmigiani, Stuart McLeod
  • Integrated circuits with backside metalization and production method thereof
    Patent number: 9728412
    Abstract: An embodiment of an integrated device, including a chip of semiconductor material wherein an integrated circuit is integrated, is proposed; the integrated device includes a set of contact terminals for contacting the integrated circuit. At least one contact terminal of said set of contact terminals includes a contact layer of metal material being suitable to be directly coupled mechanically to an element external to the chip, and a coupling element for improving an electrical and/or mechanical coupling between the contact layer and the chip. The coupling element includes a coupling layer being formed by a combination between the metal material of the contact layer and the semiconductor material of the chip, with the coupling layer that is directly coupled to the chip and to the contact layer.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: August 8, 2017
    Assignee: STMICROELECTRONICS S.R.L
    Inventors: Alessandra Alberti, Paolo Badala′, Antonello Santangelo
  • Tensile stress measurement device with attachment plates and related methods
    Patent number: 9726587
    Abstract: A tensile stress measurement device is to be attached to an object to be measured. The tensile stress measurement device may include an IC having a semiconductor substrate and tensile stress detection circuitry, the semiconductor substrate having opposing first and second attachment areas. The tensile stress measurement device may include a first attachment plate coupled to the first attachment area and extending outwardly to be attached to the object to be measured, and a second attachment plate coupled to the second attachment area and extending outwardly to be attached to the object to be measured. The tensile stress detection circuitry may be configured to detect a tensile stress imparted on the first and second attachment plates when attached to the object to be measured.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: August 8, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Pagani, Bruno Murari, Federico Giovanni Ziglioli
  • Bidirectional voltage differentiator circuit
    Patent number: 9726698
    Abstract: A bidirectional voltage differentiator circuit comprises start-up circuitry, sensing circuitry, and output circuitry coupled to logic circuitry. The start-up circuitry acts to start-up the sensing circuitry when the circuit is powered on, and accelerates the response of the sensing circuitry thereafter. The sensing circuitry senses variation in an input voltage applied to an input node. Responsive to the voltage variation sensed by the sensing circuitry, the output circuitry produces a state change at a first or second output node. The logic circuitry receives the states of the output nodes and produces a logic output signal to indicate the occurrence of the variation sensed in the input voltage. The voltage sensing circuit is operable to sense variation of the input voltage regardless of whether the voltage is rising or falling and without regard to the DC value of the input voltage.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventor: Yijun Duan
  • Method for the surface treatment of a semiconductor substrate
    Patent number: 9724921
    Abstract: To apply an anti-wetting coating to a substrate of a semiconductor material, a method includes applying to a support a solution of a hydrocarbon comprising at least one unsaturated bond and, optionally, at least one hetero-atom for obtaining a layer of hydrocarbons. The method also includes treating at least one surface of the substrate of the semiconductor material with an acid. The layer of hydrocarbons is transferred from the support to the surface of the substrate of the semiconductor material. The layer of hydrocarbons is chemically coupled with the surface of the substrate of the semiconductor material.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vincenza Di Palma, Fabrizio Porro
  • Oscillation frequency measuring system and method for a MEMS sensor
    Patent number: 9725308
    Abstract: A MEMS sensor has at least a movable element designed to oscillate at an oscillation frequency, and an integrated measuring system coupled to the movable element to provide a measure of the oscillation frequency. The measuring system has a light source to emit a light beam towards the movable element and a light detector to receive the light beam reflected back from the movable element, including a semiconductor photodiode array. In particular, the light detector is an integrated photomultiplier having an array of single photon avalanche diodes.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: August 8, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alfio Russo, Massimo Cataldo Mazzillo, Ferenc Nagy
  • System and method for automatic detection of power up for a dual-rail circuit
    Patent number: 9728232
    Abstract: When powering-up or exiting from a sleep mode, the ramping up of various supply voltage nodes may occur at different rates. Thus, in a dual-rail memory circuit, a first voltage rail may be at voltage before a second voltage rail. Such a transient state of operation may lead to current spikes that unnecessarily draw power and introduce undesired inefficiency. An internal sleep signal generation circuit in the dual-rail memory circuit precisely controls an internal sleep signal such that the transition from off or sleep mode to operating mode is set to assure that the supply voltage nodes are close enough to the at-voltage operating level before releasing the sleep mode.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics International N.V.
    Inventor: Amit Chhabra
  • Method and apparatus for tuning a resonant circuit using a laser
    Patent number: 9728837
    Abstract: An electronic communications device includes a body of semiconductor material with an integrated electronic circuit, an inductive element, and a capacitive element. The capacitive element is formed by a first electrode and a second electrode positioned between the inductive element and the integrated electronic circuit. Tuning of the device circuitry is accomplished by energizing the inductive/capacitive elements, determining resonance frequency, and using a laser trimming operation to alter the structure of one or more of the first electrode, second electrode or inductive element and change the resonance frequency.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Pagani, Alessandro Finocchiaro, Giovanni Girlando
  • Bi-synchronous electronic device with burst indicator and related methods
    Patent number: 9727306
    Abstract: A bi-synchronous electronic device may include a FIFO memory circuit configured to store data, and a first digital circuit coupled to the FIFO memory circuit and configured to operate based upon a first clock signal and a write pointer, write a data burst to the FIFO memory circuit, thereby causing a jump in the write pointer to a new position, and write a burst indicator associated with the new position in the FIFO memory circuit. The bi-synchronous electronic device may include a second digital circuit coupled to the FIFO memory circuit and configured to operate based upon a second clock signal different from the first clock signal, read from the FIFO memory circuit based upon a read pointer, and synchronize the read pointer to the write pointer based upon the burst indicator.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe Guarnaccia, Salvatore Marco Rosselli
  • Semiconductor structure and memory device including the structure
    Patent number: 9728248
    Abstract: A semiconductor structure includes first and second source/drain region disposed in a semiconductor body and spaced from each other by a channel region. A gate electrode overlies the channel region and a capacitor electrode is disposed between the gate electrode and the channel region. A first gate dielectric is disposed between the gate electrode and the capacitor electrode and a second gate dielectric disposed between the capacitor electrode and the channel region. A first electrically conductive contact region is in electrical contact with the gate electrode and a second electrically conductive contact region in electrical contact with the capacitor electrode. The first and second contact regions are electrically isolated from one another.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: August 8, 2017
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: François Tailliet, Marc Battista
  • Electronic circuit for driving LED strings including a plurality of regulation modules which function in sequence
    Patent number: 9730285
    Abstract: An electronic circuit drives a plurality of LED strings connected in series. The electronic circuit includes a regulation module corresponding to each LED string, with the regulation module connected to the cathode terminal of the corresponding LED string. Each regulation module is further coupled to receive a reference voltage in phase with a rectified a.c. voltage. The regulation modules execute in turn and in sequence a current-regulation phase as a function of a trend of the reference voltage. Each regulation module, when executing the current-regulation phase, functions to regulate the current that flows in the corresponding LED string and in any previous LED strings in the series connection so that the regulated current is proportional to the reference voltage.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: August 8, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Lena, Simone Crespi