Abstract: A circuit includes a first transistor and a second transistor having respective control terminals coupled to receive first and second bias voltages. A first electronic switch is coupled in series with, and between current paths of the first and second transistors to provide an output current line between a circuit output node and ground. A second electronic switch is selectively activated to a conductive state in order to provide a charge transfer current path between a bias node and a charge transfer node in the output current line. A third electronic switch is selectively activated to a conductive state in order to provide a charge transfer current path between the charge transfer node and the control terminal of the second transistor.

Abstract: A MEMS gyroscope is equipped with: at least a first mobile mass suspended from the top of a substrate by means of elastic suspension elements coupled to anchor points rigidly fixed to the substrate, in such a manner as to be actuated in an actuating movement along a first axis of a horizontal plane and to carry out a measurement movement along a vertical axis, transverse to the horizontal plane, in response to a first angular velocity acting about a second axis of the horizontal plane, transverse to the first axis. The elastic suspension elements are configured in such a manner as to internally compensate unwanted displacements out of the horizontal plane along the vertical axis originating from the actuating movement, such that the mobile mass remains in the horizontal plane during the actuating movement.

Abstract: The disclosure relates to a method of simultaneous fabrication of an MOS transistor of SOI type, and of first and second transistors on bulk substrate, comprising: a) providing a semiconductor layer on an insulating layer covering a semiconductor substrate; b) forming a mask comprising, above the location of the second transistor, a central opening which is less wide than the second transistor to be formed; c) plumb with the opening, entirely etching the semiconductor layer and insulating layer, hence resulting in remaining portions of the insulating layer at the location of the second transistor; d) growing the semiconductor by epitaxy as far as the upper level of the semiconductor layer; e) forming isolating trenches; and f) forming the gate insulators of the transistors, the gate insulator of the second transistor comprising at least one part of the said remaining portions of the insulating layer.

Abstract: A projector includes a first laser source projecting a first laser beam, a second laser source projecting a second laser beam at an angle with respect to the first laser beam, and a mirror reflecting the first and second laser beams. Circuitry controls the mirror to simultaneously reflect the first and second laser beams in a first scan pattern to form a first image having a number of scan lines greater than two times a horizontal resonance frequency of the mirror divided by a desired frame rate of the first image. The first laser beam forms a first angle of incidence with the mirror and the second laser beam forms a second angle of incidence with the mirror, the second angle of incidence being equal to the first angle of incidence summed with the angle of the second laser beam with respect to the first laser beam.

Abstract: A data frame in a touch capacitive sensing circuit includes both mutual capacitance data and self capacitance data. The mutual capacitance data and self capacitance data of the frame are filtered to define mutual capacitance and self capacitance islands. Centroids of the mutual capacitance and self capacitance islands are calculated and then processed in a weighted mixing operation to produce a hybrid centroid that more accurately locates the coordinates of a detected touch/hover.

Abstract: Disclosed herein is a circuit including a transistor, with a resonant tank coupled between a DC supply node and a first conduction terminal of the transistor. A gate driver generates a gate drive signal for biasing a control terminal of the transistor to cause it to conduct current through the resonant tank. Control circuitry monitors a voltage across the transistor to determine that the transistor is an overvoltage condition if that voltage exceeds a threshold, and monitors a current through the transistor to determine that the transistor is an overcurrent condition if that current exceeds a threshold. If overvoltage is determined, the control circuitry causes the gate driver to pull up the gate drive signal. If overcurrent is determined, the control circuitry causes the gate driver to pull down the gate drive signal. If either overvoltage or overcurrent is present, a pulse width of the gate drive signal is reduced.

Abstract: A capacitive element is located in an active region of the substrate and on a front face of the substrate. The capacitive element includes a first electrode and a second electrode. The first electrode is formed by a first conductive region and the active region. The second electrode is formed by a second conductive region and a monolithic conductive region having one part covering a surface of said front face and at least one part extending into the active region perpendicularly to said front face. The first conductive region is located between and is insulated from the monolithic conductive region and a second conductive region.

Abstract: An energy harvester includes an elongated tubular casing extending around a longitudinal axis between opposed first and second ends. A body is arranged in the casing. A helical electrical winding is wound around the longitudinal axis. The body is arranged to move along the longitudinal axis with alternate motion away from the first end towards the second end and away from the second end towards the first end. As a result of this alternate motion, an electromotive force is produced in the at least one helical electrical winding. Furthermore, at least one of the first and second ends includes a piezoelectric transducer that is configured to co-operate in a kinetic energy transfer relationship with the at least one body to generate an electric voltage as a result of the at least one body reaching, in the alternate motion, an end-of-travel position towards the piezoelectric transducer.

Abstract: A touch screen controller includes driving circuitry coupled to a conductive line through a resistance and drives that conductive line with a driving signal passed through the resistance at a drive frequency. Sensing circuitry is coupled to that conductive line and senses a voltage at that conductive line, the voltage being a function of a capacitance seen by that conductive line. Analog to digital conversion circuitry is coupled to the sensing circuitry and samples the sensed voltage at a sampling frequency to produce samples. Processing circuitry is coupled to the analog to digital conversion circuitry and directly calculates a tangent of a phase shift of the voltage due to the resistance and the capacitance from the samples, and determines a self touch value for that conductive line as a function of the tangent of the phase shift of the voltage.

Abstract: A voltage regulator circuit includes a first voltage regulator having a first output voltage selection pin set and producing a first output voltage based on a first digital signal received at the first output voltage selection pin set, and a second voltage regulator having a second output voltage selection pin set and producing a second output voltage based on a second digital signal received at the second output voltage selection pin set. The first and second voltage regulators are operable in a voltage tracking mode with the output voltage of the second voltage regulator tracking the output voltage of the first voltage regulator when digital signals received at the selection pin sets have a same value. An overvoltage sensor detects overvoltage events at the first voltage regulator. Control circuitry selectively avoids operation in voltage tracking mode as a result of an overvoltage event detected at the first voltage regulator.

Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.

Abstract: A semiconductor substrate has a front face with a first dielectric region. A capacitive element includes, on a surface of the first dielectric region at the front face, a stack of layers which include a first conductive region, a second conductive region and a third conductive region. The second conductive region is electrically insulated from the first conductive region by a second dielectric region. The second conductive region is further electrically insulated from the third conductive region by a third dielectric region. The first and third conductive regions form one plate of the capacitive element, and the second conductive region forms another plate of the capacitive element.

Abstract: Miniature resistive gas detectors incorporate thin films that can selectively identify specific gases when heated to certain characteristic temperatures. A solid state gas sensor module is disclosed that includes a gas sensor, a heater, and a temperature sensor, stacked over an insulating recess. The insulating recess is partially filled with a support material that provides structural integrity. The solid state gas sensor module can be integrated on top of an ASIC on a common substrate. With sufficient thermal insulation, such a gas detector can be provided as a low-power component of mobile electronic devices such as smart phones. A method of operating a multi-sensor array allows detection of relative concentrations of different gas species by either using dedicated sensors, or by thermally tuning the sensors to monitor different gas species.

Abstract: A first circuit includes a first chain of identical stages defining first and second delay lines. A second circuit includes a second chain of identical stages defining third and fourth delay lines. The stages of the second chain are identical to the stages of the first chain. A third circuit selectively couples one of the third delay line, the fourth delay line, or a first input of the third circuit to an input of the first circuit.

Abstract: An analog-to-digital converter includes a sampling capacitor connected to a multiplexer output, discharge circuitry discharging the sampling capacitor during a first period beginning at a start of a sampling cycle, and level shifting circuitry charging the sampling capacitor to a voltage at a first analog input node modified by a mismatch voltage resulting from mismatch in threshold voltages between a first transistor connected to the first analog input node and a second transistor connected to the output node, during a second period beginning at expiration of the first period. A first switch connects the first analog input node to the output node to charge the sampling capacitor to the voltage at the first analog input node, at expiration of the second period, and disconnects the first analog input node from the output node at an end of the sampling cycle of the analog-to-digital converter.

Abstract: An integrated circuit includes a semiconductor substrate with an electrically isolated semiconductor well. An upper trench isolation extends from a front face of the semiconductor well to a depth located a distance from the bottom of the well. Two additional isolating zones are electrically insulated from the semiconductor well and extending inside the semiconductor well in a first direction and vertically from the front face to the bottom of the semiconductor well. At least one hemmed resistive region is bounded by the two additional isolating zones, the upper trench isolation and the bottom of the semiconductor well. Electrical contacts are electrically coupled to the hemmed resistive region.

Abstract: A cavity is etched in a stack of layers which includes a first layer made of a first material and a second layer made of a second material. To etch the cavity, a first etch mask having a first opening is formed over the stack of layer. The stack of layers is then etched through the first opening to a depth located in the second layer. A second mask having a second opening, the dimensions of which are smaller, in top view, than the first opening, is formed over the stack of layer. The second opening is located, in top view, opposite the area etched through the first opening. The second layer is then etched through the second opening to reach the first layer. The etch method used is configured to etch the second material selectively over the first material.

Abstract: An integrated electronic circuit includes a semiconductor substrate with a semiconductor well that is isolated by a buried semiconductor region located under the semiconductor well. A vertical MOS transistor formed in the semiconductor well includes a source-drain region provided by the buried semiconductor region. Backside thinning of the semiconductor substrate is detected by biasing the vertical MOS transistor into an on condition to supply a current and then comparing that current to a threshold. Current less than a threshold is indicative that the semiconductor substrate has been thinned from the backside.

Abstract: A MOSFET device is integrated in a body of semiconductor material of a first conductivity type accommodating a body region, of a second conductivity type, and a source region, of the first conductivity type. A gate region extends over the top surface of the body; a source pad extends over the first top surface and is electrically coupled to the source region, a first gate pad extends over the first main surface, alongside the source pad, and is electrically coupled to the gate region; a drain pad extends over the rear surface and is electrically coupled to the body; a second gate pad extends over the rear surface, alongside the drain pad; and a conductive via extends through the body and electrically couples the gate region to the second gate pad.

Abstract: An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.