Patents Assigned to STMicroelectronics, Inc.
  • Patent number: 12080657
    Abstract: The present disclosure is directed to a package, such as a wafer level chip scale package (WLCSP) or a package containing a semiconductor die, with a die embedded within a substrate that is surrounded by an elastomer. The package includes nonconductive layers on surfaces of the substrate and the elastomer as well as conductive layers and conductive vias that extend through these layers to form electrical connections in the package. The package includes surfaces of the conductive material, which may be referred to as contacts. These surfaces of the conductive material are exposed on both sides of the package and allow the package to be mounted within an electronic device and have other electronic components coupled to the package, or allow the package to be included in a stacked configuration of semiconductor dice or packages.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: September 3, 2024
    Assignee: STMicroelectronics, Inc.
    Inventor: Jefferson Sismundo Talledo
  • Patent number: 12074100
    Abstract: The present disclosure is directed to a flat no-lead semiconductor package with a surfaced mounted structure. An end portion of the surface mounted structure includes a recessed member so that the surface mounted structure is coupled to leads of the flat no-lead semiconductor package through, among others, the sidewalls of the recessed members.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: August 27, 2024
    Assignee: STMicroelectronics, Inc.
    Inventors: Rennier Rodriguez, Aiza Marie Agudon, Maiden Grace Maming
  • Patent number: 12066881
    Abstract: A method for operating an electronic device includes while a display is in low power mode, detecting based on data collected by a time of flight (ToF) sensor, a movable object within a field of view of the electronic device; in response to the detecting initiating a period of detection having a plurality of frames, the period of detection being a time period over which a distance value indicative of a distance between the movable object and the display is detected; for each of the plurality of frames, changing the distance value to reflect whether the movable object is moving near or further from the electronic device; detecting that the distance value after the period of detection is less than a threshold distance value indicative of the movable object approaching the display; if the distance value is less than the threshold distance value, waking up the display.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: August 20, 2024
    Assignees: STMICROELETRONICS (BEIJING) R&D CO., LTD., STMicroelectronics (Grenoble 2) SAS, STMicroelectronics, Inc.
    Inventors: Arnaud Deleule, Kalyan-Kumar Vadlamudi-Reddy, Darin K Winterton, Jihong Chen, Olivier Lemarchand
  • Patent number: 12044423
    Abstract: The present disclosure is directed to an air filter sensor system that can monitor a status of a filter and provide information to a remote system regarding the filter's status. The system can receive, by a computing server via one or more computer networks and from each of a plurality of sensor assemblies coupled to a corresponding plurality of air filters, information indicative of filter contamination levels respectively associated with each corresponding air filter of the plurality of air filters. Each of the respective filter contamination levels being provided by one sensor assembly of the plurality of sensor assemblies based at least in part on a difference in detected air pressure between first and second sides of the corresponding air filter.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: July 23, 2024
    Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC.
    Inventors: Matteo Dameno, Mario Tesi, Marco Bianco, Mahesh Chowdhary, Michele Ferraina
  • Publication number: 20240244406
    Abstract: In an embodiment, a device comprises a memory, which, in operation, stores data samples associated with a plurality of data sensors, and circuitry, coupled to the memory, wherein the circuitry, in operation, generates synchronized output data sets associated with the plurality of data sensors. Generating a synchronized output data set includes: determining a reference sample associated with a sensor of the plurality of sensors; verifying a timing validity of a data sample associated with another sensor of the plurality of sensors; identifying a closest-in-time data sample associated with the another sensor of the plurality of sensors with respect to the reference sample; and generating the synchronized output data set based on interpolation.
    Type: Application
    Filed: March 26, 2024
    Publication date: July 18, 2024
    Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC.
    Inventors: Karimuddin SAYED, Chandandeep Singh PABLA, Lorenzo BRACCO, Federico RIZZARDINI
  • Patent number: 12021957
    Abstract: System, method, and circuitry for utilizing a synchronization message to create fixed transmission windows for multiple priority data in half-duplex communication systems. A first computing device includes a first master controller and a first slave radio, and a second computing device includes a second slave controller and a second master radio. The first controller and the second radio may share a transmit mode during a transmission window, and the first radio and the second controller radio may share a receive mode during that same transmission window, which are defined by the synchronization message. The first controller can transmit outbound data to the first radio, the second radio can transmit outbound data to the second controller, and the second radio can transmit inbound data to the first radio during this transmission window.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: June 25, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Maurizio Gentili
  • Patent number: 12016670
    Abstract: In accordance with embodiments, methods and systems for utilizing multiple threshold checkers are provided. A range sensor collects measurement data. The range sensor examines the measurement data based on multiple threshold checkers to determine satisfaction of a trigger condition. In response to the satisfaction of the trigger condition, the range sensor provides the measurement data to a host computing device of the range sensor.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: June 25, 2024
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS, INC.
    Inventors: Kalyan-Kumar Vadlamudi-Reddy, Darin K Winterton, Pierre-Loic Felter, Olivier Lemarchand
  • Publication number: 20240188837
    Abstract: A blood pressure monitoring device includes a patch including two inertial measurement units placed adjacent to the skin of a user. The blood pressure monitoring device includes a control unit coupled to the patch and configured to receive sensor data from the inertial measurement units. The control unit includes an analysis model trained with multiple machine learning processes to generate blood pressure estimations based on the sensor data. A first general machine learning process trains the analysis model with a training set gathered from plurality of other individuals. The second general machine learning process retrains a portion of the analysis model with a second machine learning process utilizing individualized training set gathered from the user.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 13, 2024
    Applicants: STMICROELECTRONICS, INC., STMicroelectronics International N.V.
    Inventors: Mahesh CHOWDHARY, Vijay KUMAR, Goldy, Kolin PAUL
  • Publication number: 20240192762
    Abstract: An electronic device includes a sensor unit. The sensor unit includes a sensor and low power, low area sensor processing unit. The sensor processing unit performs an unsupervised machine learning processes to learn to recognize an activity or motion of the user or device. The user can request to learn the new activity. The sensor processing unit can request that the user remain stationary for a selected period of time before performing the activity. The sensor processing unit records sensor data while the user performs the activity and generates an activity template from the sensor data. The sensor processing can then infer when the user is performing the activity by comparing sensor signals to the activity template.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 13, 2024
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Swapnil Sayan SAHA, Mahesh CHOWDHARY
  • Patent number: 12009954
    Abstract: An electronic device receives wireless signals encoded with data in an amplitude-shift keying format. The electronic device passes the wireless signals through a low-pass filter. The low-pass filter has a cutoff frequency between a first frequency associated with data values of a first type and a second frequency associated with data values of a second type. The low-pass filter has the effect of changing the wireless signal from the amplitude-shift keying format to an on-off keying format without losing the data. The electronic device decodes the data from the wireless signal in the on-off keying format.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: June 11, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Andrea Lorenzo Vitali
  • Patent number: 12001259
    Abstract: In accordance with embodiments, methods and systems for utilizing multiple threshold checkers are provided. A range sensor collects measurement data. The range sensor examines the measurement data based on multiple threshold checkers to determine satisfaction of a trigger condition. In response to the satisfaction of the trigger condition, the range sensor provides the measurement data to a host computing device of the range sensor.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: June 4, 2024
    Assignees: STMICROELECTRONICS, INC., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Olivier Lemarchand, Pierre-Loic Felter, Darin K Winterton, Kalyan-Kumar Vadlamudi-Reddy
  • Publication number: 20240178006
    Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Ian Harvey ARELLANO, Aaron CADAG, Ela Mia CADAG
  • Patent number: 11991276
    Abstract: A secure element device that is configured to be cryptographically bound to a host device includes a secure element host key slot configured to store host key information that allows only the host device to control the secure element, a secure memory storing binding information, and limited functionality allowing the binding information to be read from the secure memory by the host device during a binding process. The binding information is cryptographically correlated with the host key information. The host key information is generated by the host device using the binding information read from the secure element and a secret key. The secure element device further includes general functionality only accessible to the host device using the host key information that is generated by the host device. The secure memory includes prevention measures impeding unauthorized entities from obtaining information from the secure memory.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: May 21, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Giuseppe Pilozzi
  • Publication number: 20240162168
    Abstract: In various embodiments, the present disclosure provides semiconductor devices, packages, and methods. In one embodiment, a device includes a die pad, a lead that is spaced apart from the die pad, and an encapsulant on the die pad and the lead. A plurality of cavities extends into at least one of the die pad or the lead to a depth from a surface of the at least one of the die pad or the lead. The depth is within a range from 0.5 ?m to 5 ?m. The encapsulant extends into the plurality of cavities. The cavities facilitate improved adhesion between the die pad or lead and the encapsulant, as the cavities increase a surface area of contact with the encapsulant, and further increase a mechanical interlock with the encapsulant, as the cavities may have a rounded or semi-spherical shape.
    Type: Application
    Filed: December 6, 2023
    Publication date: May 16, 2024
    Applicant: STMicroelectronics, Inc.
    Inventor: Ian Harvey ARELLANO
  • Publication number: 20240145480
    Abstract: Single gate and dual gate FinFET devices suitable for use in an SRAM memory array have respective fins, source regions, and drain regions that are formed from portions of a single, contiguous layer on the semiconductor substrate, so that STI is unnecessary. Pairs of FinFETs can be configured as dependent-gate devices wherein adjacent channels are controlled by a common gate, or as independent-gate devices wherein one channel is controlled by two gates. Metal interconnects coupling a plurality of the FinFET devices are made of a same material as the gate electrodes. Such structural and material commonalities help to reduce costs of manufacturing high-density memory arrays.
    Type: Application
    Filed: May 31, 2023
    Publication date: May 2, 2024
    Applicant: STMICROELECTRONICS, INC.
    Inventor: John H. ZHANG
  • Patent number: 11968602
    Abstract: In an embodiment, a device comprises a memory, which, in operation, stores data samples associated with a plurality of data sensors, and circuitry, coupled to the memory, wherein the circuitry, in operation, generates synchronized output data sets associated with the plurality of data sensors. Generating a synchronized output data set includes: determining a reference sample associated with a sensor of the plurality of sensors; verifying a timing validity of a data sample associated with another sensor of the plurality of sensors; identifying a closest-in-time data sample associated with the another sensor of the plurality of sensors with respect to the reference sample; and generating the synchronized output data set based on interpolation.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: April 23, 2024
    Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC.
    Inventors: Karimuddin Sayed, Chandandeep Singh Pabla, Lorenzo Bracco, Federico Rizzardini
  • Publication number: 20240124300
    Abstract: A semiconductor package that contains an application-specific integrated circuit (ASIC) die and a micro-electromechanical system (MEMS) die. The MEMS die and the ASIC die are coupled to a substrate that includes an opening that extends through the substrate and is in fluid communication with an air cavity positioned between and separating the MEMS die from the substrate. The opening exposes the air cavity to an external environment and, following this, the air cavity exposes a MEMS element of the MEMS die to the external environment. The air cavity separating the MEMS die from the substrate is formed with a method of manufacturing that utilizes a thermally decomposable die attach material.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: STMicroelectronics, Inc.
    Inventor: Jefferson Sismundo TALLEDO
  • Publication number: 20240113064
    Abstract: An electronic device includes an integrated circuit (IC) with its second face bonded to a first surface of a first support. A conductive clip has a first portion that is elongate and extends across the IC, having its second surface bonded to a first face of the IC by a solder layer. A second portion of the clip extends from the first portion away from the IC toward a second support with the second surface bonded to a first surface of the second support. A first surface of the clip has a pattern formed therein including a depressed floor with fins extending upwardly therefrom. Through-holes extend through the depressed floor to the second surface of the clip. An encapsulating layer covers portions of the first and second supports, IC, and clip while leaving the first surface of the first portion exposed to permit heat to radiate away therefrom.
    Type: Application
    Filed: August 11, 2023
    Publication date: April 4, 2024
    Applicant: STMicroelectronics, Inc.
    Inventor: Jefferson Sismundo TALLEDO
  • Patent number: 11948868
    Abstract: Generally described, one or more embodiments are directed to a leadframe package having a plurality of leads, a die pad, a semiconductor die coupled to the die pad, and encapsulation material. An inner portion of the die pad includes a perimeter portion that includes a plurality of protrusions that are spaced apart from each other. The protrusions aid in locking the die pad in the encapsulation material. The plurality of leads includes upper portions and base portions. The base portion of the plurality of leads are offset (or staggered) relative to the plurality of protrusions of the die pad. In particular, the base portions extend longitudinally toward the die pad and are located between respective protrusions. The upper portions of the leads include lead locks that extend beyond the base portions in a direction of adjacent leads. The lead locks and the protrusion in the die pad aid in locking the leads and the die pad in the encapsulation material.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: April 2, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Jefferson Talledo
  • Patent number: 11948977
    Abstract: Transistors having partially recessed gates are constructed on silicon-on-insulator (SOI) semiconductor wafers provided with a buried oxide layer (BOX), for example, FD-SOI and UTBB devices. An epitaxially grown channel region relaxes constraints on the design of doped source and drain profiles. Formation of a partially recessed gate and raised epitaxial source and drain regions allow further improvements in transistor performance and reduction of short channel effects such as drain induced barrier lowering (DIBL) and control of a characteristic subthreshold slope. Gate recess can be varied to place the channel at different depths relative to the dopant profile, assisted by advanced process control. The partially recessed gate has an associated high-k gate dielectric that is initially formed in contact with three sides of the gate. Subsequent removal of the high-k sidewalls and substitution of a lower-k silicon nitride encapsulant lowers capacitance between the gate and the source and drain regions.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: April 2, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventor: John H. Zhang