Patents Assigned to STMicroelectronics, Inc.
  • Patent number: 9893147
    Abstract: Channel-to-substrate leakage in a FinFET device is prevented by inserting an insulating layer between the semiconducting channel and the substrate during fabrication of the device. Similarly, source/drain-to-substrate leakage in a FinFET device is prevented by isolating the source/drain regions from the substrate by inserting an insulating layer between the source/drain regions and the substrate. Forming such an insulating layer isolates the conduction path from the substrate both physically and electrically, thus preventing current leakage. In an array of semiconducting fins made up of a multi-layer stack, the bottom material is removed thus yielding a fin array that is suspended above the silicon surface. A resulting gap underneath the remaining top fin material is then filled with oxide to better support the fins and to isolate the array of fins from the substrate.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: February 13, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Nicolas Loubet, Prasanna Khare
  • Patent number: 9893688
    Abstract: A differential amplifier has an inherent offset voltage. In many circuit applications, such as with a voltage to current converter circuit, it is important to nullify that offset voltage. A calibration circuit is provided to configured the differential amplifier to operate as a comparator with a common voltage applied to both inputs. The logic state of the output of the amplifier indicates whether the offset voltage is positive or negative. In response thereto, a trim current with a progressively increasing magnitude is injected into the amplifier and the amplifier output is monitored to detect a change in logic state. The magnitude of the trim current at the point where the logic state changes is the magnitude of trim current needed to nullify the voltage offset.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: February 13, 2018
    Assignee: STMicroelectronics, Inc.
    Inventor: Pavan Nallamothu
  • Publication number: 20180042049
    Abstract: Multicast transmissions are efficient but do not allow for individual acknowledgement that the data was received by each receiver. This is not acceptable for isochronous systems that require specific levels of QoS for each device. A multimedia communications protocol is provided that uses a novel multi-destination burst transmission protocol in multimedia isochronous systems. The transmitter establishes a bi-directional burst mode for multicasting data to multiple devices and receiving Reverse Start of Frame (RSOF) delimiters from each multicast-destination receiver in response to multiple SOF delimiters, thus providing protocol-efficient multi-destination acknowledgements.
    Type: Application
    Filed: October 10, 2017
    Publication date: February 8, 2018
    Applicant: STMicroelectronics, Inc.
    Inventors: Oleg Logvinov, Aidan Cully, David Lawrence, Michael J. Macaluso
  • Patent number: 9887196
    Abstract: A semiconductor substrate includes a bulk substrate layer that extends along a first axis to define a width and a second axis perpendicular to the first axis to define a height. A plurality of hetero semiconductor fins includes an epitaxial material formed on a first region of the bulk substrate layer. A plurality of non-hetero semiconductor fins is formed on a second region of the bulk substrate layer different from the first region. The non-hetero semiconductor fins are integrally formed from the bulk substrate layer such that the material of the non-hetero semiconductor fins is different from the epitaxial material.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: February 6, 2018
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC., STMICROELECTRONICS, INC.
    Inventors: Xiuyu Cai, Qing Liu, Ruilong Xie, Chun-chen Yeh
  • Patent number: 9882006
    Abstract: A method for channel formation in a fin transistor includes removing a dummy gate and dielectric from a dummy gate structure to expose a region of an underlying fin and depositing an amorphous layer including Ge over the region of the underlying fin. The amorphous layer is oxidized to condense out Ge and diffuse the Ge into the region of the underlying fin to form a channel region with Ge in the fin.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: January 30, 2018
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, STMICROELECTRONICS, INC.
    Inventors: Hong He, Nicolas Loubet, Junli Wang
  • Patent number: 9876110
    Abstract: Methods and structures for forming highly-doped, ultrathin layers for transistors formed in semiconductor-on-insulator substrates are described. High dopant concentrations may be achieved in ultrathin semiconductor layers to improve device characteristics. Ion implantation at elevated temperatures may mitigate defect formation for stoichiometric dopant concentrations up to about 30%. In-plane stressors may be formed adjacent to channels of transistors formed in ultrathin semiconductor layers.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: January 23, 2018
    Assignee: STMicroelectronics, Inc.
    Inventor: Jocelyne Gimbert
  • Patent number: 9873250
    Abstract: Embodiments of the present disclosure are directed to a microfluidic delivery system that includes a microfluidic semiconductor die coupled to a flexible interconnect substrate to form an assembly. At least one embodiment is directed to a semiconductor die having an active surface that includes a layout that has electrically active bond pads along one side of the active surface of the die. A second side of the active surface of the die includes one or more mechanical pads.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: January 23, 2018
    Assignees: STMICROELECTRONICS, INC., STMICROELECTRONICS S.R.L.
    Inventors: Simon Dodd, Andrea Nicola Colecchia
  • Patent number: 9870535
    Abstract: An electronic device described herein includes a sensing unit having at least one sensor to acquire sensing data. An associated computing device extracts sensor specific features from the sensing data, and generates a motion activity vector, a voice activity vector, and a spatial environment vector as a function of the sensor specific features. The motion activity vector, voice activity vector, and spatial environment vector are processed to determine a base level context of the electronic device relative to its surroundings, with the base level context having aspects each based on the motion activity vector, voice activity vector, and spatial environment vector. Meta level context of the electronic device relative to its surroundings is determined as a function of the base level context, with the meta level context being at least one inference made from at least two aspects of the plurality of aspects of the base level context.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: January 16, 2018
    Assignees: STMicroelectronics, Inc., STMicroelectronics International N.V.
    Inventors: Mahesh Chowdhary, Arun Kumar, Ghanapriya Singh, Kashif R. J. Meer, Indra Narayan Kar, Rajendar Bahl
  • Patent number: 9871669
    Abstract: An embodiment is a powerline communications (PLC) apparatus including a communications interface that implements a first communication protocol including of a transceiver that communicates over an electrical power distribution wiring of a vehicle. The first communication protocol includes a powerline communications automotive network (PLCAN) delimiter type (DT) (PLCAN-DT), and a PLCAN variant length field in a frame control comprising payload length, a number of symbols used, a PHY block size, and a number of repetitions used, wherein broadcast addressing is used in the network to transmit messages.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: January 16, 2018
    Assignee: STMicroelectronics, Inc.
    Inventors: Oleg Logvinov, Bo Zhang, Huijuan Liu, Michael John Macaluso, James D. Allen
  • Patent number: 9870999
    Abstract: A device is provided that includes a first die having a first alignment structure that includes a plurality of first transmission columns arranged in a pattern and a second die positioned on the first die, the second die having a second alignment structure that includes a plurality of second transmission columns arranged in the same pattern as the first transmission columns. The first and second transmission columns are each coplanar with a first surface and a second surface of the first and second die, respectively.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: January 16, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventors: John H. Zhang, Walter Kleemeier, Paul Ferreira, Ronald K. Sampson
  • Patent number: 9865653
    Abstract: A memory cell includes a substrate layer, with a plurality of silicided semiconductor fins stacked on the substrate layer and spaced apart from one another. A first metal liner layer is stacked on the plurality of silicided semiconductor fins and on the substrate layer. A plurality of first contact pillars are stacked on the first metal liner layer adjacent a different respective one of the plurality of silicided semiconductor fins. A configurable resistance structure covers portions of the first metal liner layer that are stacked on the substrate layer and portions of the first metal liner layer that are stacked on each of the plurality of silicided semiconductor fins. A metal fill layer is stacked on the configurable resistance structure. A plurality of second contact pillars ism stacked on the metal fill layer adjacent a space between a different pair of adjacent silicided semiconductor fins of the plurality thereof.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: January 9, 2018
    Assignee: STMicroelectronics, Inc.
    Inventors: Qing Liu, John Hongguang Zhang
  • Patent number: 9865710
    Abstract: A dual width SOI FinFET is disclosed in which different portions of a strained fin have different widths. A method of fabrication of such a dual width FinFET entails laterally recessing the strained fin in the source and drain regions using a wet chemical etching process so as to maintain a high degree of strain in the fin while trimming the widths of fin portions in the source and drain regions to less than 5 nm. The resulting FinFET features a wide portion of the fin in the channel region underneath the gate, and a narrower portion of the fin in the source and drain regions. An advantage of the narrower fin is that it can be more easily doped during the growth of the epitaxial raised source and drain regions.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: January 9, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Qing Liu
  • Patent number: 9861720
    Abstract: One or more embodiments are directed to a microfluidic delivery system that dispenses a fluid in a direction that, at least in part, opposes gravity. In one embodiment, the microfluidic delivery system includes a microfluidic refill cartridge that is configured to be placed in a housing. The microfluidic refill cartridge includes at least one nozzle that faces upward or off to a side. The microfluidic refill cartridge includes a fluid transport member that allows fluid to travel upward from a fluid reservoir in opposition to gravity. A fluid path is located above the fluid transport member placing an end of the fluid transport member in fluid communication with a chamber and a nozzle. In response to the microfluidic delivery system receiving an electrical signal, an ejection element is configured to cause fluid in the chamber to be expelled through the nozzle.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: January 9, 2018
    Assignee: STMicroelectronics, Inc.
    Inventors: Simon Dodd, Joe Scheffelin, Dave Hunt, Tim Hoekstra, Faiz Sherman, Steve Bush
  • Patent number: 9866124
    Abstract: A fly-back type switched current regulator includes a primary transformer winding coupled to receive a rectified DC signal derived from an AC signal. The drain of a power transistor is coupled to the primary winding, with the source of the power transistor coupled to an input of a comparison circuit and a primary transformer winding sense resistor. A control terminal of the power transistor is coupled to an output of the comparison circuit. A capacitor stores a variable reference signal for application at a first capacitor terminal to another input of the differential circuit. The variable reference signal is compared to a winding current signal generated by the sense resistor by the comparison circuit. An injection circuit applies an AC signal derived from the rectified DC signal to a second terminal of the capacitor so as to modulate the stored variable reference signal. The regulator is coupled to drive LEDs.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: January 9, 2018
    Assignee: STMicroelectronics, Inc.
    Inventor: Thomas Stamm
  • Patent number: 9859303
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: January 2, 2018
    Assignees: International Business Machines Corporation, STMicroelectronics, Inc.
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • Patent number: 9859423
    Abstract: A hetero-channel FinFET device provides enhanced switching performance over a FinFET device having a silicon channel, and is easier to integrate into a fabrication process than is a FinFET device having a germanium channel. A FinFET device featuring the heterogeneous Si/SiGe channel includes a fin having a central region made of silicon and sidewall regions made of SiGe. A hetero-channel pFET device in particular has higher carrier mobility and less gate-induced drain leakage current than either a silicon device or a SiGe device. The hetero-channel FinFET permits the SiGe portion of the channel to have a Ge concentration in the range of about 25-40% and permits the fin height to exceed 40 nm while remaining stable.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: January 2, 2018
    Assignees: STMicroelectronics, Inc., Globalfoundries Inc., International Business Machines Corporation
    Inventors: Qing Liu, Ruilong Xie, Chun-chen Yeh, Xiuyu Cai
  • Patent number: 9860160
    Abstract: A method and apparatus for multipath switching using per-hop virtual local area network (VLAN) remapping is disclosed. In the method and apparatus, a data packet is forwarded for transmission over one of a first port and a second port. The device identifies a VLAN ID of the data packet as a second VLAN ID and changes the second VLAN ID to a first VLAN ID. Then one or more criteria of a classification set entry for forwarding the data packet over the second port are evaluated. The data packet is forwarded over the second port if the criteria are met and the data packet is associated with the second VLAN ID. Alternatively, the data packet is forwarded over the first port and is associated with the first VLAN ID if a dynamic entry specifies the data packet is to be forwarded over the first port.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: January 2, 2018
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Jonathan Evans, Lee Johnson, Amit Kumar Aggarwal
  • Patent number: 9853163
    Abstract: A vacuum channel transistor having a vertical gate-all-around (GAA) architecture provides high performance for high-frequency applications, and features a small footprint compared with existing planar devices. The GAA vacuum channel transistor features stacked, tapered source and drain regions that are formed by notching a doped silicon pillar using a lateral oxidation process. A temporary support structure is provided for the pillar during formation of the vacuum channel. Performance of the GAA vacuum channel transistor can be tuned by replacing air in the channel with other gases such as helium, neon, or argon. A threshold voltage of the GAA vacuum channel transistor can be adjusted by altering dopant concentrations of the silicon pillar from which the source and drain regions are formed.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: December 26, 2017
    Assignee: STMicroelectronics, Inc.
    Inventor: John H. Zhang
  • Patent number: 9847260
    Abstract: A method for co-integrating finFETs of two semiconductor material types, e.g., Si and SiGe, on a bulk substrate is described. Fins for finFETs may be formed in an epitaxial layer of a first semiconductor type, and covered with an insulator. A portion of the fins may be removed to form voids in the insulator, and the voids may be filled by epitaxially growing a semiconductor material of a second type in the voids. The co-integrated finFETs may be formed at a same device level.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: December 19, 2017
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Nicolas Loubet, Prasanna Khare, Qing Liu
  • Patent number: 9848284
    Abstract: A network services provider grants a subscription to a user for use of mobile network services to communicate voice, data, and text information with a specific mobile device. Mobile devices store one or more subscriptions, each of which may be activated. An activated subscription stored in the mobile device is now made portable. The user wants to pass the portable subscription from a first mobile device to a second mobile device. The user forms a first communicative relationship between the first mobile device and a second mobile device and receives from the second mobile device identification information associated with the second mobile device. The first mobile device passes the identification information to the network services provider and receives a confirmation. The user forms a second communicative relationship between the first mobile device and the second mobile device, and the second mobile device confirms activation of the portable subscription.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: December 19, 2017
    Assignee: STMICROELECTRONICS, INC.
    Inventor: Prasad Golla