Abstract: An embodiment of a data read path includes recovery and decoder circuits. The recovery circuit is operable to recover coded data from a storage medium, and the decoder circuit is operable to detect, in the recovered data, a write error that occurred during a writing of the coded data to the storage medium. For example, such an embodiment may allow detection of a write error that occurred while writing data to a bit-patterned storage medium.

Abstract: A self-powered tire pressure sensor device. The sensor device includes a power circuit, an air pressure measurement sensor, a signal circuit and a wireless transmission circuit. The power circuit converts mechanical acceleration experienced by the device into electrical potential using an electromechanical transducer. Mechanical acceleration due to collisions between the mobile sensor device and the wall of the tire while the tire is in motion cause the transducer to emit a small electrical charge. An electrical potential storage element in the power circuit accumulates and stores the charge as electrical potential. Alternatively the power circuit receives and converts electromagnetic energy into electrical potential. The electrical potential powers an air pressure measurement sensor within the tire. A signal circuit and wireless transmission circuit transmit the measurement to a chassis-mounted receiver, which makes the tire pressure measurement available to systems remote from the tire.

Abstract: An integrated circuit is configured for controlling automobile door lock motors. The circuit includes half-bridge driver circuits, with each half-bridge driver circuit having an output node configured to be coupled to a door lock motor. A control circuit is configured to control driver operation of the half-bridge driver circuits. A current regulator circuit senses current sourced by or sunk by at least one of the half-bridge circuits. The control circuit responds to the current regulator circuit and the sensed current by controlling the driver operation to provide for a regulated current to be sourced by or sunk by said half-bridge circuit. The control circuit further controls the half-bridge driver circuits to enter a tri-state mode in order to support the making of BEMF measurements on the motor.

Abstract: Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, an integrated circuit includes a standard cell having a first boundary, a second boundary opposite the first boundary, a third boundary interconnecting the first and second boundaries, and a fourth boundary opposite the third boundary and interconnecting the first and second boundaries. The standard cell further includes parallel active areas extending from the first boundary to the second boundary. Also, the standard cell has parallel gate strips extending from the third boundary to the fourth boundary and over the active areas. A cut mask overlies the gate strips. An interconnect is positioned overlying the cut mask and forms an electrical connection with a selected gate strip.

Abstract: Methods and systems are described for enabling the operation of a stereoscopic viewing device such that the viewing device provides a movable viewing window that enables the 3D rendering of 3D image data displayed by a backlit LCD device. In a particular implementation, the systems and methods disclosed herein are operable to control the operation of a pair of LCD shutter glasses.

Abstract: In an embodiment, a multi-carrier signal (e.g., an OFDM signal) is received over a channel. Indicators of interference and the channel response at a carrier frequency of the signal are determined, and compared. If the indicator of interference has a particular relationship to the indicator of the channel response, then a data value transmitted at the carrier frequency is recovered from a data value received at the carrier frequency according to a particular data-recovery algorithm. Because the particular data-recovery algorithm may be faster than a conventional data-recovery algorithm, recovering one or more data values with the particular algorithm may increase the speed at which data is recovered from a multicarrier signal as compared to using a conventional data-recovery algorithm.

Abstract: Silicon germanium regions are formed adjacent gates electrodes over both n-type and p-type regions in an integrated circuit. A hard mask patterned by lithography then protects structures over the p-type region while the silicon germanium is selectively removed from over the n-type region, even under remnants of the hard mask on sidewall spacers on the gate electrode. Silicon germanium carbon is epitaxially grown adjacent the gate electrode in place of the removed silicon germanium, and source/drain extension implants are performed prior to removal of the remaining hard mask over the p-type region structures.

Abstract: A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.

Abstract: In an embodiment, a transmitter includes a transmission path configurable to generate first pilot clusters in response to a matrix, each first pilot cluster including a respective first pilot subsymbol in a first cluster position and a respective second pilot subsymbol in a second cluster position such that a vector formed by the first pilot subsymbols is orthogonal to a vector formed by the second pilot subsymbols, the matrix having a dimension related to a number of cluster positions in each of the first pilot clusters. For example, where such a transmitter transmits simultaneous orthogonal-frequency-division-multiplexed (OFDM) signals (e.g., MIMO-OFDM signals) over respective channels that may impart inter-carrier interference (ICI) to the signals due to Doppler spread, the pattern of the pilot symbols that compose the pilot clusters may allow a receiver of these signals to estimate the responses of these channels more accurately than conventional receivers.

Abstract: A trench is opened in a dielectric layer. The trench is then lined with a sandwiched diffusion barrier and metal liner structure and a metal seed layer. The sandwiched diffusion barrier and metal liner structure includes a conformal metal liner layer sandwiched between a first diffusion barrier layer and a second diffusion barrier layer. The metal seed layer is at least lightly doped. The lined trench is then filled by electroplating with a metal fill material. A dielectric cap layer is then deposited over the metal filled trench. Dopant from the doped metal seed layer is then migrated to an interface between the metal filled trench and the dielectric cap layer to form a self-aligned metal cap.

Abstract: In a general aspect, an integrated circuit package includes a first electrode and a second electrode on a support substrate. The first electrode and the second electrode are configured to be electrically coupled to a voltage differential. A dendritic migration of a migratory species can develop under the voltage differential and a non-hermetic environment. The dendritic migration is interrupted by a floating electrical barrier mounted onto the support substrate between the first electrode and the second electrode. The electrical barrier includes a dam for preventing the metal migration. The dam has a height approximately equal to or greater than the largest dimension of a single atom of the migratory species. The first electrode and the second electrode can be mounted on the same side of the support substrate, or on two opposite sides of the support substrate.

Abstract: A trench is opened in a dielectric layer. The trench is then lined with a barrier layer and a metal seed layer. The metal seed layer is non-uniformly doped and exhibits a vertical doping gradient varying as a function of trench depth. The lined trench is then filled with a metal fill material. A dielectric cap layer is then deposited over the metal filled trench. Dopant from the non-uniformly doped metal seed layer is then migrated to an interface between the metal filled trench and the dielectric cap layer to form a self-aligned metal cap.

Abstract: For enhanced interoperability of safety and non-safety communications, a dual-radio type T RSU for improving services includes a first radio dedicated to the control channel and a second radio dedicated to the safety channel. The control channel is divided into a number of synchronous intervals, each about 100 milliseconds in duration. The safety channel is also divided into a number of synchronous intervals, each about 100 milliseconds in duration.

Abstract: Methods and systems are described for displaying enabling the transmission, formatting, and display of multimedia data after a hot plug event during a start-up dead period. In particular, approaches for transmission, formatting, and display of multimedia data in the absence or non-operation of a hot plug detect system or signal, so that multimedia information can be displayed in a proper format even during the dead period when no hot plug detect signal is received.

Abstract: Disclosed herein is a microfluidic jetting device having a piezoelectric member positioned above a displaceable membrane. A voltage is applied across the piezoelectric member causing deformation of the piezoelectric member. The deformation of the piezoelectric member results in a displacement of the membrane, which is formed above a cavity. Displacement of the membrane creates pressure to jet or eject liquid from the cavity and suction liquid into the cavity through ports or apertures formed in the in membrane.

Abstract: A trench is opened in a dielectric layer. The trench is then lined with a barrier layer and a metal seed layer. The metal seed layer is non-uniformly doped and exhibits a vertical doping gradient varying as a function of trench depth. The lined trench is then filled with a metal fill material. A dielectric cap layer is then deposited over the metal filled trench. Dopant from the non-uniformly doped metal seed layer is then migrated to an interface between the metal filled trench and the dielectric cap layer to form a self-aligned metal cap.

Abstract: A semiconductor device having a gate positioned in a recess between the source region and a drain region that are adjacent either side of the gate electrode. A channel region is below a majority of the source region as well as a majority of the drain region and the entire gate electrode.

Abstract: A semiconductor device may include a substrate, source and drain regions in the substrate, a recessed epitaxial channel layer in the substrate between the source and drain regions, and a high-K gate dielectric layer overlying the recessed epitaxial channel layer. The semiconductor device may further include a gate electrode overlying the high-K gate dielectric layer, a dielectric cap layer in contact with top and sidewall portions of the gate electrode, the dielectric cap layer having a lower dielectric constant than the high-K gate dielectric layer, and source and drain contacts coupled to the source and drain regions.

Abstract: In an embodiment, a multi-carrier signal (e.g., an OFDM signal) is received over a channel. First indicators of interference and channel response at a carrier frequency of the signal are determined and compared. If the first indicator of the interference has a relationship to the first indicator of the channel response, then a data value transmitted at the carrier frequency is recovered from a data value received at the carrier frequency according to a first algorithm. If, however, the first indicator of the interference does not have a first relationship to the first indicator of the channel response, then second indicators of interference and the channel response at the carrier frequency are determined and compared. If the second indicator of the interference has a second relationship to the second indicator of the channel response, then the data value transmitted at the carrier frequency is recovered from the data value received at the carrier frequency according to a second algorithm.

Abstract: A graded SiGe sacrificial layer is epitaxially grown overlying a silicon substrate. A single crystal silicon layer is then grown by an epitaxial process overlying the graded SiGe layer. A SiGe layer is next grown by an epitaxial process as a single crystal layer overlying the silicon layer. A subsequent silicon layer, which becomes the active silicon layer for the transistors, is epitaxially grown overlying the second silicon germanium layer. Together the epitaxially grown Si, SiGe and Si layers form a laminate semiconductor structure. A MOS transistor is then formed on the active area of the single crystal silicon. The graded SiGe sacrificial layer is removed by an etch process to electrically isolate the laminate semiconductor structure from the substrate.