Patents Assigned to STMicroelectronics, Inc.
  • Publication number: 20140119268
    Abstract: Methods and apparatus for implementing a robust unicast/broadcast/multicast protocol are provided. In one aspect, a method of avoiding collision of intra-basic service set unicast, broadcast or multicast transmissions notifies stations in the basic service set of a reserved transmit opportunity for a unicast, broadcast or multicast transmission. Transmissions from at least one station in the basic service set are deferred until after the reserved unicast, broadcast or multicast transmit opportunity.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 1, 2014
    Applicant: STMicroelectronics, Inc.
    Inventors: Liwen Chu, George A. Vlantis
  • Patent number: 8707580
    Abstract: A dryer having an improved automatic dryness detection circuit is provided. Wet clothing in the dryer bin contacts a sensor and causes a pulse to be sent to a microcontroller if the resistance of the clothes is low enough. The microcontroller disregards pulses which are shorter than a threshold time and counts pulses which are longer than a threshold time. The microcontroller issues a termination signal if the rate of pulses is lower than a threshold rate.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: April 29, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Thomas L. Hopkins
  • Publication number: 20140114492
    Abstract: In accordance with an embodiment, a method of operating an electronic system includes detecting an incoming transmission on a power line, and modifying a switching behavior of a switched-mode power supply coupled to the power line upon detecting the incoming transmission. Modifying reduces the level of interference produced by the switched-mode power supply.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: STMICROELECTRONICS INC.
    Inventor: Oleg Logvinov
  • Publication number: 20140111882
    Abstract: An interleave address generation circuit includes a plurality of linear feedback shift registers operable to generate addresses for permuting a data block in a first domain to a data block in a second domain on a subword basis. The interleave address generation circuit is operable to generate the lane addresses for each subword and the linear feedback registers configured to generate circulant addresses and sub-circulant address to map bits in each subword in the data block in the first domain to a corresponding subword in the second domain.
    Type: Application
    Filed: January 2, 2014
    Publication date: April 24, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Sivagnanam PARTHASARATHY, Shayan Srinivasa GARANI, Sudha THIPPARTHI
  • Patent number: 8703550
    Abstract: A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (SOI) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion. The dielectric liner stack is removed from above a top surface of a top semiconductor portion, followed by removal of a silicon nitride pad layer and an upper vertical portion of the dielectric metal oxide layer. A divot laterally surrounding a stack of a top semiconductor portion and a buried insulator portion is filled with a silicon nitride portion. Gate structures and source/drain structures are subsequently formed. The silicon nitride portion or the dielectric metal oxide layer functions as a stopping layer during formation of source/drain contact via holes, thereby preventing electrical shorts between source/drain contact via structures and the handle substrate.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: April 22, 2014
    Assignees: International Business Machines Corporation, STMicroelectronics, Inc., Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Bruce B. Doris, Shom Ponoth, Prasanna Khare, Qing Liu, Nicolas Loubet, Maud Vinet
  • Patent number: 8707236
    Abstract: A semiconductor device wherein a delay chain is integrated; the semiconductor device having a semiconductor layer. The delay chain includes a plurality of delay cells placed in the semiconductor layer and electrically connected to each other so as to form the delay chain. The semiconductor device includes a first and second metal lines respectively connected to a supply voltage and a reference voltage and placed in a longitudinal direction on a surface of the semiconductor layer; each delay cell of the plurality of cells is electrically connected with the first and second metal lines. Any delay cell and its successive or preceding delay cells of the delay chain are placed in a transversal direction with respect to the first or the second metal line.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: April 22, 2014
    Assignees: STMicroelectronics, Inc., STMicroelectronics S.r.l.
    Inventors: Carlo Alberto Romani, Corrado Giorgio Castiglione, Massimo Scipioni, Elvio Romanucci, Donato Tancredi
  • Patent number: 8704839
    Abstract: A sink device having a display panel capable of performing a video frame self-refresh as directed by a source device is described. A source determines that a video frame will persist (i.e., remain the same). In this situation, the frame data does not need to be repeatedly transmitted over a main link between the source and sink devices. The main link can be turned off and transmission can cease for a certain time thereby reducing power usage by the devices or system as a whole. The source ensures that the last frame transmitted to the sink is correct by performing CRC checks and then instructs the sink, via certain bit settings in a video status indication symbol, to store the last transmitted frame in the sink's local buffer and use that frame to refresh the panel. The source can then disable the self-refresh when the frame changes.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: April 22, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Osamu Kobayashi
  • Patent number: 8704479
    Abstract: A system and method for determining the start position of a motor. According to an embodiment, a voltage pulse signal may be generated across a pair of windings in a motor. A current response signal will be generated and based upon the position of the motor, the response signal will be greater in one pulse signal polarity as opposed to an opposite pulse signal polarity. The response signal may be compared for s specific duration of time or until a specific integration threshold has been reached. Further, the response signal may be converted into a digital signal such that a sigma-delta circuit may smooth out glitches more easily. In this manner, the position of the motor may be determined to within 60 electrical degrees during a startup.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: April 22, 2014
    Assignees: STMicroelectronics, Inc., STMicroelectronics S.r.l.
    Inventors: Frederic Bonvin, Davide Betta, Agostino Mirabelli, Andrea Di Ruzza
  • Patent number: 8705769
    Abstract: A frequency-domain upmix process uses vector-based signal decomposition and methods for improving the selectivity of center channel extraction. The upmix processes described do not perform an explicit primary/ambient decomposition. This reduces the complexity and improves the quality of the center channel derivation. A method of upmixing a two-channel stereo signal to a three-channel signal is described. A left input vector and a right input vector are added to arrive at a sum magnitude. Similarly, the difference between the left input vector and the right input vector is determined to arrive at a difference magnitude. The difference between the sum magnitude and the difference magnitude is scaled to compute a center channel magnitude estimate, and this estimate is used to calculate a center output vector. A left output vector and a right output vector are computed. The method is completed by outputting the left output vector, the center output vector, and the right output vector.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: April 22, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Earl C. Vickers
  • Publication number: 20140105418
    Abstract: A multiband dynamics compressor implements a solution for minimizing unwanted changes to the long-term frequency response. The solution essentially proposes undoing the multiband compression in a controlled manner using much slower smoothing times. In this regard, the compensation provided acts more like an equalizer than a compressor. What is applied is a very slowly time-varying, frequency-dependent post-gain (make-up gain) that attempts to restore the smoothed long-term level of each compressor band.
    Type: Application
    Filed: December 19, 2013
    Publication date: April 17, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventor: Earl Corban Vickers
  • Publication number: 20140106529
    Abstract: A thermal annealing flow process includes the steps of: depositing a metal or metal alloy on a silicon semiconductor structure, performing a first annealing of a rapid thermal anneal (RTA) type to produce a metal rich phase in a portion of the silicon semiconductor structure, removing unreacted metal or metal alloy and performing a second annealing as a millisecond annealing at a temperature that is below a melt temperature of the silicon material present in the silicon semiconductor structure.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 17, 2014
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS, INC.
    Inventors: Pierre Morin, Remi Beneyton
  • Publication number: 20140105098
    Abstract: A compressed header format is used for messages transmitted in a wireless network. The compressed header includes a first address field and a frame control field including at least one bit specifying whether the first address is for an access point of the wireless communications network. The frame control field may further include at least one additional bit identifying whether the frame is being relayed by a relay node positioned between the access point and a wireless station. The frame control field may further include at least one further bit identifying whether AID is used for the first address field.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 17, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Liwen Chu, George A. Vlantis
  • Publication number: 20140104714
    Abstract: A system and method for encoding a stream of bits with a run-length limited high-rate reverse order encoding schema. According to one embodiment, an RLL encoding block includes a receiver having a precoder operable to receive a stream of N-bits having symbols of M-bits in length, a histogram operable to identify an index symbol of M-bits that does not occur within the received stream of N-bits. It is this index symbol that may be used as the key to encoding a block of symbols so as to ensure unique decodability when RLL decoding. Finally, an encoder operable to perform an exclusive-or operation on each symbol with the next symbol stored in the stream. Such an encoding system only adds one symbol of M bits in length to a block of N bits and still results in a stream of bits sufficient to support high-rate requirements and strict timing loop control.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 17, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Hakan C. OZDEMIR, Razmik KARABED, Richard BARNDT, Kuhong JEONG
  • Publication number: 20140105419
    Abstract: Psychoacoustic bass audio signal enhancement can be accomplished using a monotonic, asymmetric polynomial distortion. A non-linear process applies a monotonic, asymmetric polynomial distortion function that has continuous first and second derivatives to generate even and odd harmonics of missing fundamental frequencies. This polynomial distortion produces the desired psychoacoustic effect with a fairly rapid roll-off so as to avoid unpleasant aliasing. Moreover, the lack of first-order discontinuities prevents clicks or glitches.
    Type: Application
    Filed: December 16, 2013
    Publication date: April 17, 2014
    Applicant: STMicroelectronics, Inc.
    Inventor: Earl Corban VICKERS
  • Publication number: 20140105131
    Abstract: A wireless network access point generates a fast initial link setup (FILS) discovery frame for broadcast to one or more wireless stations. The wireless network access point supports many operating channels including a primary channel. The FILS discovery frame includes a data field populated with an identification of a channel number for that primary channel of the wireless network access point. The FILS discovery frame includes another data field populated with a primary channel operating class identification. The broadcast FILS discovery frame further includes data indicating whether indicating whether multiple BSSIDs are supported. An FD capability field of the FILS discovery frame includes sub-fields indicating one or more of operation channel width, PHY type of the wireless access point, number of spatial streams supported by the wireless access point and multiple BSSIDs support provided by the wireless access point.
    Type: Application
    Filed: October 11, 2013
    Publication date: April 17, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Liwen Chu, George A. Vlantis
  • Publication number: 20140099769
    Abstract: Isolation trenches are etched through an active silicon layer overlying a buried oxide on a substrate into the substrate, and through any pad dielectric(s) on the active silicon layer. Lateral epitaxial growth of the active silicon layer forms protrusions into the isolation trenches to a lateral distance of at least about 5 nanometers, and portions of the isolation trenches around the protrusions are filled with dielectric. Raised source/drain regions are formed on portions of the active silicon layer including a dielectric. As a result, misaligned contacts passing around edges of the raised source/drain regions remain spaced apart from sidewalls of the substrate in the isolation trenches.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicants: INTERNATIONAL BUSINESS MACHINES CORP., STMICROELECTRONICS, INC.
    Inventors: Nicolas Loubet, Qing Liu, Shom Ponoth
  • Publication number: 20140099763
    Abstract: Embodiment of the present invention provides a method of forming a semiconductor device. The method includes providing a semiconductor substrate; epitaxially growing a silicon-carbon layer on top of the semiconductor substrate; amorphizing the silicon-carbon layer; covering the amorphized silicon-carbon layer with a stress liner; and subjecting the amorphized silicon-carbon layer to a solid phase epitaxy (SPE) process to form a highly substitutional silicon-carbon film. In one embodiment, the highly substitutional silicon-carbon film is formed to be embedded stressors in the source/drain regions of an nFET transistor, and provides tensile stress to a channel region of the nFET transistor for performance enhancement.
    Type: Application
    Filed: October 8, 2012
    Publication date: April 10, 2014
    Applicants: STMICROELECTRONICS, INC., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: EMRE ALPTEKIN, ABHISHEK DUBE, HENRY K. UTOMO, REINALDO A. VEGA, BEI LIU
  • Publication number: 20140099773
    Abstract: A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (SOI) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion. The dielectric liner stack is removed from above a top surface of a top semiconductor portion, followed by removal of a silicon nitride pad layer and an upper vertical portion of the dielectric metal oxide layer. A divot laterally surrounding a stack of a top semiconductor portion and a buried insulator portion is filled with a silicon nitride portion. Gate structures and source/drain structures are subsequently formed. The silicon nitride portion or the dielectric metal oxide layer functions as a stopping layer during formation of source/drain contact via holes, thereby preventing electrical shorts between source/drain contact via structures and the handle substrate.
    Type: Application
    Filed: December 4, 2013
    Publication date: April 10, 2014
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, STMICROELECTRONICS, INC.
    Inventors: Bruce B. Doris, Shom Ponoth, Prasanna Khare, Qing Liu, Nicolas Loubet, Maud Vinet
  • Patent number: 8694877
    Abstract: A modified soft output Viterbi algorithm (SOVA) detector receives a sequence of soft information values and determines a best path and an alternate path for each soft information value and further determines, when the best and alternate paths lead to the same value for a given soft information value, whether there is a third path departing from the alternate path that leads to an opposite decision with respect to the best path for a given soft information value. The SOVA detector then considers this third path when updating the reliability of the best path. The modified SOVA detector achieves max-log-map equivalence effectively through the Fossorier approach and includes modified reliability metric units for the first N stages of the SOVA detector, where N is the memory depth of a given path, and includes conventional reliability metric units for the remaining stages of the detector.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics, Inc.
    Inventors: Sivagnanam Parthasarathy, Lun Bin Huang, Alessandro Risso
  • Patent number: 8692761
    Abstract: An apparatus for displaying images. The apparatus comprises: an LCD panel comprising a plurality of pixels for displaying the images; and a backlight comprising a plurality of light sources. Each of the plurality of light sources is associated with one of a plurality of zones and each of the plurality of zones comprises a plurality of grid points. A controller coupled to the LCD panel and the backlight is configured to retrieve contour data associated with each of the plurality of light sources. The contour data is associated with a 3-D contour shape comprising a plurality of facets, each facet associated with at least one of the plurality of grids. The controller is configured to determine a brightness level of at least one pixel in a first grid based on a slope value associated with a first facet associated with the first grid.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: April 8, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Greg Neal