Abstract: A method of protecting a Rijndael-type algorithm executed by an electronic circuit against side channel attacks, wherein: each block of data to be encrypted or decrypted is masked with a first mask before applying a non-linear block substitution operation from a first substitution box, and is then unmasked by a second mask after the substitution; the substitution box is recalculated, block by block, before applying the non-linear operation, the processing order of the blocks of the substitution box being submitted to a random permutation; and the recalculation of the substitution box uses the second mask as well as third and fourth masks, the sum of the third and fourth masks being equal to the first mask.

Abstract: A read amplifier of a memory device has two current generators, an inverter, and five transistors. The inverter is connected to the second current generator. The first transistor has a gate connected to the read amplifier, a drain connected to the first current generator, and a source connected to a reference ground. The second transistor has a gate connected to the first current generator, a drain connected to a reference voltage, and a source connected to the gate of the first transistor. The third transistor has a drain connected to the first current generator and a source connected to the reference ground. The fourth transistor has a gate connected to the first current generator, a drain connected to the second current generator, and a source connected to the reference ground. The fifth transistor has a drain connected to the second current generator and a source connected to the reference voltage.

Abstract: A protection circuit for a transistor switch coupled to a power supply rail operates to modulate a control voltage at a control terminal of the transistor switch. A first circuit detects an overload across the terminals of the switch with respect to a threshold to generate a signal which modulates the control voltage. A second circuit operates to adjust a value of the threshold in response to sensed variations in a supply voltage at the power supply rail.

Abstract: An integrated circuit includes a semiconductor substrate and a multitude of electrically conductive pads situated between component zones of the semiconductor substrate and a first metallization level of the integrated circuit, respectively. The multitude of electrically conductive pads are encapsulated in an insulating region and include: first pads, in electrical contact with corresponding first component zones, and at least one second pad, not in electrical contact with a corresponding second component zone.

Abstract: A method is for controlling a change of an electromechanical component between a first operating state and a second operating state. The method may include changing from the first operating state to the second operating state by generating a first current flowing through the electromechanical component, prior to the generation of the first current, charging a capacitor, and simultaneously with the generation of the first current, partial discharging the capacitor through the electromechanical component to cause an additional current to flow in the electromechanical component, the additional current being added to the first current. The method may include changing from the second operating state to the first operating state by generating a second current flowing in a direction opposite to the first current in the electromechanical component, and prior to the flowing of the second current, discharging the capacitor.

Abstract: A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the received indication of the discharge time of the charge retention device.

Abstract: A circuit module of an integrated circuit is located in a first zone of a semiconductor substrate. A decoy cell includes an antenna above a second zone of the semiconductor substrate. The second zone is different from the first zone. A generation circuit operates to generate a decoy electrical signal on the basis of a first electrical signal that is characteristic of an operation of the circuit module and of at least one pseudo-random parameter. The decoy electrical signal is circulated through the antenna so as to generate a decoy electromagnetic radiation.

Abstract: An apparatus having a microcontroller includes a processing unit, an internal communication bus assembly, a volatile memory, a non-volatile memory, a logic error management circuit, and two interface circuits. A first interface circuit couples the processing unit to the volatile memory via the internal communication bus assembly. A second interface circuit couples the processing unit to the non-volatile memory via the internal communication bus assembly. When the microcontroller is operating, the interface circuits are arranged to retrieve and evaluate requested data from their respective memory without intervention from the processing unit. In the event a failure is detected, the logic error management circuit is arranged to assert a stop signal. In some cases, detecting a failure includes comparing a check value stored in memory with a check value calculated from the data retrieved from memory.

Abstract: A method for monitoring the execution of a program code by a monitoring program code may include storing instructions of the program code and instructions for monitoring the program code in the same program memory. Each instruction to be monitored and the associated monitoring instructions may be simultaneously extracted from the program memory, and the instruction to be monitored and the monitoring instructions may be executed.

Abstract: A device includes a thermally deformable assembly accommodated in a cavity of the interconnection part of an integrated circuit. The assembly can bend when there is a variation in temperature, so that its free end zone is displaced vertically. The assembly can be formed in the back end of line of the integrated circuit.

Abstract: In order to verify the authenticity of a product associated with a host device, the product contains, in segments of a non-volatile memory, several different functions stored in ciphered fashion. The host device sends a control signal for selecting and activating one of those ciphered functions. The product then deciphers and executes the function. The result of the function execution is then communicated back to host device when a decision on product authenticity is made.

Abstract: A device is provided for jamming electromagnetic radiation liable to be emitted by at least one portion of an interconnect region located above at least one zone of an integrated electronic circuit produced in and on a semiconductor substrate. The device includes an antenna located above the at least one zone of the circuit and generating circuit coupled to the antenna and configured to generate an electrical signal having at least one pseudo-random property to pass through the antenna.

Abstract: A method can be used for reducing a memory operation time in a non-volatile memory device having a memory array with a number of memory cells. The method includes performing a first execution of the memory operation on a set of memory cells by applying a first biasing configuration, storing information associated to the first biasing configuration, and performing a second execution, subsequent to the first execution, of the memory operation on the same set of memory cells by applying a second biasing configuration that is determined according to the stored information associated to the first biasing configuration.

Abstract: A method can be used to make a semiconductor device. A number of projecting regions are formed over a first semiconductor layer that has a first conductivity type. The first semiconductor layer is located on an insulating layer that overlies a semiconductor substrate. The projecting regions are spaced apart from each other. Using the projecting regions as an implantation mask, dopants having a second conductivity type are implanted into the first semiconductor layer, so as to form a sequence of PN junctions forming diodes in the first semiconductor layer. The diodes vertically extend from an upper surface of the first semiconductor layer to the insulating layer.

Abstract: An electronic chip includes a doped semiconductor substrate of a first conductivity type, a doped buried layer of a second conductivity type overlying the substrate, and a first doped well of the first conductivity type overlying the buried layer. Circuit components can be formed at a top surface of the first doped well and separated from the buried layer. A current detector is coupled to the buried layer and configured detect a bias current flowing into or out of the buried layer.

Abstract: A control method for real-time scene detection by a wireless communication apparatus equipped with at least one environmental measurement sensor is disclosed. A temporal adjustment of the instants of activation of the detection is based on measurement values delivered by the at least one environmental measurement sensor at instants of measurement.

Abstract: A method of communication between a first circuit and a second circuit coupled together over a two-line bus having a clock line and a data line. A power signal is provided to the second circuit over the two-line bus by setting the clock line and the data line to different potential levels. A bit is transmitted from one of the first circuit and the second circuit to the other of the first circuit and the second circuit by setting the data line to a potential level according to a state of the bit to be transmitted when the clock line is set at a first potential level. A bit is read in response to a transition of the clock line from the first potential level to a second potential level, different from the first potential level.

Abstract: A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.

Abstract: A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.

Abstract: The disclosure relates to an integrated circuit comprising a transistor comprising first and second conduction terminals and a control terminal. The integrated circuit further comprises a stack of a first dielectric layer, a conductive layer, and a second dielectric layer, the first conduction terminal comprising a first semiconductor region formed in the first dielectric layer, the control terminal comprising a second semiconductor region formed in the conductive layer, and the second conduction terminal comprising a third semiconductor region formed in the second dielectric layer.