Abstract: A circuit includes a first transistor and a second transistor having respective control terminals coupled to receive first and second bias voltages. A first electronic switch is coupled in series with, and between current paths of the first and second transistors to provide an output current line between a circuit output node and ground. A second electronic switch is selectively activated to a conductive state in order to provide a charge transfer current path between a bias node and a charge transfer node in the output current line. A third electronic switch is selectively activated to a conductive state in order to provide a charge transfer current path between the charge transfer node and the control terminal of the second transistor.

Abstract: A bottom semiconductor region is formed to include a main sub-region, extending through a bottom dielectric region that coats a semiconductor wafer, and a secondary sub-region which coats the bottom dielectric region and surrounds the main sub-region. First and second top cavities are formed through the wafer, delimiting a fixed body and a patterned structure that includes a central portion which contacts the main sub-region, and deformable portions in contact with the bottom dielectric region. A bottom cavity is formed through the bottom semiconductor region, as far as the bottom dielectric region, the bottom cavity laterally delimiting a stiffening region including the main sub-region and leaving exposed parts of the bottom dielectric region that contact the deformable portions and parts of the bottom dielectric region that delimit the first and second top cavities. The parts left exposed by the bottom cavity are selectively removed.

Abstract: A photovoltaic power generation plant includes a plurality of photovoltaic generators cooperative in producing photovoltaic power. Coupled with the photovoltaic generators in the plurality of photovoltaic generators are respective sensor devices, the sensor devices including sensor circuits of the individual current-to-voltage characteristics of the photovoltaic generators. The sensor circuits in the sensor devices can be activated to sense the individual current-to-voltage characteristics of the photovoltaic generators, with the individual current-to-voltage characteristic being indicative of the functionality of each photovoltaic generator.

Abstract: Local descriptors are extracted from digital image information and digital depth information related to digital images. The local descriptors convey appearance description information and shape description information related to the digital images. Global representations of the one or more digital images are generated based on the extracted local descriptors, and are hashed. Visual search queries are generated based on the hashed global representations. The visual search queries include fused appearance description information and shape description information conveyed in the local descriptors. The fusing may occur before the global representations are generated, before the hashing or after the hashing.

Abstract: A tag adapted to be applied to an object is disclosed. The tag includes a wireless communication interface, a processor and a memory. A univocal code, a cipher key and a count value are store in the memory. The tag generates a dynamic code as a function of the cipher key and the count value. Next, the tag varies the count value according to a determined operation, and stores the varied count value in the memory. The tag transmits the univocal code and the dynamic code to a reader device. The tag may transmit the univocal code and the dynamic code in a URL.

Abstract: An embodiment circuit includes a plurality of heat-generating circuits, a heat-sensitive circuit exposed to heat generated during operation of the plurality of heat-generating circuit, and a temperature sensor disposed at a location between the heat-sensitive circuit and the plurality of heat-generating circuits, the temperature sensor being configured to generate an over-temperature signal as a function of temperature sensed at the location. The plurality of heat-generating circuits may be selectively deactivatable in an ordered sequence based on deactivation weights respectively assigned to the plurality of heat-generating circuits and in response to the over-temperature signal.

Abstract: An input node is configured to receive a supply signal which may be of a first polarity or a second polarity opposite the first polarity. A high input current circuit couples the input node to an output node through at least one power transistor having a control electrode. A low input current circuit couples a supply current from the input node to control circuit configured to control the power transistor. A circuit is provided to detect polarity reversal with respect to the supply signal. A protection circuit for the low input current circuit operates to decouple the control circuit from the input node if the supply signal has the second polarity. A protection circuit for the high input current circuit operates to short-circuit the control electrode of the power transistor to the current path provided by the power transistor between the input node and the output node.

Abstract: A communication interface couples a transmission circuit with an interconnection network. The transmission circuit requests transmission of a predetermined amount of data. The communication interface receives data segments from the transmission circuit, stores the data segments in a memory, and verifies whether the memory contains the predetermined amount of data. When the memory contains the predetermined amount of data, the communication interface starts transmission of the data stored in the memory. Alternatively, when the memory contains an amount of data less than the predetermined amount of data, the communication interface determines a parameter that identifies the time that has elapsed since the transmission request or the first datum was received from the aforesaid transmission circuit, and verifies whether the time elapsed exceeds a time threshold. In the case where the time elapsed exceeds the time threshold, the communication interface starts transmission of the data stored in the memory.

Abstract: Apparatus and methods to unwarp at least portions of distorted, electronically-captured images are described. Keypoints, instead of an entire image, may be unwarped and used in various machine-vision algorithms, such as object recognition, image matching, and 3D reconstruction algorithms. When using unwarped keypoints, the machine-vision algorithms may perform reliably irrespective of distortions that may be introduced by one or more image capture systems.

Abstract: A process for manufacturing a MEMS pressure sensor having a micromechanical structure envisages: providing a wafer having a substrate of semiconductor material and a top surface; forming a buried cavity entirely contained within the substrate and separated from the top surface by a membrane suspended above the buried cavity; forming a fluidic-communication access for fluidic communication of the membrane with an external environment, set at a pressure the value of which has to be determined; forming, suspended above the membrane, a plate made of polysilicon, separated from the membrane by an empty space; and forming electrical-contact elements for electrical connection of the membrane and of the plate, which are designed to form the plates of a sensing capacitor, the value of capacitance of which is indicative of the value of pressure to be detected. A corresponding MEMS pressure sensor having the micromechanical structure is moreover described.

Abstract: A piezoelectric micro-machined ultrasonic transducer (PMUT) comprising: a semiconductor body having a first cavity and a membrane, which is suspended over the first cavity and faces a front side of the semiconductor body; and a piezoelectric transducer assembly extending at least in part on the membrane, which may be actuated for generating a deflection of the membrane. A second cavity extends buried in a peripheral region of the membrane and delimits a central region of the membrane. Moreover, the peripheral portion has a stiffness lower than the stiffness of the central portion.

Abstract: A method for activation of a payment card includes accessing a remote computer server of a card issuer to input card activation information, storing a unique code in the payment card having a contactless readable interface and in the remote computer server, the unique code corresponding to the payment card, and reading the unique code by a user terminal having a corresponding contactless interface. The method includes sending the unique code from the user terminal to the remote computer server, and upon verification of the unique code at the remote computer server, generating and sending an activation code to the user terminal and supplying access to an activation code input mask corresponding to the payment card. The method includes that upon submission of the activation code through the activation code input mask, comparing the submitted activation code with the generated activation code and, when matching, activating the payment card.

Abstract: A (pre) driver circuit includes first and second output terminals configured to be coupled to a power transistor. A differential stage has non-inverting and inverting inputs for receiving an input voltage. The input voltage is replicated as an output voltage across the first and second output terminals as a drive signal for the power transistor. The differential stage includes a differential transconductance amplifier in a voltage follower arrangement configured to provide continuous regulation of a voltage at the first output terminal with respect to the second output terminal.

Abstract: A microelectromechanical device having a first substrate of semiconductor material and a second substrate of semiconductor material having a bonding recess delimited by projecting portions, monolithic therewith. The bonding recess forms a closed cavity with the first substrate. A bonding structure is arranged within the closed cavity and is bonded to the first and second substrates. A microelectromechanical structure is formed in a substrate chosen between the first and second substrates. The device is manufactured by forming the bonding recess in a first wafer; depositing a bonding mass in the bonding recess, the bonding mass having a greater depth than the bonding recess; and bonding the two wafers.

Abstract: A sensor of volatile substances includes: a first electrode structure and a second electrode structure capacitively coupled, comb-fingered, and arranged coplanar in a plane; and a sensitive layer, of a sensitive material that is permeable to a volatile substance and has electrical permittivity depending upon a concentration of the volatile substance absorbed by the sensitive material. The sensitive layer extends from opposite sides of the plane.

Abstract: A Hall sensor may include a Hall sensing element configured to produce a Hall voltage indicative of a magnetic field when traversed by an electric current, and a first pair of bias electrodes mutually opposed in a first direction across the Hall sensing element. The Hall sensor may include a second pair of bias electrodes mutually opposed in a second direction across the Hall sensing element. The Hall sensor may include a first pair of sensing electrodes mutually opposed in a third direction across the Hall sensing element, and a second pair of sensing electrodes mutually opposed in a fourth direction across the Hall sensing element. The fourth direction may be orthogonal to the third direction, each sensing electrode being between a bias electrode of the first pair and a bias electrode of the second pair.

Abstract: A phase-change memory device includes a memory array including a first memory cell and a second memory cell, each comprising a phase-change element and a selector, connected respectively to a first local bitline and a second local bitline, which are in turn connected, respectively, to a first main bitline and a second main bitline. The parasitic capacitance of the main bitlines is precharged at a supply voltage. When the local bitlines are selected to access a respective logic datum stored in the phase-change element, the parasitic capacitance of the local bitlines is first charged using the charge previously stored in the parasitic capacitance of the main bitlines and then discharged through the respective phase-change elements. Reading of the logic datum is made by comparing the discharge times.

Abstract: A micromechanical device includes a fixed structure, a mobile portion rotatable about a first rotation axis, and a first actuation structure arranged between the fixed structure and the mobile portion to enable rotation of the mobile portion about the first rotation axis. The mobile portion includes a supporting structure, a tiltable platform rotatable about a second rotation axis, transverse to the first rotation axis, and a second actuation structure coupled between the tiltable platform and the supporting structure. Stiffening elements are arranged between the supporting structure and the fixed structure. The micromechanical device may be used within a picoprojector.

Abstract: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.

Abstract: A system includes a processing circuit and a circuit configured to output a given number N of bits of configuration information to be used by the processing circuit. The circuit includes a non-volatile programmable memory configured to output a first group of N bits, N terminals for receiving a second group of N bits, and N logic gates. A first input terminal of each logic gate is connected to a respective bit of output from the non-volatile programmable memory and wherein a second input terminal of each logic gate is connected to a respective terminal of the N terminals.