Abstract: A half-bridge driver circuit is configured to generate drive signals based on control signals. A processing circuit is configured to generate high side and low side control signals based on a control signal. An edge detector is configured to generate first and second signals in response to rising and falling edges in the control signal. A state machine transitions between states in response to the first and second signals, and is configured to sequentially, in response to the first signal, set the high side and low side control signals low; in response to the second signal, set the high side control signal high and the low side control signal low; in response to the first signal, set the high side and low side control signals low; and in response to the second signal, set the high side control signal low and the low side control signal high.

Abstract: MEMS device, in which a body made of semiconductor material contains a chamber, and a first column inside the chamber. A cap of semiconductor material is attached to the body and forms a first membrane, a first cavity and a first channel. The chamber is closed on the side of the cap. The first membrane, the first cavity, the first channel and the first column form a capacitive pressure sensor structure. The first membrane is arranged between the first cavity and the second face, the first channel extends between the first cavity and the first face or between the first cavity and the second face and the first column extends towards the first membrane and forms, along with the first membrane, plates of a first capacitor element.

Abstract: An electronic converter has first and second input terminals, first and second output terminals, a current regulator circuit arranged between the first input terminal and an intermediate node, and input capacitor arranged between the intermediate node and the second input terminal, and an output capacitor. A control circuit block is configured to sense an input voltage, compare the regulated voltage to a reference value and generate a first signal, compare the input voltage to a lower threshold and an upper threshold and generate a second signal, switch the electronic converter between an active mode and an idle mode as a function of the first signal, and switch the electronic converter between a recharge phase and a switching phase as a function of the second signal when the electronic converter is in the active mode.

Abstract: A MEMS device is obtained by forming a temporary biasing structure on a semiconductor body, and forming an actuation coil on the semiconductor body, the actuation coil having at least one first end turn, one second end turn and an intermediate turn arranged between the first and the second end turns and electrically coupled to the first end turn through the temporary biasing structure. In this way, the intermediate turn is biased at approximately the same potential as the first end turn during galvanic growth, and, at the end of growth, the actuation coil has an approximately uniform thickness. At the end of galvanic growth, portions of the temporary biasing structure are selectively removed to electrically separate the first end turn from the intermediate turn and from a dummy biasing region adjacent to the first end turn.

Abstract: A microelectromechanical device includes a fixed structure defining a cavity with a tiltable structure that is elastically suspended in the cavity. A piezoelectrically driven actuation structure, interposed between the tiltable structure and the fixed structure, is biased for causing rotation of the tiltable structure about a first rotation axis belonging to a horizontal plane in which the tiltable structure rests. The actuation structure includes a pair of driving arms carry respective regions of piezoelectric material and are elastically coupled to the tiltable structure on opposite sides of the first rotation axis through respective elastic decoupling elements. The elastic decoupling elements exhibit stiffness in regard to movements out of the horizontal plane and compliance to torsion about the first rotation axis.

Abstract: A microfluidic-based sensor, comprising: a semiconductor body, having a first and a second side opposite to one another in a direction; a buried channel, extending within the semiconductor body; a structural layer, of dielectric or insulating material, formed over the first side of the semiconductor body at least partially suspended above the buried channel; and a first thermocouple element, including a first strip, of a first electrical conductive material, and a second strip, of a second electrical conductive material different from the first electrical conductive material, electrically coupled to the first strip. The first thermocouple element is buried in the structural layer and partially extends over the buried channel at a first location. A corresponding manufacturing method is disclosed.

Abstract: A digital representation of a waveform is generated based on signals received during a recording period. The received signals include a digital clock signal providing a determined number of clock pulses during the recording period, a plurality of binary digital signals defining, for each clock pulse of the determined number of clock pulses, a waveform state associated with the clock pulse. A digital representation of the waveform is generated and stored. The waveform has a duration based on the recording period and a profile based on the defined waveform states associated with the clock pulses of the determined number of clock pulses.

Abstract: An AC/DC converter includes a first terminal and a second terminal to receive an AC voltage and a third terminal and a fourth terminal to deliver a DC voltage. A rectifying bridge is provided in the converter. A controllable switching or rectifying element has a control terminal configured to receive a control current. A first switch is coupled between a supply voltage and the control terminal to inject the control current. A second switch is coupled between the control terminal and a reference voltage to extract the control current. The first and second switches are selectively actuated by a control circuit.

Abstract: A control circuit controls a switching circuit of a resonant converter where the switching circuit includes first and second power switches. A first on time of the first power switch and a second on time of the second power switch are controlled to generate a square wave signal to drive the resonant circuit. The control circuit controls the first on time based on a zero current detection time indicating detection of a zero current crossing of a resonant current generated in the resonant circuit in response to the square wave signal and on a time shift delay time based on an output voltage of the resonant converter. The second on time of the second power switch control is based on the zero current detection time detected for the first power switch and on the time shift delay time.

Abstract: Various embodiments provide a resonant converter that includes a synchronous rectifier driver. The synchronous rectifier driver reduces voltage spikes on drains of transistors within the resonant converter by placing an active clamp between the drains of the transistors and an output terminal of the resonant converter. The active clamp reduces the voltage spikes by sinking current at the drains of the transistors to an output capacitor. By sinking the current to the output terminal, power loss is minimized and efficiency of the resonant converter is improved.

Abstract: A device includes an interface and Time Division Multiple Access (TDMA) Medium Access Control (MAC) circuitry coupled to the interface. The TDMA MAC circuitry detects a beacon in a frame having a defined frame duration and determines a frame compensation value based on a start time of the frame, a reference start time of the frame, and a number of elapsed frames. A current frame duration value is determined based on the frame compensation value and the defined frame duration.

Abstract: A probe card includes a number probes. Each probe is adapted to contact a corresponding terminal of a circuit integrated in at least one die of a semiconductor material wafer during a test phase of the wafer. The probes include at least one probe adapted to provide and/or receive a radio frequency test signal to/from the corresponding terminal during the test phase. The probe card further includes at least one electromagnetic shield structure corresponding to the at least one probe adapted to provide and/or receive the radio frequency test signal for the at least partial shielding of an electromagnetic field irradiated by such at least one probe adapted to provide and/or receive the radio frequency test signal.

Abstract: System for coupling light to integrated devices, comprising a grating coupler which couples light, such as light from a light source, into an optic fiber. The system includes an optic subsystem comprising a transmitter portion receiving the light emitted by the grating coupler and a receiver portion receiving light from the transmitter and focusing the light into the integrated device, the transmitter portion being configured to modify an angle distribution of the light emitted by the grating coupler and the receiving portion being configured to focus the light with modified angle distribution into the integrated device.

Abstract: A micro-electro-mechanical device, comprising a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region facing the first buried cavity; a second cavity facing the first buried cavity; a decoupling trench extending from the monolithic body and separating the sensitive region from a peripheral portion of the monolithic body; a cap die, forming an ASIC, bonded to and facing the first face of the monolithic body; and a first gap between the cap die and the monolithic body. The device also comprises at least one spacer element between the monolithic body and the cap die; at least one stopper element between the monolithic body and the cap die; and a second gap between the stopper element and one between the monolithic body and the cap die. The second gap is smaller than the first gap.

Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.

Abstract: An inductor and a shunt switch circuit are connected in parallel between an input node and an intermediate node. A first power transistor is connected between the intermediate node and a ground node. A second power transistor is connected between the intermediate node and an output node. The first and second power transistors are driven in response to a pulse width modulation (PWM) drive cycle having an on-time and an off-time. The input node receives a DC input voltage and a DC output voltage is generated at the output node. A control circuit senses the input and output nodes and determines whether the DC input voltage is within a threshold voltage of the DC output voltage. In response to that determination, the shunt switch circuit is turned on only during the off-time of the PWM drive cycle.

Abstract: In accordance with an embodiment, a method includes receiving an enable signal. After the enable signal is asserted, it is determined whether a soft-start capacitor is electrically connected to an input of a ramp generator circuit while keeping an output of the ramp generator circuit low. If the soft-start capacitor is electrically connected to the input of the ramp generator circuit, a first current is injected into the input of the ramp generator circuit to generate a first voltage ramp at the output of the ramp generator circuit. If the soft-start capacitor is not electrically connected to the input of the ramp generator circuit, a second current is injected to the input of the ramp generator circuit to generate a second voltage ramp at the output of the ramp generator circuit. The second current is smaller than the first current.

Abstract: A circuit includes: a communication interface configured to receive data; a plurality of output terminals; a bank of input registers coupled to the communication interface; a bank of buffer registers; a bank of output registers; a signal generator configured to generate a plurality of output signals based on respective registers of the bank of output registers at respective output terminals; and a conversion stage configured to: when data is received by the bank of input registers from the communication interface, sequentially convert content of the input registers of the bank of input registers and store the converted content into corresponding buffer registers of the bank of buffer registers based on a conversion function, and when the conversion stage finishes storing the converted content into the buffer registers, simultaneously copy content from the buffer registers into corresponding output registers of the bank of output registers.

Abstract: A circuit includes a power converter including an output node and a feedback port, which is configured to receive a feedback signal to control the output signal at the output node. The circuit further includes a feedback network coupled to both the output node and the feedback port of the power converter. The feedback network includes a combined voltage divider. The combined voltage divider includes a first branch and a second branch. The first branch is coupled between the output node of the power converter and a partition node coupled to the feedback port of the power converter. The second branch is coupled between the partition node and a ground voltage. The second branch of the combined voltage divider includes a modulation node between the partition node and the ground voltage.

Abstract: A power stage in an electronic fuse circuit is driven by controller. The controller includes a first comparator set for output voltage control and a second comparator set for output current control. Each comparator set includes at least one comparator having a reference input, a feedback input, and one or more outputs. A driver circuit includes output terminals for driving the power stage. The driver circuit includes a switch that is selectively activated in response to outputs from the first and second comparator sets to clamp the voltage across the output terminals of the driver circuit. The clamp operation is made in response to feedback input to either of the first and second comparator sets having exceeded a certain reference.