Abstract: To manufacture a redistribution layer for an integrated circuit, a first insulating layer is formed on a conductive interconnection layer of a wafer. A conductive body is then formed in electrical contact with the interconnection layer. The conductive body is then covered with an insulating region having an aperture that exposes a surface of the conductive body. The surface of the conductive body and the insulating region are then covered with an insulating protection layer having a thickness less than 100 nm. This insulating protection layer is configured to provide a protection against oxidation and/or corrosion of the conductive body.

Abstract: The present disclosure is directed to a method of manufacturing semiconductor devices that includes providing a substrate such as a leadframe having a non-etched adhesion promoter, NEAP layer over the die mounting surface and attaching thereon a semiconductor die having an attachment surface including a first and a second die areas that are wettable by electrically conductive solder material. The NEAP layer is selectively removed, e.g., via laser ablation, from the first substrate area and the second substrate area of the die mounting surface of the substrate. The first substrate area and the second substrate area of the substrate having complementary shapes with respect to the first and second die areas of the semiconductor die. Electrically conductive solder material is dispensed on the first and second substrate areas of the substrate.

Abstract: A semiconductor die includes a structural body that has a power region and a peripheral region surrounding the power region. At least one power device is positioned in the power region. Trench-insulation means extend in the structural body starting from the front side towards the back side along a first direction, adapted to hinder conduction of heat from the power region towards the peripheral region along a second direction orthogonal to the first direction. The trench-insulation means have an extension, in the second direction, greater than the thickness of the structural body along the first direction.

Abstract: A device include on-board memory, an applications processor, a digital signal processor (DSP) cluster, a configurable accelerator framework (CAF), and a communication bus architecture. The communication bus communicatively couples the applications processor, the DSP cluster, and the CAF to the on-board memory. The CAF includes a reconfigurable stream switch and data volume sculpting circuitry, which has an input and an output coupled to the reconfigurable stream switch. The data volume sculpting circuitry receives a series of frames, each frame formed as a two dimensional (2D) data structure, and determines a first dimension and a second dimension of each frame of the series of frames. Based on the first and second dimensions, the data volume sculpting circuitry determines for each frame a position and a size of a region-of-interest to be extracted from the respective frame, and extracts from each frame, data in the frame that is within the region-of-interest.

Abstract: To manufacture an oscillating structure, a wafer is processed by: forming torsional elastic elements; forming a mobile element connected to the torsional elastic elements; processing the first side of the wafer to form a mechanical reinforcement structure; and processing the second side of said wafer by steps of chemical etching, deposition of metal material, and/or deposition of piezoelectric material. Processing of the first side of the wafer is carried out prior to processing of the second side of the wafer so as not to damage possible sensitive structures formed on the first side of the wafer.

Abstract: A method includes performing, by a terminal with an access card, a first relay attack check for the access card in accordance with a local value associated with the terminal and a local value associated with the access card; determining, by the terminal, that the access card has passed the first relay attack check, and based thereon, performing, by the terminal with the access card, an authentication check of the access card in accordance with the local value associated with the terminal, the local value associated with the access card, and a local challenge value associated with the terminal; and determining, by the terminal, that the access card has passed the first relay attack check and the authentication check, and based thereon, validating, by the terminal, the access card.

Abstract: Embodiments are directed towards a method to create a reconfigurable interconnect framework in an integrated circuit. The method includes accessing a configuration template directed toward the reconfigurable interconnect framework, editing parameters of the configuration template, functionally combining the configuration template with a plurality of modules from an IP library to produce a register transfer level (RTL) circuit model, generating at least one automated test-bench function, and generating at least one logic synthesis script. Editing parameters of the configuration template includes confirming a first number of output ports of a reconfigurable stream switch and confirming a second number of input ports of the reconfigurable stream switch. Each output port and each input port has a respective architectural composition. The output port architectural composition is defined by a plurality of N data paths including A data outputs and B control outputs.

Abstract: A method for making a micro-electro mechanical (MEMS) device includes forming a MEMS mirror stack on a handle layer, and applying a first bonding layer to the MEMS mirror stack. The method continues with disposing a substrate on the first bonding layer such that the MEMS mirror stack is mechanically anchored to the substrate and so as to seal against ingress of environmental contaminants, removing the handle layer, and applying a second bonding layer to the MEMS mirror stack. A cap layer is disposed on the second bonding layer such that the cap layer is mechanically anchored to the MEMS mirror stack and so as to seal against ingress of environmental contaminants.

Abstract: A variable duty cycle switching signal at a switching frequency is applied to a switching current regulation circuit arrangement energizing a current storage circuit assembly. Switching of the variable duty cycle switching signal is controlled by an upper and a lower threshold current level. The upper and lower threshold current levels vary with time following an average current value time variation. Additionally, frequency jitter is introduced in the variable duty cycle switching signal by: defining at least a frequency modulation window around a limit frequency identifying a limit value for an acceptable EMI; and applying an amplitude modulation of the upper and/or lower threshold current levels varying with time, wherein the amplitude modulation is applied in a time interval between times when the switching frequency enters and exit the frequency window.

Abstract: Hall sensing signals are received in a spinning readout pattern of subsequent readout phases, wherein the pattern is cyclically repeated at a spinning frequency and a polarity of the Hall sensor signals is reversed in two non-adjacent readout phases of the readout pattern. A signal storage circuit includes signal storage capacitors. An accumulation circuit includes accumulation capacitors. A switch network is selectively actuated to couple the signal storage capacitors with the accumulation capacitors synchronously with phases in the spinning readout pattern in subsequent alternating first and second periods. The spinning output is stored with alternating opposite signs on the signal storage capacitors and the Hall sensing signals are stored in the signal storage capacitors and then accumulated on the accumulation capacitors with alternate signs in subsequent periods. The accumulated output signal is then demodulated with a demodulation frequency half the spinning frequency.

Abstract: An embodiment circuit comprises a plurality of processing units, a plurality of data memory banks configured to store data, and a plurality of coefficient memory banks configured to store twiddle factors for fast Fourier transform processing. The processing units are configured to fetch, at each of the FFT computation stages, input data from the data memory banks with a burst read memory transaction, fetch, at each of the FFT computation cycles, different twiddle factors in a respective set of the twiddle factors from different coefficient memory banks of the coefficient memory banks, process the input data and the set of twiddle factors to generate output data, and store, at each of the FFT computation stages, the output data into the data memory banks with a burst write memory transaction.

Abstract: A device for detecting a chemical species, including a Geiger-mode avalanche diode, which includes a body of semiconductor material delimited by a front surface. The semiconductor body includes: a cathode region having a first type of conductivity, which forms the front surface; and an anode region having a second type of conductivity, which extends in the cathode region starting from the front surface. The detection device further includes: a sensitive structure arranged on the anode region and including at least one sensitive region, which has an electrical permittivity that depends upon the concentration of the chemical species; and a resistive region, arranged on the sensitive structure and electrically coupled to the anode region.

Abstract: An avalanche photodiode for detecting ultraviolet radiation, including: a silicon carbide body having a first type of conductivity, which is delimited by a front surface and forms a cathode region; an anode region having a second type of conductivity, which extends into the body starting from the front surface and contacts the cathode region; and a guard ring having the second type of conductivity, which extends into the body starting from the front surface and surrounds the anode region.

Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.

Abstract: Technological advancements are disclosed that utilize inertial sensor data associated with a device to determine a new feature array and if the new feature array is within an existing class within a state space associated with the inertial sensor data. In response to the new feature array being included in the existing class, the new feature array is added to the existing class and a representation of the existing class in the state space is updated based on the new feature array and an existing representation of the existing class. In response to the new feature array not being included in the existing class, a new class is created based on the new feature array.

Abstract: A gyroscopic sensor unit detects a phase drift between a demodulated output signal and demodulation signal during output of a quadrature test signal. A delay calculator detects the phase drift based on changes in the demodulated output signal during application of the quadrature test signal. A delay compensation circuit compensates for the phase drift by delaying the demodulation signal by the phase drift value.

Abstract: An integrated semiconductor device includes: a MEMS structure; an ASIC electronic circuit; and conductive interconnection structures electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.

Abstract: A system for detection of a touch gesture of a user on a detection surface includes a processing unit, an electrostatic-charge-variation sensor, which generates a charge-variation signal; and an accelerometer, which generates an acceleration signal. The processing unit is configured to: detect, in the charge-variation signal, a first feature identifying the touch; detect, in the acceleration signal, a second feature identifying the touch; detect a temporal correspondence between the first and second features identifying the touch gesture; and validate the touch gesture only in the case where both the first and second features have been detected and the temporal correspondence satisfies a pre-set relation.

Abstract: An embodiment DC switching converter comprises first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.

Abstract: An electronic device comprising: a semiconductor body of silicon carbide; a first insulating layer on a first surface of the semiconductor body, of a first material with electrical-insulator or dielectric characteristics; a first layer of metal material extending in part on the first surface of the semiconductor body and in part on the first insulating layer; an interface layer on the first layer of metal material and on the first insulating layer, of a second material different from the first material; and a passivation layer of the first material on the interface layer. The first material is silicon oxide, and the second material is silicon nitride.