Abstract: A method and apparatus for adaptive rectification for preventing current inversion in motor windings are provided. In the method and apparatus, first and second half bridges of a plurality of half bridges are operated to synchronously rectify and permit passage of current, through the windings of the motor, in a first direction. A change of direction of the current from the first direction to a second direction opposite the first direction is detected. In response to detecting that the current changed direction to the second direction, the first and second half bridges of the plurality of half bridges are operated to quasi-synchronously rectify and block passage of the current through the windings in the second direction.

Abstract: A semiconductor power device has a maximum nominal voltage and includes: a first conduction terminal and a second conduction terminal; a semiconductor body, containing silicon carbide and having a first conductivity type; body wells having a second conductivity type, housed in the semiconductor body and separated from one another by a body distance; source regions housed in the body wells; and floating pockets having the second conductivity type, formed in the semiconductor body at a distance from the body wells between a first face and a second face of the semiconductor body.

Abstract: The present disclosure is directed to a MEMS gyroscope formed by a substrate and a movable mass suspended on the substrate and configured to carry out a movement in a driving direction and in a detection direction perpendicular to each other. The movable mass has a first face and a second face opposite to the first face. The gyroscope also has a first and a second quadrature compensation electrode group, fixed to the substrate and capacitively coupled to the movable mass. The first quadrature compensation electrode group faces the first face of the movable mass, and the second quadrature compensation electrode group faces the second face of the movable mass. The first and the second quadrature compensation electrode groups each have a respective variable facing area on the movable mass as a result of the movement of the movable mass in the driving direction and are configured to exert an electrostatic force on the movable mass during the movement of the movable mass in the driving direction.

Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.

Abstract: In an embodiment a ring oscillator circuit includes a chain of cascade-coupled inverter stages coupled between an oscillator supply voltage node and a reference voltage node, the oscillator supply voltage node configured to provide an oscillator supply voltage, a current generator circuit coupled between the oscillator supply voltage node and a system supply voltage node configured to provide a system supply voltage, the current generator circuit being configured to inject a current into the oscillator supply voltage node and a biasing circuit including a first bias control transistor and a second bias control transistor coupled in series between the reference voltage node and the oscillator supply voltage node, wherein the first bias control transistor is configured to selectively couple the reference voltage node and the oscillator supply voltage node in response to the oscillator control signal being indicative that the ring oscillator circuit is in an inactive operation state.

Abstract: Manufacturing a semiconductor device, such as an integrated circuit, comprises: providing a leadframe having a die pad area, attaching onto the die pad area of the leadframe one or more semiconductor die or dice via soft-solder die attach material, and forming a device package by molding package material onto the semiconductor die or dice attached onto the die pad area of the leadframe. An enhancing layer, provided onto the leadframe to counter device package delamination, is selectively removed via laser beam ablation from the die pad area, and the semiconductor die or dice are attached onto the die pad area via soft-solder die attach material provided where the enhancing layer has been removed to promote wettability by the soft-solder material.

Abstract: An embodiment method comprises receiving a satellite signal in a tracking channel, generating a set of replicas of a pseudo random noise sequence, comprising a punctual replica and a plurality of replicas that are different in time with respect to the punctual replica over a given time spacing, correlating the received signal with each replica to obtain amplitude correlation values, monitoring the tracking channel to detect a spoofed signal by generating a further plurality of replicas of the pseudo random noise sequence having a respective time spacing greater than the given time spacing, correlating the received signal of the tracking channel with each further replica to obtain further amplitude correlation values, calculating a shape anomaly factor based on the further correlation amplitude values, verifying the shape anomaly factor is greater than a given shape anomaly threshold, and signaling detection of a spoofed signal on the tracking channel.

Abstract: A microelectromechanical system (MEMS) accelerometer sensor has a mobile mass and a sensing capacitor. To self-test the sensor, a test signal having a variably controlled excitation voltage and a fixed pulse width is applied to the sensing capacitor. The leading and trailing edges of the test signal are aligned to coincide with reset phases of a sensing circuit coupled to the sensing capacitor. The variably controlled excitation voltage of the test signal is configured to cause an electrostatic force which produces a desired physical displacement of the mobile mass. During a read phase of the sensing circuit, a variation in capacitance of sensing capacitor due to the actual physical displacement of the mobile mass is sensed for comparison to the desired physical displacement.

Abstract: In start-up, current is sourced by a current source to a first plate of a first capacitor while a second capacitor is maintained at zero charge. In a subsequent first operating phase, current is sourced to a first plate of the second capacitor while a second plate of the first capacitor is connected to the first plate of the second capacitor. At the end of the first operating phase, the first capacitor is discharged. In a subsequent second operating phase, current is sourced to the first plate of the first capacitor while a second plate of the second capacitor is connected to the first plate of the first capacitor. At the end of the second operating phase, the second capacitor is discharged. Steady state operation of the circuit involves an alternation of the first and second operating phases interleaved with transition phases where the first and second capacitors are discharged.

Abstract: The present disclosure is directed to a detection method of a first or second state of a foldable electronic device including a first and a second hardware element tiltable to each other and accommodating a first and a second electrode which are in contact with each other when the foldable electronic device is in the first state and at a distance from each other otherwise. The detection method includes: acquiring a first and a second charge variation signal indicative of environmental electric/electrostatic charge variations detected by the first and second electrodes; generating a differential signal indicative of a difference between the first and the second charge variation signals; generating, as a function of the differential signal, one or more feature signals; and generating, as a function of the one or more feature signals, a contact signal indicative of the first or second states of the foldable electronic device.

Abstract: A process for manufacturing a silicon carbide device from a body of silicon carbide having a back surface, wherein a first layer of a first metal is formed on the back surface of the body; a second layer of a second metal, different from the first metal, is formed on the first layer to form a multilayer, the first or the second metal being nickel or a nickel alloy and forming a nickel-based layer, another of the first or the second metal being a metal X, capable to form stable compounds with carbon and forming an X-based layer; and the multilayer is annealed to form a mixed layer including nickel silicide and at least one of X carbide or a metal X-carbon ternary compound.

Abstract: A chip for biochemical reactions comprising: a first body including a plurality of first through openings arranged according to an arrangement pattern; a second body, having a hydrophilic surface, coupled to the first body on the hydrophilic surface; and an intermediate layer, which extends over the hydrophilic surface and forms a coupling interface between the first and the second bodies. The intermediate layer is of hydrophobic material, extends continuously over the hydrophilic surface, and has a plurality of second through openings through which respective regions of the hydrophilic surface are exposed. The hydrophilic regions may be functionalized for carrying out a PCR.

Abstract: A Chemical Mechanical Polishing, CMP, process applied to a wafer of Silicon Carbide having a thickness of, or lower than, 200 ?m, comprising the steps of: arranging the wafer on a supporting head of a CMP processing apparatus, the wafer having a front side and a back side opposite to one another, the front side housing at least one electronic component and being coupled to the supporting head; deliver a polishing slurry on the wafer, wherein the polishing slurry has a pH in the range 2-3; pressing the back side of the wafer against a polishing pad of the CMP apparatus exerting, by the supporting head, a pressure on the polishing pad in the range 5-20 kPa; setting a rotation of the polishing pad in the range 30-180 rpm, and setting a rotation of polishing head in the range 30-180 rpm; setting and maintaining a CMP process temperature equal to, or below, 50° C.

Abstract: PMUT acoustic transducer formed in a body of semiconductor material having a face and accommodating a plurality of first buried cavities, having an annular shape, arranged concentrically with each other and extending at a distance from the face of the body. The first buried cavities delimit from below a plurality of first membranes formed by the body so that each first membrane extends between a respective first buried cavity of the plurality of first buried cavities and the face of the body. A plurality of piezoelectric elements extend on the face of the body, each piezoelectric element extending above a respective first membrane of the plurality of first membranes. The first membranes have different widths, variable between a minimum value and a maximum value.

Abstract: A power switch current sensing circuit includes matching first and second transistors having sources connected to first and second terminals, respectively, of the power switch. A current mirror has a first node coupled to a drain of the first transistor and a second node coupled to a drain of the second transistor. The current mirror sinks a current from the first node equal to a current flowing through the second transistor. A biasing circuit provides a same biasing voltage to the control terminals of the first and second transistors. An output resistance is coupled between the first node and a reference voltage node. A difference between a current flowing through the first transistor and the current sunk by the current mirror circuit from the first node flows through the output resistance. An output voltage produced at the first node is indicative of the current flowing through the power switch.

Abstract: An input signal arranged in frames is received. The frames include a cyclic redundancy check (CRC) field including a number of bits having bit edges. A timing signal is generated to include adjustable duration waveforms at one of a first duration value and a second duration value. A CRC check determines the occurrence, over the duration, of a number of waveforms of the timing signal having their duration adjusted to one of the first duration value and the second duration value which corresponds to the number of bits. A check signal is produced having a pass/fail value. If pass, the duration of the waveforms in the timing signal is maintained adjusted to the one of the first duration value and the second duration value. If fail, the duration of the waveforms in the timing signal is re-adjusted to the other of the first duration value and the second duration value.

Abstract: A three-phase load is powered by a PWM (e.g., SVPWM) driven DC-AC inverter having a single shunt-topology. A shunt voltage and a branch voltage of the inverter (across a transistor to be calibrated) are measured during a second period of each SVPWM sector, and the drain-to-source resistance of the calibrated transistor is calculated. During the fourth period of each SVPWM sector, the branch voltage is measured again, and another branch voltage across another transistor is measured. Using the drain-to-source resistance of the calibrated transistor and the voltage across the calibrated transistor measured during the fourth period, the phase current through the calibrated transistor is calculated. Using the other branch voltage measured during the fourth period and the drain-to-source resistance of its corresponding transistor (known from a prior SVPWM sector), the phase current through that transistor is calculated. From the two calculated phase currents, the other phase current can be calculated.

Abstract: A delta-sigma modulation circuit has a sampling period and, in operation, generates a delta-sigma modulated signal based on the analog input signal. The delta-sigma modulation circuit includes: a first integrator; an analog-to-digital converter; a feedback-loop coupled between an input of the first integrator and the output interface; a second integrator coupled between the first integrator and the analog-to-digital converter. The delta-sigma modulation circuit has loop-delay compensation circuitry having a plurality of switches. The loop delay compensation circuitry, in operation, controls the plurality of switches based on a time interval of a duration of half the sampling period and generates a loop-delay compensation signal.

Abstract: An LED lighting system includes switching circuity adjustably driving a string of LEDs and being controlled by a reference current and an enable signal. A controller generates the reference current and enable signal based upon a PWM signal such that the switching circuitry: sources a first LED current to the string of LEDs that is proportional to a duty cycle of the PWM signal when the duty cycle is greater than a threshold duty cycle to thereby perform analog dimming; and sources a second LED current to the string of LEDs that has a duty cycle proportional to the duty cycle of the PWM signal when the duty cycle of the PWM signal is less than the threshold duty cycle, such that an average LED current delivered to the string of LEDs is proportional to the duty cycle of the PWM signal to thereby perform digital dimming.

Abstract: Provided is a circuit including a switching transistor having a control terminal configured to receive a control signal and having a current flow path therethrough. The switching transistor becomes conductive in response to the control signal having a first value. The current flow path through the switching transistor provides a current flow line between two nodes. In a non-conductive state, a voltage drop stress is across the switching transistor. The circuit comprises a sense transistor that is coupled to and a scaled replica of the switching transistor. The sense transistor has a sense current therethrough. The sense current is indicative of the current of the switching transistor. The circuit includes coupling circuitry configured to apply the voltage drop stress across the sense transistor in response to the switching transistor being non-conductive. In the non-conductive state, the voltage drop stress is replicated across both the switching transistor and the sense transistor.