Abstract: The present disclosure relates to an electronic device comprising a semiconductor substrate and transistors having their gates contained in trenches extending in the semiconductor substrate, each transistor comprising a doped semiconductor well of a first conductivity type, the well being buried in the semiconductor substrate and in contact with two adjacent trenches among said trenches, a first doped semiconductor region of a second conductivity type, covering the well, in contact with the well, and in contact with the two adjacent trenches, a second doped semiconductor region of the second conductivity type more heavily doped than the first semiconductor region, extending in the first semiconductor region, and a third doped semiconductor region of the first conductivity type, more heavily doped than the well, covering the well, in contact with the first region, and extending in the semiconductor substrate in contact with the well.

Abstract: A non-emissive display includes a backlight controller sending a pulse during each sub-frame of a plurality of frames to row and column drivers that drive backlight zones. The row drivers count each pulse to keep a pulse count total, and reset the pulse count total when it is equal to a first number indicating how many row drivers are present. Each row driver activates its channels and waits for a next pulse if the pulse count total is not equal to the first number and if the pulse count total is equal to a second number indicating in which sub-frame that first driver is to be activated. Each row driver waits for a next pulse if the pulse count total is not equal to the first number and the second number. Each column driver activates its channel in response to receipt of each pulse.

Abstract: A device includes a circular buffer, which, in operation, is organized into a plurality of subsets of buffers, and control circuitry coupled to the circular buffer. The control circuitry, in operation, receives a memory load command to load a set of data into the circular buffer. The memory load command has an offset parameter indicating a data offset and a subset parameter indicating a subset of the plurality of subsets into which the circular buffer is organized. The control circuitry responds to the command by identifying a set of buffer addresses of the circular buffer based on a value of the offset parameter and a value of the subset parameter, and loading the set of data into the circular buffer using the identified set of buffer addresses.

Abstract: An energy harvester includes an elongated tubular casing extending around a longitudinal axis between opposed first and second ends. A body is arranged in the casing. A helical electrical winding is wound around the longitudinal axis. The body is arranged to move along the longitudinal axis with alternate motion away from the first end towards the second end and away from the second end towards the first end. As a result of this alternate motion, an electromotive force is produced in the at least one helical electrical winding. Furthermore, at least one of the first and second ends includes a piezoelectric transducer that is configured to co-operate in a kinetic energy transfer relationship with the at least one body to generate an electric voltage as a result of the at least one body reaching, in the alternate motion, an end-of-travel position towards the piezoelectric transducer.

Abstract: A microfluidic device for continuous ejection of fluids includes: a semiconductor body that laterally delimits chambers; an intermediate structure which forms membranes each delimiting a top of a corresponding chamber; and a nozzle body which overlies the intermediate structure. The device includes, for each chamber: a corresponding piezoelectric actuator; a supply channel which traverses the intermediate structure and communicates with the chamber; and a nozzle which traverses the nozzle body and communicates with the supply channel. Each actuator is configured to operate i) in a resting condition such that the pressure of a fluid within the corresponding chamber causes the fluid to pass through the supply channel and become ejected from the nozzle as a continuous stream, and ii) in an active condition, where it causes a deformation of the corresponding membrane and a consequent variation of the pressure of the fluid, causing a temporary interruption of the continuous stream.

Abstract: A semiconductor die and an electrically conductive ribbon are arranged on a substrate. The electrically conductive ribbon includes a roughened surface. An insulating encapsulation is molded onto the semiconductor die and the electrically conductive ribbon. The roughened surface of the electrically conductive ribbon provides a roughened coupling interface to the insulating encapsulation.

Abstract: A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.

Abstract: Process for manufacturing a microfluidic device, wherein a sacrificial layer is formed on a semiconductor substrate; a carrying layer is formed on the sacrificial layer; the carrying layer is selectively removed to form at least one release opening extending through the carrying layer; a permeable layer of a permeable semiconductor material is formed in the at least one release opening; the sacrificial layer is selectively removed through the permeable layer to form a fluidic chamber; the at least one release opening is filled with non-permeable semiconductor filling material, forming a monolithic body having a membrane region; an actuator element is formed on the membrane region and a cap element is attached to the monolithic body and surrounds the actuator element.

Abstract: A converter circuit includes first and second electronic switches coupled at an intermediate node, with an inductor coupled between the intermediate node and an output node. Switching drive control circuitry causes the first and the second electronic switch to switch between a conductive state and a non-conductive state. The drive control circuitry includes a first feedback signal path to control switching of the first and the second electronic switch as a function of the difference between a feedback signal indicative of the signal at the output node and a reference value. A second feedback signal path includes a low-pass filter coupled to the output node and configured to provide a low-pass filtered feedback signal resulting from low-pass filtering of the output signal. The second feedback signal path compensates the feedback signal as a function of the difference between the low-pass filtered feedback signal and a respective reference value.

Abstract: A method comprises molding laser direct structuring material onto at least one semiconductor die, forming resist material on the laser direct structuring material, producing mutually aligned patterns of electrically-conductive formations in the laser direct structuring material and etched-out portions of the resist material having lateral walls sidewise of said electrically-conductive formations via laser beam energy, and forming electrically-conductive material at said etched-out portions of the resist material, the electrically-conductive material having lateral confinement surfaces at said lateral walls of said etched-out portions of the resist material.

Abstract: Methods of forming a semiconductor device comprising a lead-frame having a die pad having at least one electrically conductive die pad area and an insulating layer applied onto the electrically conductive die pad area. An electrically conductive layer is applied onto the insulating layer with one or more semiconductor dice coupled, for instance adhesively, to the electrically conductive layer. The electrically conductive die pad area, the electrically conductive layer and the insulating layer sandwiched therebetween form at least one capacitor integrated in the device. The electrically conductive die pad area comprises a sculptured structure with valleys and peaks therein; the electrically conductive layer comprises electrically conductive filling material extending into the valleys in the sculptured structure of the electrically conductive die pad area.

Abstract: A circuit receives an input signal having a first level and a second level. A logic circuit includes a finite state machine circuit, an edge detector circuit, and a timer circuit. The finite state machine circuit is configured to set a mode of operation of the circuit. The edge detector circuit is configured to detect a transition between the first and second level. The timer circuit is configured to determine whether the first or second level is maintained over an interval, which starts from a transition detected by the edge detector circuit. The finite state machine circuit is configured to change the mode of operation based on the timer circuit determining that the first or second level has been maintained over the interval.

Abstract: A converter includes two switching stages coupled in series between positive and negative input terminals. A control circuit is configured for driving the switching stages based on an output voltage of the converter. A first switching stage includes two switches coupled in series between a positive input terminal and a first node. A capacitor and an inductor are coupled in series between the two switches and a positive output terminal. A third switch is coupled between a node between the capacitor and the inductor and the negative input terminal. A second capacitor is coupled between the first node and the negative input terminal. A second switching stage includes a second node coupled to the first node. Two additional electronic switches are coupled in series between the second node and the negative input terminal. A second inductor is coupled between the two additional switches and the positive output terminal.

Abstract: Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.

Abstract: A pressure sensor including: a structure which delimits a main cavity of a closed type, the structure being at least partially deformable as a function of a pressure external to the structure; and a MEMS device, which is arranged in the main cavity and generates an output signal, which is of an electrical type and is indicative of the pressure inside the main cavity.

Abstract: The present disclosure is directed to a process for manufacturing a micro-electro-mechanical system (MEMS) device. The process includes, in part, forming a first sacrificial dielectric region on a semiconductor wafer; forming a structural layer of semiconductor material on the first sacrificial dielectric region; forming a plurality of first openings through the structural layer; forming a second sacrificial dielectric region on the structural layer; forming a ceiling layer of semiconductor material on the second sacrificial dielectric region; forming a plurality of second openings through the ceiling layer; forming on the ceiling layer a permeable layer; selectively removing the first and the second sacrificial dielectric regions; and forming on the permeable layer a sealing layer of semiconductor material.

Abstract: A charge-balance power device includes a semiconductor body having a first conductivity type. A trench gate extends in the semiconductor body from a first surface toward a second surface. A body region has a second conductivity type that is opposite the first conductivity type, and the body region faces the first surface of the semiconductor body and extends on a first side and a second side of the trench gate. Source regions having the first conductivity type extend in the body region and face the first surface of the semiconductor body. A drain terminal extends on the second surface of the semiconductor body. The device further comprises a first and a second columnar region having the second conductivity, which extend in the semiconductor body adjacent to the first and second sides of the trench gate, and the first and second columnar regions are spaced apart from the body region and from the drain terminal.

Abstract: A driving circuit including a reference voltage generator to generate a reference voltage based on an operating frequency of a complementary circuit; a comparator including a first input configured to receive a drain-to-source voltage of a field effect transistor; and a second input to receive the reference voltage; and a signal generator to deliver a driving signal to a gate terminal of the field effect transistor to drive the field effect transistor to an ON state after the drain-to-source voltage of the first low side field effect transistor becomes less than the reference voltage and to an OFF state after the drain-to-source voltage of the field effect transistor becomes greater than the reference voltage.

Abstract: An embodiment method of accessing a memory for reading and/or writing data comprises generating a memory transaction request comprising a burst of memory access requests towards a set of memory locations in the memory, the memory locations having respective memory addresses. The method further comprises transmitting via an interconnect bus to a memory controller circuit coupled to the memory a first signal conveying the memory transaction request and a second signal conveying information for mapping the burst of memory access requests onto respective memory addresses of the memory locations in the memory. The method further comprises computing, as a function of the information conveyed by the second signal, respective memory addresses of the memory locations, and accessing the memory locations to read data from the memory locations and/or to write data into the memory locations.

Abstract: A method of manufacturing an electronic module includes providing a base substrate having a first surface, providing a first supporting element having a first portion with an inclined top surface, and affixing the first supporting element to the first surface such that the inclined top surface is inclined with respect to the base substrate. A first reflector is coupled to the inclined top surface such that a rear surface of the first reflector is in physical contact with the inclined top surface of the first portion of the first supporting element, and a spacer structure is configured to form an interface for mounting lateral walls to the base substrate. A cap is positioned over and supported by the lateral walls to thereby define a chamber. The emitter, as well as a detector, are coupled to the first surface of the base substrate.