Abstract: A cryptographic method includes providing memory locations for storing encrypted data. The memory locations have respective addresses and are accessible via a communication bus. The method includes receiving over the communication bus access requests to the memory locations, wherein the access requests include burst requests for access to respective sets of the memory locations starting from respective start addresses, and calculating as a function of the start addresses encryption/decryption cryptographic masks based on cryptographic keys. Plain text data is received for encryption and the method includes applying the cryptographic masks to the plain text data to obtain therefrom encrypted data, and including the encrypted data into output data for transmission over the communication bus.

Abstract: A pulsed signal generator generates a pulsed signal having a pulse width configured to be equal to a given fraction of a pulse width of a reference clock. A reference current source outputs current having a reference magnitude, and a comparison current source outputs current having a magnitude that is a function of the reference magnitude and the given fraction. A comparison circuit compares a total current output by one of the reference current source and the comparison current source during pulses of the reference clock to a total current output by the other of the reference current source and the comparison current source during pulses of the pulsed signal equal in number to the pulses of the reference clock in order to determine whether the pulse width of the pulse signal is less than or equal to the given fraction of the pulse width of the reference clock.

Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.

Abstract: An electronic amplification-interface circuit includes a differential-current reading circuit having a first input terminal and a second input terminal. The differential-current reading circuit includes a continuous-time sigma-delta conversion circuit formed by an integrator-and-adder module generating an output signal that is coupled to an input of a multilevel-quantizer circuit configured to output a multilevel quantized signal. The integrator-and-adder module includes a differential current-integrator circuit configured to output a voltage proportional to an integral of a difference between currents received at the first and second input terminals. A digital-to-analog converter, driven by a respective reference current, receives and converts the multilevel quantized signal into a differential analog feedback signal. The integrator-and-adder module adds the differential analog feedback signal to the differential signal formed at the first and second input terminals.

Abstract: Button device comprising: a fixed support structure; a movable structure, laterally surrounded by said support structure and configured to deform at least in part under the action of an external force; and a fluid-tight protection cap. The movable structure includes a piston element, deformable elements having piezoelectric transducers arranged thereon, and anchor elements that couple the piston element to the deformable elements. When an external force acts on the piston element, the anchor elements transfer this force to the deformable elements and to the piezoelectric transducers, so as to sense the extent of this force.

Abstract: A driver circuit includes an input node to receive an input signal for conversion at the output node of a converter, a driver node to provide to a switching power circuit stage in the converter a pulse-width modulated drive signal having an active time, first and second active time generation paths, and a selector circuit coupled to the first and second active time generation paths. The circuit is operable selectively in a first and a second operational mode wherein the driver node receives the pulse-width modulated drive signal having a first active time value generated in the first active time generation path, or a second active time value generated in the second active time generation path. The second active time generation path includes an active time generator network to provide a second active time value with the second active time value adaptively variable to match the first active time value.

Abstract: A frequency modulation MEMS triaxial gyroscope, having two mobile masses; a first and a second driving body coupled to the mobile masses through elastic elements rigid in a first direction and compliant in a second direction transverse to the first direction; and a third and a fourth driving body coupled to the mobile masses through elastic elements rigid in the second direction and compliant in the first direction. A first and a second driving element are coupled to the first and second driving bodies for causing the mobile masses to translate in the first direction in phase opposition. A third and a fourth driving element are coupled to the third and fourth driving bodies for causing the mobile masses to translate in the second direction and in phase opposition. An out-of-plane driving element is coupled to the first and second mobile masses for causing a translation in a third direction, in phase opposition.

Abstract: A control circuit includes: a flip-flop having an output configured to be coupled to a control terminal of a transistor and for producing a first signal; a comparator having an output coupled to an input of the flip-flop, and first and second inputs for receiving first and second voltages, respectively; a transconductance amplifier having an input for receiving a sense voltage indicative of a current flowing through the transistor, and an output coupled to the first input of the comparator; a zero crossing detection (ZCD) circuit having an input configured to be coupled to a first current path terminal of the transistor and to an inductor, where the ZCD circuit is configured to detect a demagnetization time of the inductor and produce a third signal based on the detected demagnetization time; and a reference generator configured to generate the second voltage based on the first and third signals.

Abstract: A micromechanical device includes a fixed structure, a mobile portion rotatable about a first rotation axis, and a first actuation structure arranged between the fixed structure and the mobile portion to enable rotation of the mobile portion about the first rotation axis. The mobile portion includes a supporting structure, a tiltable platform rotatable about a second rotation axis, transverse to the first rotation axis, and a second actuation structure coupled between the tiltable platform and the supporting structure. Stiffening elements are arranged between the supporting structure and the fixed structure. The micromechanical device may be used within a pico-projector.

Abstract: A circuit includes a current path and a negative bootstrap circuitry coupled to the current path. The current path is coupled between a floating voltage and a reference ground, and includes a current generator coupled through a resistor to the floating voltage at a first node of the current generator. The current generator is controlled by a pulse signal. The negative bootstrap circuitry includes a pump capacitor coupled to a second node of the current generator and to the reference ground. The pump capacitor is configured to provide a negative voltage at the second node of the current generator based on the pulse signal.

Abstract: A semiconductor device, such as a Quad-Flat No-lead (QFN) package, includes a semiconductor chip arranged on a die pad of a leadframe. The leadframe has an array of electrically-conductive leads around the die pad. The leads in the array have distal ends facing away from the die pad as well as recessed portions at an upper surface of the leads. Resilient material, such as low elasticity modulus material, is present at the upper surface of the leads and filling the recessed portions. An insulating encapsulation is molded onto the semiconductor chip. The resilient material is sandwiched between the insulating encapsulation and the distal ends of the leads. This resilient material facilitates flexibility of the leads, making them suited for reliable soldering to an insulated metal substrate.

Abstract: A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.

Abstract: A system includes an addressable memory array, one or more processing cores, and an accelerator framework coupled to the addressable memory. The accelerator framework includes a Multiply ACcumulate (MAC) hardware accelerator cluster. The MAC hardware accelerator cluster has a binary-to-residual converter, which, in operation, converts binary inputs to a residual number system. Converting a binary input to the residual number system includes a reduction modulo 2m and a reduction modulo 2m?1, where m is a positive integer. A plurality of MAC hardware accelerators perform modulo 2m multiply-and-accumulate operations and modulo 2m?1 multiply-and-accumulate operations using the converted binary input. A residual-to-binary converter generates a binary output based on the output of the MAC hardware accelerators.

Abstract: An input receives a radio frequency (RF) signal having an interfering component superimposed thereon. The RF signal is mixed with a local oscillator (LO) signal and down-converted to an intermediate frequency (IF) to generate a mixed signal which includes a frequency down-converted interfering component. The mixed signal is amplified by an amplifier to generate an output signal. A feedback loop processes the output signal to generate a correction signal for cancelling the frequency down-converted interfering component at the input of the amplifier. The feedback loop includes a low-pass filter and a amplification circuit which outputs the correction signal.

Abstract: An energy-harvesting generator provides energy for storage in a capacitor. A sensing circuit senses a voltage across the capacitor and generates an activation signal as a function of the sensed voltage. The activation signal switches from a first value to a second value when the sensed voltage reaches an upper threshold and switches from the second value to the first value when the sensed voltage reaches a lower threshold. A signal transmitter powered by stored energy in the capacitor responds to the activation signal being switched to the second value by activating and transmitting a transmission signal. The signal transmitter further responds to the activation signal being switched to the first value by discontinuing transmission of the transmission signal and deactivating. A duration of time elapsing between de-activation and activation of the transmitter is indicative of an amount of energy harvested by the energy-harvesting electric generator.

Abstract: In an embodiment, an electronic circuit includes: a supply management circuit for receiving an input supply voltage and providing a first supply voltage; and a main circuit configured to: when the input supply voltage becomes higher than a first threshold, cause the electronic circuit to transition into an initialization state in which an oscillator is enabled and configuration data is copied from an NVM to configuration registers, and then to transition into a standby state in which the oscillator is disabled and content of the configuration registers is preserved by the first supply voltage, and, upon reception of a wakeup event, cause the configuration data from the configuration registers to be applied to the first circuit, and cause the electronic circuit to transition into an active state in which the first oscillator is enabled and the first circuit is configured to operate based on the configuration data.

Abstract: A bottom semiconductor region is formed to include a main sub-region, extending through a bottom dielectric region that coats a semiconductor wafer, and a secondary sub-region which coats the bottom dielectric region and surrounds the main sub-region. First and second top cavities are formed through the wafer, delimiting a fixed body and a patterned structure that includes a central portion which contacts the main sub-region, and deformable portions in contact with the bottom dielectric region. A bottom cavity is formed through the bottom semiconductor region, as far as the bottom dielectric region, the bottom cavity laterally delimiting a stiffening region including the main sub-region and leaving exposed parts of the bottom dielectric region that contact the deformable portions and parts of the bottom dielectric region that delimit the first and second top cavities. The parts left exposed by the bottom cavity are selectively removed.

Abstract: A piezoelectric transducer includes a semiconductor body with a bottom electrode of conductive material. A piezoelectric element is on the bottom electrode. A first protective layer, on the bottom electrode and the piezoelectric element, has a first opening through which a portion of the piezoelectric element is exposed, and a second opening through which a portion of the bottom electrode is exposed. A conductive layer on the first protective layer and within the first and second openings is patterned to form a top electrode in electrical contact with the piezoelectric element at the first opening, a first biasing stripe in electrical contact with the top electrode, and a second biasing stripe in electrical contact with the bottom electrode at the second opening.

Abstract: A method is provided to access a data storage memory that stores data signals in a plurality of indexed memory locations. An access control circuit receives a memory access request signals from a processing circuit. The method includes replicating the respective memory access request signals to provide for each a respective replicated memory access request signal, accessing indexed internal memory locations to retrieve a first data signal retrieved as a function of the respective memory access request signal and a second data signal retrieved as a function of the respective replicated memory access request signal, and checking for identity the first data signal and the at least one second data signal. The access control circuit transmits to the processing circuit a data signal or an integrity error flag signal as a result of the identity check.

Abstract: A current monitoring circuit includes: an output terminal configured to be coupled to a controller; an inverter having an output coupled to the output terminal; a first transconductance amplifier having first and second inputs configured to be coupled across a sense resistive element, and an output coupled to an input of the inverter; and a current generator having a second transconductance amplifier configured to generate a reference current at an output of the current generator based on a reference voltage, the output of the current generator being coupled to the input of the inverter, where the output of the inverter is configured to be in a first state when a load current flowing through the sense resistive element is higher than a predetermined threshold, and in a second state when the load current is lower than the predetermined threshold, and where the predetermined threshold is based on the reference current.