Patents Assigned to STMicroelectronics S.r.l.
  • Publication number: 20220208995
    Abstract: A process is proposed for manufacturing an integrated device having at least one MOS transistor integrated on a die of semiconductor material. The process includes forming one or more gate trenches with corresponding field plates and gate regions. A body region is formed by implanting dopants selectively along one or more implantation directions that are tilted with respect to a front surface of the die. Moreover, a corresponding integrated device and a system comprising this integrated device are proposed.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 30, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventor: Davide Giuseppe PATTI
  • Publication number: 20220208977
    Abstract: An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.
    Type: Application
    Filed: March 18, 2022
    Publication date: June 30, 2022
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Patrick FIORENZA, Fabrizio ROCCAFORTE, Mario Giuseppe SAGGIO
  • Publication number: 20220208961
    Abstract: A MOSFET transistor device includes a functional layer of silicon carbide, having a first conductivity type. Gate structures are formed on a top surface of the functional layer and each includes a dielectric region and an electrode region. Body wells having a second conductivity type are formed within the functional layer, and the body wells are separated from one another by surface-separation regions. Source regions having the first conductivity type are formed within the body wells, laterally and partially underneath respective gate structures. Modified-doping regions are arranged in the surface-separation regions centrally thereto, underneath respective gate structures, in particular underneath the corresponding dielectric regions, and have a modified concentration of dopant as compared to the concentration of the functional layer.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 30, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Patrick FIORENZA, Fabrizio ROCCAFORTE, Edoardo ZANETTI, Mario Giuseppe SAGGIO
  • Patent number: 11372112
    Abstract: A GNSS (Global Navigation Satellite System) receiver apparatus includes a bank of correlators configured to receive in-phase and quadrature versions of a received signal. A code numerical controlled oscillator is configured to determine a code frequency. A GNSS pseudo random noise sequence generator is configured to generate a pseudo random noise sequence at the code frequency set by the code numerical controlled oscillator. A GNSS pseudo random noise delayed sequence generator includes a first shift register and a second shift register. Taps of the shift registers are selectable as a punctual replica, an early replica and a delayed replica of the pseudo random noise sequence. An enable circuit is configured to generate an enable signal coupled to an enable input of the flip-flops, the enable signal operating at a selectable enable frequency.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: June 28, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventor: Gennaro Musella
  • Patent number: 11370321
    Abstract: A method of operating a battery management system is disclosed. A first voltage drop is sensed between a first terminal of a first battery cell and a second terminal of the first battery cell and a second voltage drop is sensed between a charge distribution pin and the second terminal of the first battery cell. The charge distribution pin is coupled to the first terminal of the first battery cell through a resistor. A difference is calculated between the first voltage drop and the second voltage drop and a faulty condition is detected when Rn absolute value of the difference between the first voltage drop and the second voltage drop exceeds a threshold.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: June 28, 2022
    Assignee: STMicroelectronics S.r.L
    Inventors: Orazio Pennisi, Valerio Bendotti, Vittorio D'Angelo, Daniele Zella
  • Patent number: 11372435
    Abstract: A voltage regulator circuit includes a first voltage regulator having a first output voltage selection pin set and producing a first output voltage based on a first digital signal received at the first output voltage selection pin set, and a second voltage regulator having a second output voltage selection pin set and producing a second output voltage based on a second digital signal received at the second output voltage selection pin set. The first and second voltage regulators are operable in a voltage tracking mode with the output voltage of the second voltage regulator tracking the output voltage of the first voltage regulator when digital signals received at the selection pin sets have a same value. An overvoltage sensor detects overvoltage events at the first voltage regulator. Control circuitry selectively avoids operation in voltage tracking mode as a result of an overvoltage event detected at the first voltage regulator.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: June 28, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giovanni Luca Torrisi, Salvatore Abbisso, Cristiano Meroni
  • Publication number: 20220199426
    Abstract: In a method of manufacturing a multi-die semiconductor device, a metal leadframe includes a die pad and electrically-conductive leads arranged around the die pad. First and second semiconductor dice are arranged on the die pad. A laser-activatable material is disposed on the dice and leads, and a set of laser-activated lines is patterned, including a first subset coupling selected bonding pads of the dice to selected leads, a second subset coupling selected bonding pads amongst themselves, and a third subset coupling the lines in the second subset to at least one line in the first subset. A first metallic layer is deposited onto the laser-activated lines to provide first, second and third subsets of electrically-conductive lines. A second metallic layer is selectively deposited onto the first and second subsets by electroplating to provide first and second subsets of electrically-conductive tracks. The electrically-conductive lines in the third subset are selectively removed.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventor: Paolo CREMA
  • Publication number: 20220199500
    Abstract: A leadframe includes a pattern of electrically-conductive formations with one or more sacrificial connection formations extending bridge-like between a pair of electrically-conductive formations. The sacrificial connection formation or formations are formed at one of the first surface and the second surface of the leadframe and have a thickness less than the leadframe thickness between the first surface and the second surface. A filling of electrically-insulating material is molded between the electrically-conductive formations of the leadframe, with electrically-insulating material molded between the connection formation(s) and the other surface of the leadframe. The sacrificial connection formation(s) counter deformation and displacement of parts during formation and pre-molding of the leadframe.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Mauro MAZZOLA, Roberto TIZIANI
  • Publication number: 20220199424
    Abstract: A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Fulvio Vittorio FONTANA, Michele DERAI
  • Publication number: 20220199564
    Abstract: A semiconductor device includes a support substrate with leads arranged therearound, a semiconductor die on the support substrate, and a layer of laser-activatable material molded onto the die and the leads. The leads include proximal portions facing towards the support substrate and distal portions facing away from the support substrate. The semiconductor die includes bonding pads at a front surface thereof which is opposed to the support substrate, and is arranged onto the proximal portions of the leads. The semiconductor device has electrically-conductive formations laser-structured at selected locations of the laser-activatable material.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Michele DERAI, Guendalina CATALANO
  • Publication number: 20220199563
    Abstract: The packaged power electronic device has a bearing structure including a base section and a transverse section extending transversely to the base section. A die is bonded to the base section of the bearing structure and has a first terminal on a first main face and a second and a third terminal on a second main face. A package of insulating material embeds the semiconductor die, the second terminal, the third terminal and at least partially the carrying base. A first, a second and a third outer connection region are electrically coupled to the first, the second and the third terminals of the die, respectively, are laterally surrounded by the package and face the second main surface of the package. The transverse section of the bearing structure extends from the base section towards the second main surface of the package and has a higher height with respect to the die.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 23, 2022
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Cristiano Gianluca STELLA, Roberto RIZZA
  • Publication number: 20220199477
    Abstract: A method of manufacturing semiconductor devices, such as QFN/BGA flip-chip type packages, arranging on a leadframe one or more semiconductor chips or dice having a first side facing towards the leadframe and electrically coupled therewith and a second side facing away from the leadframe. The method also includes molding an encapsulation on the semiconductor chip(s) arranged on the leadframe, where the encapsulation has an outer surface opposite the leadframe and comprises laser direct structuring (LDS) material. Laser direct structuring processing is applied to the LDS material of the encapsulation to provide metal vias between the outer surface of the encapsulation and the second side of the semiconductor chip(s) and as well as a metal pad at the outer surface of the encapsulation.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Michele DERAI, Dario VITELLO
  • Patent number: 11368165
    Abstract: A converter circuit includes an analog-to-digital signal conversion path. An input port receives an analog input signal having an offset, and an output port delivers a digital output signal quantized over M levels. The digital output signal is sensed by a digital-to-analog feedback path, which includes a digital-to-analog converter applying to the input port an analog feedback signal produced as a function of an M-bit digital word under control of a two-state signal having alternating first and second states. M-bit digital word generation circuitry coupled to the digital-to-analog converter and sensitive to the two-state signal produces, alternately, during the first states, a first M-bit digital word, which is a function of the digital output signal quantized over M levels, and, during the second states, a second M-bit digital word, which is a function a correction value of the offset in the analog input signal.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: June 21, 2022
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Calogero Marco Ippolito, Michele Vaiana
  • Patent number: 11366140
    Abstract: A current measurement circuit, for wireless charging systems, for instance, comprises a differential input configured to have applied an input voltage sensed across a shunt resistor traversed by a current to be measured, a voltage reversal switch arrangement selectively switchable to reverse the polarity of the input voltage as applied between a first and a second voltage sensing nodes as well as a first and a second current flow line between the voltage sensing nodes and ground. A difference resistor intermediate the two current flow lines is traversed by a current which is a function of the input voltage as applied to the first and second sensing nodes via the voltage reversal switch arrangement. First and second current sensing nodes at the two current flow lines are coupled to a differential current output via a current reversal switch arrangement selectively switchable to reverse the output current polarity.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: June 21, 2022
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Paolo Angelini, Roberto Pio Baorda, Francesco Borgioli, Marco Garbarino
  • Patent number: 11364816
    Abstract: An electronic device for detecting the presence of an occupant on board a vehicle includes an audio sensor to acquire sound-sensing signals on board the vehicle. A movement sensor acquires movement-sensing signals associated with movement of the vehicle and an environmental sensor acquires environmental-sensing signals on board the vehicle. A processing unit is coupled to the audio sensor, movement sensor, and environmental sensor processes the respective sound-sensing signals, movement-sensing signals, and environmental-sensing signals to monitor the presence on board the vehicle of the occupant and the absence of a responsible person to determine a situation of danger and to activate a corresponding alarm warning.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: June 21, 2022
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Andrea Labombarda, Eleon Borlini, Livio Gasparetto
  • Patent number: 11368656
    Abstract: A device has memory and processing circuitry coupled to the memory. The processing circuitry generates a resonant axis drive signal to drive a Micro Electro Mechanical System (MEMS) mirror system at a resonance frequency, and generates a linear axis drive signal to drive the MEMS mirror system at a linear frequency corresponding to a video frame rate. Generating the linear axis drive signal includes generating, using interpolation, a current set of shape values based on a stored set of shape values and an indication of the video frame rate. The linear axis drive signal is generated using the current set of shape values.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: June 21, 2022
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Luca Molinari, Daniele D'Elia
  • Publication number: 20220185661
    Abstract: A MEMS device formed by a substrate, having a surface; a MEMS structure arranged on the surface; a first coating region having a first Young's modulus, surrounding the MEMS structure at the top and at the sides and in contact with the surface of the substrate; and a second coating region having a second Young's modulus, surrounding the first coating region at the top and at the sides and in contact with the surface of the substrate. The first Young's modulus is higher than the second Young's modulus.
    Type: Application
    Filed: March 1, 2022
    Publication date: June 16, 2022
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Enri DUQI, Marco DEL SARTO, Lorenzo BALDO
  • Publication number: 20220187593
    Abstract: An optical module includes an optical detector, laser emitter, and first and second support structures, each carried by a substrate. An optical layer includes first and second fixed portions carried by the support structures, a movable portion affixed between the fixed portions by a spring structure, and a lens system carried by the movable portion, the lens system including an objective lens and a beam shaping lens. The optical layer includes a comb drive with a first comb structure extending from the first fixed portion to interdigitate with a second comb structure extending from the movable portion, a third comb structure extending from the second fixed portion to interdigitate with a fourth comb structure extending from the movable portion, and actuation circuitry applying voltages to the comb structures to cause the movable portion of the optical layer to oscillate back and forth between the fixed portions.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 16, 2022
    Applicants: STMicroelectronics (Research & Development) Limited, STMicroelectronics S.r.l.
    Inventors: Christopher TOWNSEND, Roberto CARMINATI
  • Publication number: 20220190816
    Abstract: Current absorption management for an electronic fuse coupled between an electrical supply source node and an electrical load node selectively controls a high current electronic switch and a low current electronic switch coupled in parallel between the electrical supply source node and the electrical load node. The high current and low current electronic switches are alternatively actuated: in a first mode where the high current electronic switch is turned on and the low current electronic switch is turned off, and in a second mode where the high current electronic switch is turned off and the low current electronic switch is turned on. Change to the second mode may be made in response to a standby state or a sensing of a lower current in the electrical load. Conversely, change to the first mode may be made in response to a sensing of a higher current in the electrical load.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 16, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Enrico CASTRO, Giovanni SUSINNA, Vincenzo RANDAZZO, Mirko DONDINI, Calogero Andrea TRECARICHI
  • Publication number: 20220187591
    Abstract: Disclosed herein is an optical module including a substrate, with an optical detector, laser emitter, and support structure being carried by the substrate. An optical layer includes a fixed portion carried by the support structure, a movable portion affixed between opposite sides of the fixed portion by a spring structure, and a lens system carried by the movable portion. The movable portion has at least one opening defined therein across which the lens system extends, with at least one supporting portion extending across the at least one opening to support the lens system. The optical layer further includes a MEMS actuator for in-plane movement of the movable portion with respect to the fixed portion.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 16, 2022
    Applicants: STMicroelectronics (Research & Development) Limited, STMicroelectronics S.r.l.
    Inventors: Christopher TOWNSEND, Roberto CARMINATI