Patents Assigned to STMicroelectronics S.r.l.
  • Publication number: 20210375787
    Abstract: The present disclosure is directed to a lead frame design that includes a copper alloy base material coated with an electroplated copper layer, a precious metal, and an adhesion promotion compound. The layers compensate for scratches or surface irregularities in the base material while promoting adhesion from the lead frame to the conductive connectors, and to the encapsulant by coupling them to different layers of a multilayer coating on the lead frame. The first layer of the multilayer coating is a soft electroplated copper to smooth the surface of the base material. The second layer of the multilayer coating is a thin precious metal to facilitate a mechanical coupling between leads of the lead frame and conductive connectors. The third layer of the multilayer coating is the adhesion promotion compound for facilitating a mechanical coupling to an encapsulant around the lead frame.
    Type: Application
    Filed: May 17, 2021
    Publication date: December 2, 2021
    Applicants: STMICROELECTRONICS S.R.L., STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Paolo CREMA, Jürgen BARTHELMES, Din-Ghee NEOH
  • Publication number: 20210375839
    Abstract: A semiconductor die includes a structural body that has a power region and a peripheral region surrounding the power region. At least one power device is positioned in the power region. Trench-insulation means extend in the structural body starting from the front side towards the back side along a first direction, adapted to hinder conduction of heat from the power region towards the peripheral region along a second direction orthogonal to the first direction. The trench-insulation means have an extension, in the second direction, greater than the thickness of the structural body along the first direction.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 2, 2021
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Davide Giuseppe PATTI, Mario Antonio ALEO
  • Publication number: 20210376735
    Abstract: A DC-DC converter includes: an transformer having a primary winding and a secondary winding magnetically coupled to the primary winding; a power oscillator applying an oscillating signal to the primary to transmit a power signal to the secondary winding; a rectifier connected to the secondary winding of the transformer to obtain an output DC voltage by rectification of the power signal; comparison circuitry to generate an error signal representing a difference between the output DC voltage and a reference voltage; a transmitter connected to the secondary winding of the transformer to apply an amplitude modulation to the power signal at the secondary winding of the transformer in response to the error signal to thereby produce an amplitude modulated signal at the primary winding; and a receiver and control circuit connected to the primary winding to control an amplitude of the oscillating signal as a function of the amplitude modulated signal.
    Type: Application
    Filed: August 17, 2021
    Publication date: December 2, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro PARISI, Nunzio GRECO, Nunzio SPINA, Egidio RAGONESE, Giuseppe PALMISANO
  • Patent number: 11189744
    Abstract: In at least one embodiment, a Geiger-mode avalanche photodiode, including a semiconductor body, is provided. The semiconductor body includes a semiconductive structure and a front epitaxial layer on the semiconductive structure. The front epitaxial layer has a first conductivity type. An anode region having a second conductivity type that is different from the first conductivity type extends into the front epitaxial layer. The photodiode further includes a plurality of gettering regions in the semiconductive structure.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: November 30, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Massimo Cataldo Mazzillo, Valeria Cinnera Martino
  • Patent number: 11186244
    Abstract: A child safety seat may include a motion sensor, e.g., an accelerometer, and a pressure sensor, e.g., a air pressure sensor. The motion sensor is configured to detect a motion state of a vehicle where the child safety seat is installed, e.g., whether the vehicle is moving or non-moving. The pressure sensor is configured to detect a motion state of a door of the vehicle, e.g., a door open/close motion. Based on the information detected by the motion sensor and the pressure sensor, a controller determines whether an awareness scenario occurs.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: November 30, 2021
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Zancanato, Michele Ferraina, Matteo Dameno, Mario Tesi
  • Patent number: 11187563
    Abstract: A method includes: receiving, from a plurality of sensors, detection signals indicative of fluid flow, the fluid flow having a direction and a speed, the plurality of sensors having respective mutual positions and distances between pairs of sensors in the plurality of sensors; determining, as a function of the detection signals, a first detection sensor in the plurality of sensors detecting the fluid flow prior to other sensors in the plurality of sensors; determining time delays between detection of the fluid flow by a first sensor and by a second sensor in each pair of sensors in the plurality of sensors; and determining a fluid flow velocity vector indicative of the direction and the speed of the fluid flow as a function of the mutual positions and distances between the pairs of sensors in the plurality of sensors and the time delays.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: November 30, 2021
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Fabio Passaniti, Enrico Rosario Alessi
  • Patent number: 11189343
    Abstract: A current-generator circuit includes an output-current generator circuit having a control branch to be coupled to a control current generator and adapted to provide a control current pulse and a driver electrically coupled between the control branch and the output leg. A compensation circuit includes a first compensation branch configured to generate a compensation current pulse that is a function of the control current pulse and a second compensation branch coupled in a current mirror configuration with the first compensation branch to receive the compensation current pulse. The second compensation branch includes a resistive block having an electrical resistance that is a function of a resistance of an output load. The second compensation branch is electrically coupled to the control branch and the driver is electrically coupled to the control branch and to the output leg.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: November 30, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Laura Capecchi, Marco Pasotti, Marcella Carissimi, Riccardo Zurla
  • Publication number: 20210364375
    Abstract: A bridge driver circuit applies a bias voltage across first and second input nodes of a resistive bridge circuit configured to measure a physical property such as pressure or movement. A sensing circuit senses a bridge current that flows through the resistive bridge circuit in response to the applied bias voltage. A temperature dependent sensitivity of the resistive bridge circuit is determined by processing the sensed bridge current. A voltage output at first and second output nodes of the resistive bridge circuit is processed to determine a value of the physical property. This processing further involves applying a temperature correction in response to the determined temperature dependent sensitivity.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 25, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco ZAMPROGNO, Andrea BARBIERI, Pasquale FLORA, Raffaele Enrico FURCERI
  • Publication number: 20210363000
    Abstract: A process for manufacturing a MEMS device includes forming a first structural layer of a first thickness on a substrate. First trenches are formed through the first structural layer, and masking regions separated by first openings are formed on the first structural layer. A second structural layer of a second thickness is formed on the first structural layer in direct contact with the first structural layer at the first openings and forms, together with the first structural layer, thick structural regions having a third thickness equal to the sum of the first and the second thicknesses. A plurality of second trenches are formed through the second structural layer, over the masking regions, and third trenches are formed through the first and the second structural layers by removing selective portions of the thick structural regions.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 25, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giorgio ALLEGATO, Lorenzo CORSO, Ilaria GELMI, Carlo VALZASINA
  • Publication number: 20210367062
    Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.
    Type: Application
    Filed: August 6, 2021
    Publication date: November 25, 2021
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Ferdinando IUCOLANO, Alfonso PATTI, Alessandro CHINI
  • Patent number: 11183953
    Abstract: A piezoelectric transducer includes an anchorage and a beam of semiconductor material extending in cantilever fashion from the anchorage in a main direction parallel to a first axis and having a face parallel to a first plane defined by the first axis and by a second axis perpendicular to the first axis. A piezoelectric layer is on the face of the beam. A cross-section of the beam is perpendicular to the first axis and is asymmetrical and shaped so the beam deformations out of the first plane in response to forces applied to the anchorage and oriented parallel to the first axis.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: November 23, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Procopio, Attilio Frangi
  • Patent number: 11183255
    Abstract: A method for erasing non-volatile memory including applying a first voltage pulse to a non-volatile memory cell to perform a first erase operation of the non-volatile memory cell and determining that a threshold voltage of the non-volatile memory cell is greater than a test voltage. The method further comprising updating a dedicated memory location with a value; and checking the non-volatile memory cell to determine whether the threshold voltage of the non-volatile memory cell is less than an erase-verify voltage to verify that the first erase operation has been performed successfully.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: November 23, 2021
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Giovanni Matranga, Gianbattista Lo Giudice, Rosario Roberto Grasso, Alberto Jose′ Di Martino
  • Patent number: 11183981
    Abstract: A method of monitoring electrical loads is disclosed. In an embodiment the method includes generating a first voltage signal and a second voltage signal, the second voltage signal in quadrature to the first voltage signal, injecting one of the first voltage signal or the second voltage signal into a signal propagation path towards an electrical load, sensing a current signal flowing through the electrical load as a result of the one of the first voltage signal or the second voltage signal injected into the signal propagation path and processing the first voltage signal, the second voltage signal and the sensed current signal.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: November 23, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Valle, Flavio Polloni
  • Publication number: 20210359189
    Abstract: A method of fabricating a thermoelectric converter that includes providing a layer of a Silicon-based material having a first surface and a second surface, opposite to and separated from the first surface by a Silicon-based material layer thickness; forming a plurality of first thermoelectrically active elements of a first thermoelectric semiconductor material having a first Seebeck coefficient, and forming a plurality of second thermoelectrically active elements of a second thermoelectric semiconductor material having a second Seebeck coefficient, wherein the first and second thermoelectrically active elements are formed to extend through the Silicon-based material layer thickness, from the first surface to the second surface; forming electrically conductive interconnections in correspondence of the first surface and of the second surface of the layer of Silicon-based material, for electrically interconnecting the plurality of first thermoelectrically active elements and the plurality of second thermoelectri
    Type: Application
    Filed: May 14, 2021
    Publication date: November 18, 2021
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Paolo FERRARI, Flavio Francesco VILLA, Lucia ZULLINO, Andrea NOMELLINI, Luca SEGHIZZI, Luca ZANOTTI, Bruno MURARI, Martina SCOLARI
  • Publication number: 20210359657
    Abstract: A receiver or transmitter circuit includes a signal propagation path between a radio-frequency (RF) signal node and a baseband processing circuit. Variable gain circuitry is configured to vary a gain applied to a signal propagating between the RF signal node and the baseband processing circuit. The variable gain circuitry varies the gain via first, coarse steps as well as via second, fine steps. This facilitates fine matching of the gains experienced by signals propagating over the in-phase and the quadrature branches in the transmitter and/or receiver circuit.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 18, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Gaetano COSENTINO, Carmelo BURGIO
  • Patent number: 11177394
    Abstract: A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions, which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: November 16, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Giuseppe Saggio, Simone Rascuna'
  • Patent number: 11177779
    Abstract: A charge amplifier circuit is provided. The charge amplifier circuit is couplable to a transducer that generates an electrical charge that varies with an external stimulus. The charge amplifier circuit includes an amplification stage having an input node, couplable to the transducer, and an output node. The amplification stage biases the input node at a first direct current (DC) voltage. The charge amplifier circuit includes a feedback circuit, which includes a feedback capacitor, electrically coupled between the input and output nodes of the amplification stage. The feedback circuit includes a resistor electrically coupled to the input node, and a level-shifter circuit, electrically coupled between the resistor and the output node. The level-shifter circuit biases the output node at a second DC voltage and as a function of a difference between the second DC voltage and a reference voltage.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: November 16, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Danioni
  • Publication number: 20210347634
    Abstract: The MEMS actuator is formed by a body, which surrounds a cavity and by a deformable structure, which is suspended on the cavity and is formed by a movable portion and by a plurality of deformable elements. The deformable elements are arranged consecutively to each other, connect the movable portion to the body and are each subject to a deformation. The MEMS actuator further comprises at least one plurality of actuation structures, which are supported by the deformable elements and are configured to cause a translation of the movable portion greater than the deformation of each deformable element. The actuation structures each have a respective first piezoelectric region.
    Type: Application
    Filed: April 26, 2021
    Publication date: November 11, 2021
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Domenico GIUSTI, Marco FERRERA, Carlo Luigi PRELINI
  • Publication number: 20210351338
    Abstract: The MEMS actuator is formed by a substrate, which surrounds a cavity; by a deformable structure suspended on the cavity; by an actuation structure formed by a first piezoelectric region of a first piezoelectric material, supported by the deformable structure and configured to cause a deformation of the deformable structure; and by a detection structure formed by a second piezoelectric region of a second piezoelectric material, supported by the deformable structure and configured to detect the deformation of the deformable structure.
    Type: Application
    Filed: December 29, 2020
    Publication date: November 11, 2021
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Domenico GIUSTI, Carlo Luigi PRELINI, Marco FERRERA, Carla Maria LAZZARI, Luca SEGHIZZI, Nicolo' BONI, Roberto CARMINATI, Fabio QUAGLIA
  • Publication number: 20210349491
    Abstract: A bandgap circuit includes a supply node as well as a first and second bipolar transistors having jointly coupled base terminal at a bandgap node providing a bandgap voltage. First and second current generators are coupled to the supply node and supply mirrored first and second currents, respectively, to first and second circuit nodes. A third circuit node is coupled to the first bipolar transistor via a first resistor and coupled to ground via a second resistor, respectively. The third circuit node is also coupled to the second bipolar transistor so that the second resistor is traversed by a current which is the sum of the currents through the bipolar transistors. A decoupling stage intermediate the current generators and the bipolar transistors includes first and second cascode decoupling transistors having jointly coupled control terminals receiving a bias voltage sensitive to the bandgap voltage.
    Type: Application
    Filed: July 20, 2021
    Publication date: November 11, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Stefano RAMORINI, Germano NICOLLINI