Abstract: An electromagnetic transponder of the type including an oscillating circuit upstream of a rectifier adapted to providing a D.C. supply voltage to an electronic circuit, the electronic circuit including circuitry for transmitting digitally coded information, and the transponder including circuitry for detuning the oscillating circuit with respect to a determined frequency, the circuitry for detuning the oscillating circuit being used when the transponder has to transmit information while it is very close to a read/write terminal.

Abstract: A system architecture for a high speed serial bus compatible with the 1394 standard is disclosed. A transaction interface coordinates data packets received from or sent to a 1394 bus. A kernel/scheduler/dispatcher is used to allocate memory resources, and start a variety of tasks and services. The tasks and services vary depending on protocols used in a transport layer and application layer used in conjunction with the 1394 layers. The transaction interface uses information derived from the data packets received to form message control blocks, particular for each individual task, and places the control blocks into the proper task queue. The transaction interface forms a dispatcher message control block and places it into the scheduler/dispatcher queue to initiate the task. If there are no other message control blocks in the queue particular for the called task, the called task is immediately started. Otherwise, the message control block waits in the queue to eventually be operated on.

Abstract: A threshold amplifier receives a logic supply voltage and a ground voltage and includes a Schmitt trigger comprising an inverter stage and a hysteresis stage connected to the inverter stage for setting a high and a low hysteresis threshold. A disabling circuit disables the hysteresis stage as a function of a level of the logic supply voltage. The threshold amplifier further includes a detection circuit for detecting the level of the logic supply voltage with respect to a detection threshold, and for activating the disabling circuit for disabling the hysteresis stage when the level of the logic supply voltage is below the detection threshold.

Abstract: A method for compressing encoding data of a sequence of pictures is based on a motion estimation among the successive images to remove the temporal redundancy from the data. The method recognizes a 3:2 pulldown conversion of a series of photograms of a filmed sequence in a sequence of TV frames. The TV frames have a number greater than the number of the photograms by duplicating certain pictures in a certain order. The redundancy due to such picture duplications is eliminated.

Abstract: A process for manufacturing a semiconductor memory device includes double polysilicon level non-volatile memory cells and shielded single polysilicon level non-volatile memory cells in the same semiconductor material chip. A first memory cell includes a MOS transistor having a first gate electrode and a second gate electrode superimposed and respectively formed by definition in a first and a second layer of conductive material. A second memory cell is shielded by a layer of shielding material for preventing the information stored in the second memory cell from being accessible from the outside. The second memory cell includes a MOS transistor with a floating gate electrode formed simultaneously with the first gate electrode of the first cell by definition of the first layer of conductive material. The layer of shielding material is formed by definition of the second layer of conductive material.

Abstract: A control circuit providing a driving current to a voice coil motor to position a reading and writing head of a disk memory system is described. The circuit comprises a first and a second class AB amplifiers the outputs of which are connected to the terminals of a first resistor in series with the voice coil motor so that a current passes through the voice coil motor and through the first resistor. The circuit comprises a sense amplifier the input terminals of which are coupled with the terminals of said first resistor, a device at the input of which is present a signal which is a sum of an external signal and of an output signal of the sense amplifier. The first amplifier and the second amplifier being driven in inverted phase by an output signal produced by the device.

Abstract: An amplifying circuit receiving an input voltage and a reference voltage equal to a fraction of the circuit supply voltage, the reference voltage provided by a time constant circuit, including a circuit for, upon power-on, inhibiting the amplifying circuit for as long as the difference between the value of the provided reference voltage and the voltage at the output of the time constant circuit is greater than a determined threshold.

Abstract: A circuit for computing the inner of scalar product of two vectors in a finite Galois field defined by a generator polynomial, wherein each vector includes at least two elements belonging to said finite field, comprises one or more look-up tables storing digital words indicative of said possible combinations and said possible reductions. The digital words in question are defined as a function of the second elements of said vectors and the generator polynomial of the field. The input register(s) and the look-up table(s) are configured to co-operate in a plurality of subsequent steps to generate at each step a partial product result identified by at least one of digital word addressed in a corresponding look-up table as a function of the digital signals stored in the input register(s). The circuit also includes an accumulator unit for adding up the partial results generated at each step to give a final product result deriving from accumulation of said partial results.

Abstract: A process for manufacturing a dual charge storage location electrically programmable memory cell that includes the steps of forming a central insulated gate over a semiconductor substrate; forming physically separated charge-confining layers stack portions of a dielectric-charge trapping material-dielectric layers stack at the sides of the central gate, the charge trapping material layer in each charge-confining layers stack portion forming a charge storage element; forming side control gates over each of the charge-confining layers stack portions; forming memory cell source/drain regions laterally to the side control gates; and electrically connecting the side control gates to the central gate. Each of the charge-confining layers stack portions at the sides of the central gate is formed with an “L” shape, with a base charge-confining layers stack portion lying on the substrate surface and an upright charge-confining layers stack portion lying against a respective side of the insulated gate.

Abstract: An MOS electronic device is formed to reduce drain/gate capacity and to increase cutoff frequency. The device includes a field insulating layer that covers a drain region, delimits an active area with an opening, houses a body region in the active area, and houses a source region in the body region. A portion of the body region between drain and source regions forms a channel region. A polycrystalline silicon structure extends along the edge of the opening, partially on the field insulating and active layers. The polycrystalline silicon structure includes a gate region extending along a first portion of the edge on the channel region and partially surrounding the source region and a non-operative region extending along a second portion of the edge, electrically insulated and at a distance from the gate region.

Abstract: A modular information processing system is disclosed. The system includes an expansion device that embeds at least one internal peripheral without a controller and/or at least one port for connecting an external peripheral. The system further includes a hand-held computer that embeds control circuitry including at least one controller for the at least one internal peripheral or at least one external peripheral, and an interface for coupling the hand-held computer to the expansion device in a removable manner. In a mobile operating condition in which the hand-held computer is not coupled to the expansion device, the processing circuitry controls the hand-held computer. In an expanded operating condition in which the hand-held computer is coupled to the expansion device, the processing circuitry controls a personal computer formed by the hand-held computer and the expansion device. Also provided are a hand-held computer and an expansion device for use in modular information processing systems.

Abstract: A system comprising a host, a target and connection means therebetween. The host has means for providing a clock signal, first output means for outputting said clock signal to said target via said connection means and second output means for outputting data to said target via said connection means, said data being clocked out by said clock signal, said target having first input means for receiving said clock signal from said host, second input means for receiving said data from said host and first output means for outputting data to said host via said connection means. The host further comprises input means for receiving said data from said target, and oversampling means for oversampling the received data from the target and controlling the clocking in of said data received from said target in dependence on said oversampling.

Abstract: Data are converted between an unencrypted and an encrypted format according to the Rijndael algorithm, including a plurality of rounds. Each round is comprised of fixed set of transformations applied to a two-dimensional array, designated state, of rows and columns of bit words. At least a part of said transformations are applied on a transposed version of the state, wherein rows and columns are transposed for the columns and rows, respectively.

Abstract: A comparator circuit with comparing means for comparing first and second voltages, has current source circuitry for providing current to said comparing means, said current source circuitry having an input for receiving a clock signal having first and second states, whereby the comparing means starts to compare the first and second voltages when the clock signal makes a transition from the first state to the second state; and means for determining when said comparing means has completed a comparison of said first and second voltages and for switching off said current source circuitry and hence said comparing means when said comparison has been completed.

Abstract: The electronic ignition device includes an ignition coil with a primary winding terminal and a secondary winding terminal generating a spark, a power element arranged between the primary winding terminal and ground, a protection circuit issuing a disable signal to the control terminal of the power element in preset conditions, and a voltage limiting circuit having inputs connected to the primary winding terminal and to the battery voltage, and an output connected to the control terminal of the power element. The voltage limiting circuit detects a potential difference between its own inputs and supplies to the control terminal an activation signal for the power element, in presence of the deactivation signal and when the potential difference exceeds the supply voltage by a preset value. Thereby, the voltage limiting circuit limits the voltage on the primary winding terminal to a preset value which depends upon the value of the battery voltage.

Abstract: A method for recognizing a progressive or an interlaced content of video pictures during their processing in a coder includes performing a number of operations on at least one of the luminance or chrominance components of the video signal. A macroblock belonging to a frame of a preceding picture is defined, and a first pair of coefficients on the selected luminance or chrominance component of the video signal is calculated. A first counter is incremented at each positive verification when one of the coefficients is greater than the other coefficient by a determined amount. A second counter is incremented at each macroblock being tested. A second pair of coefficients is calculated for each row of each Top semi-frame. A third counter is incremented at each positive verification when one of the coefficients is greater than the other coefficient by a determined amount. A fourth counter is incremented at each row tested.

Abstract: Minute surface damage or irregularities on the sensing surface of a capacitive sensor integrated circuit is detected by acquiring a preliminary image of the capacitance readings for the sensor array, coating the sensing surface with an electrolyte solution, then acquiring an additional image while the sensing surface is coated and/or after the electrolyte solution is removed. The electrolyte solution accelerates manifestation of pixel degradation or failure caused by surface damage or irregularities. Defective regions are identified by change of grayscale pixels in the preliminary image while the electrolyte coating is on the sensing surface and then again after the electrolyte coating is removed.

Abstract: A configurable electronic circuit having configuration nodes is provided. Each of the configuration nodes is coupled to corresponding first circuitry that is non-modifiable during configuration and second circuitry that is modifiable during the configuration. The non-modifiable first circuitry selectively imposes one of at least a first potential and a second potential on the configuration node prior to configuration, and the modifiable second circuitry allows modification of the potential imposed on the configuration node by the non-modifiable first circuitry. In a preferred embodiment, the modifiable second circuitry includes at least one fuse that is in an intact state before configuration and that can be changed to a destroyed state after configuration. This enables a reduction in the number of fuses that have to be destroyed during the configuration of the circuit. Also provided is an information processing system that includes at least one configurable electronic circuit having configuration nodes.

Abstract: A buffer having a circuit for reducing the slope of an input signal and a negative feedback circuit that generates a regulating signal dependent on the variation of the output signal and that applies the regulating signal to the input of the buffer. A precise regulation of the slope, independent of variations in the production process and of environmental conditions, is achieved.

Abstract: A method and apparatus is disclosed for communicating with a host. In one embodiment, a smart card has an IC with voltage conditioning circuitry and a pull-up resistor. The smart card, when inserted in a smart card reader coupled to the host, is capable of signaling the host over a bus using the pull-up resistor selectively coupled to a voltage output of the voltage conditioning circuitry and a first output of the smart card. The voltage conditioning circuitry output is selectively coupled to the first output through the resistor, responsive to the device being powered by the bus but not transmitting. This tends to pull up the first output to the voltage level of the voltage source, which makes the smart card capable of being properly detected by the host upon the bus being driven by a host. Selectively disconnecting the pull-up resistor while the smart card is transmitting or receiving results in a more balanced differential output signal.