Abstract: A driving circuit for a voice coil motor (VCM) includes a full bridge output stage for driving the motor in a pulse width modulated (PWM) mode. A multiplexer having two inputs is coupled to respective output nodes of the full bridge output stage, with one of the output nodes providing a back electromotive force induced in the motor upon setting in a high impedance state the full bridge output stage and conducting at least one transistor connected to ground in the full bridge output stage after current through the motor has decayed to zero. A controller compares a voltage representing a desired speed of the motor with the back electromotive force, and generates a correction signal based upon the comparison.

Abstract: A multilevel nonvolatile memory includes a supply line (28) supplying a supply voltage (VDD), a voltage boosting circuit (26) supplying a boosted voltage (Vp), higher than the supply voltage (VDD), a boosted line (30) connected to the voltage boosting circuit (26) and a reading circuit (25) including at least one comparator (35). The comparator (35) includes a first and a second input (35a, 35b), a first and a second output (45a, 45b), at least one amplification stage (40) connected to the boosted line (30), and a boosted line latch stage (41) connected to the supply line (28).

Abstract: A method and system are disclosed for spinning the spindle motor of a disk drive from a stationary state to an operable state that is suitable for performing a memory access operation. The method and system include energizing the polyphase motor in a first predetermined commutation phase; detecting whether a zero crossing of a back electromotive force (bemf) signal corresponding to the first predetermined commutation phase occurs; sensing whether the polyphase motor advanced to a next successive commutation phase relative to the first predetermined commutation phase; and performing an acceleration procedure to accelerate the speed of the polyphase motor towards a desired speed based upon a detected zero crossing of the bemf signal and an affirmative determination that the polyphase motor advanced to a next successive commutation phase relative to the first predetermined commutation phase.

Abstract: A start-up procedure for a multiphase brushless motor to be accelerated until reaching a certain speed includes determining the starting position of the rotor and performing an excitation phase including forcing a drive current in the phase windings of the motor for an established period of time. This is done according to a switching sequence for inducing a rotation in the desired direction. Furthermore, the method may include sensing the position reached by the rotor at the end of each excitation phase. The start-up procedure is eventually interrupted when the established speed has been reached or exceeded. Additionally, the duration of a next phase of excitation may be increased or reduced, and the switching sequence may be modified, based upon the number of consecutive times in which the current position is found to be the same or different from the previously detected position, respectively.

Abstract: A hybrid architecture for realizing a random numbers generator comprising a digital circuitry portion able to provide for a random bytes sequence as well as an analog circuitry portion able to provide a seed of the true random type is described.

Abstract: A process for estimating a speed of movement of a mobile terminal operating in a wireless communication system and communicating with a base station via a transmission channel includes estimating fading of the transmission channel, and performing an autocorrelation on the fading for providing a first autocorrelation result. Reference autocorrelation results are calculated for predetermined values of speed of movement of the mobile terminal, with the calculating being based upon a known autocorrelation function performed on the fading. The process further includes comparing the first autocorrelation result to the various reference autocorrelation results, and estimating the speed of movement of the mobile terminal based upon the comparison.

Abstract: A capacitor discharge ignition (CDI) system is capable of generating intense continuous electrical discharge at a spark gap for a desired duration and may include a second controllable power switching circuit with its input terminal connected to an output terminal of a high voltage DC source device. An output terminal of the second controllable power switching circuit is connected to an input terminal of a first power switching circuit. The second controllable power switching circuit may also have a control terminal connected to an output of a controller. The first controllable power switching circuit may be used for discharging a discharge capacitor, and the second controllable power switching circuit may cause charging of the discharge capacitor. As such, an ignition current through an ignition coil of the system is enabled for any desired number of cycles during both the charge and discharge cycles of the discharge capacitor.

Abstract: An electronic power device is integrated monolithically in a semiconductor substrate. The device has a first power region and a second region, each region comprising at least one P/N junction formed of a first semiconductor region with a first type of conductivity, which first semiconductor region extends through the substrate from the top surface of the device and is diffused into a second semiconductor region with the opposite conductivity from the first. The device also includes an interface structure between the two regions, of substantial thickness and limited planar size, comprising at least one trench filled with dielectric material.

Abstract: The present invention herein describes a tracking analog-to-digital converter, in particular of the differential input type.

Abstract: Described herein is an output buffer including an output stage formed by a pull-up transistor and a pull-down transistor connected in series between a supply line set at a supply potential and a ground line set at a ground potential. The output buffer further including a pre-biasing stage for pre-biasing the control terminal of the pull-up transistor and a pre-biasing stage for pre-biasing the control terminal of the pull-down transistor in order to bring these transistors to the turning-on threshold.

Abstract: A method for forming an interface free layer of silicon on a substrate of monocrystalline silicon is provided. According to the method, a substrate of monocrystalline silicon having a surface substantially free of oxide is provided. A silicon layer in-situ doped is deposited on the surface of the substrate in an oxygen-free environment and at a temperature below 700° C. so as to produce a monocrystalline portion of the silicon layer adjacent to the substrate and a polycrystalline portion of the silicon layer spaced apart from the substrate. The silicon layer is heated so as to grow the monocrystalline portion of the silicon layer through a part of the polycrystalline portion of the silicon layer. Also provided is a method for manufacturing a bipolar transistor.

Abstract: An integrated device based upon semiconductor technology, in particular a chemical microreactor, including a semiconductor body having a high-temperature operating portion and a low-temperature operating portion. The semiconductor body is provided with a thermal-insulation device including a dissipator element arranged between the high-temperature operating portion and the low-temperature operating portion. The dissipator includes a membrane connecting the high-temperature operating portion and the low-temperature operating portion, and a plurality of diaphragms that extend substantially orthogonal to the membrane and are parallel to one another.

Abstract: First estimations of the fading coefficients of a multi-path transmission channel are carried out in the sense of maximum likelihood. Sets of Wiener filter coefficients are stored according to predetermined speeds of movement of the mobile terminal and predetermined power levels of the signal. The real speed of the mobile terminal is estimated and the power of the signal for each path is measured. From this, a set of Wiener filter coefficients is derived with which the first estimations are filtered to obtain the final estimation of the fading coefficients.

Abstract: An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as a capacitor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.

Abstract: An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as an inductor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.

Abstract: A method of reading and restoring data stored in a ferroelectric memory cell is disclosed. The cell includes a first transistor and first ferroelectric capacitor connected, in series with each other, between a first bitline and an auxiliary line, a second transistor and second ferroelectric capacitor connected, in series with each other, between a second bitline and the auxiliary line, the first and second transistors having respective control terminals connected to a common wordline. The reading method includes precharging the first and second capacitors, applying a read pulse to the cell such that the state of the first capacitor is changed, reading the cell by a sensing means, and restoring the first capacitor to an initial state.

Abstract: An incident pulse signal of the ultra wideband type conveys digital information that is coded using pulses having a known theoretical shape. A decoding device includes an input for receiving the incident signal, and for delivering a base signal. A comparator receives the base signal and delivers an intermediate signal representative of the sign of the base signal with respect to a reference. A sampling circuit samples the intermediate signal for delivering a digital signal. A digital processing circuit correlates the digital signal with a reference correlation signal corresponding to a theoretical base signal arising from the reception of a theoretical pulse having the known theoretical shape.

Abstract: The integrated circuit comprises a semiconductor substrate SB supporting a memory cell PM of the DRAM type comprising an access transistor T and a storage capacitor TRC. The access transistor is made on the substrate, and the substrate includes a capacitive trench TRC buried beneath the transistor and forming the storage capacitor, the capacitive trench being in contact with one of the source and drain regions of the transistor.

Abstract: A transmission system using nQAM. A control channel is superimposed on a nQAM data channel. It is desirable to separate control channel data from user data without using a higher level protocol layer. In multi-carrier systems with variable bit-loading it is particularly desirable that the control channel data be separable from user data when the value of n. that is the bit-loading, or constellation identifier are unknown. Binary data is transmitted using nQAM modulation. The binary data includes both user data and control data. This means that a control channel is superimposed on a user data channel within the same nQAM constellation. Separation of the control data is facilitated by arranging control data points to have either a unique phase or unique amplitude values. These unique values are not employed for user data points.

Abstract: A driver circuit drives at least one power switch, which circuit comprises a final stage including a complementary pair of power transistors connected to said switch at a common output node. Advantageously, this circuit comprises a respective power-on buffer stage, connected in upstream of each of the power transistors, and a power-on detector associated with each power transistor, the detector associated with one of the power transistors being connected to the buffer stage of the complementary one of the transistors to prevent the power transistors from being turned on simultaneously.