Abstract: A structure includes a semiconductor support, a semiconductor region overlying the semiconductor support, a silicon nitride layer surrounding and straining the semiconductor region, and a metal foot separating the silicon nitride layer from the semiconductor support. The semiconductor region includes germanium. The semiconductor region can be a resonator of a laser or a waveguide.

Abstract: A low-power pointing method and an electronic device are disclosed. In an embodiment, an electronic device includes a first processor configured to receive attitude quaternion data, indicative of an orientation of the electronic device in a 3D-space, generated by a sensor-fusion algorithm from joint processing of an acceleration signal, indicative of acceleration acting on the electronic device along three reference axes of the 3D-space, and of a gyroscope signal, indicative of angular rate of rotation of the electronic device about the three reference axes of the 3D-space, process the quaternion data to determine an orientation difference between a current orientation and a previous orientation of the electronic device in the 3D-space, translate the orientation difference from the quaternion space to a tilt-compensated angular rate of rotation of the electronic device in the 3D-space and generate screen-frame displacement data based on the tilt-compensated angular rate of rotation.

Abstract: A power supply has a transformer with primary and secondary windings. A first terminal of the primary-winding is coupled to a power-input. A PFC includes a low-voltage circuit correcting power factor of the power signal, having a supply-input receiving a supply voltage during normal operation, a feedback-input coupled to a first terminal of the secondary-winding, and a gate-drive-output. A high-voltage startup circuit powers the low-voltage circuit during startup. Periphery circuitry includes a transient voltage suppression diode having an anode coupled to supply power to the high-voltage startup circuit and a cathode coupled to the power-input, a diode having an anode coupled to the first terminal of the secondary-winding and a cathode coupled to the supply-input of the low-voltage circuit. A capacitor is coupled between the supply-input and ground. A transistor has a drain coupled to a second terminal of the primary-winding and a gate coupled to the gate-drive-output.

Abstract: A photodetection circuit includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quench resistance and an anode coupled to a first node, a capacitive deep trench isolation capacitor coupled between the first node and ground, and a first n-channel transistor. The first n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a resistance control signal. A second n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node. An inverter has an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node.

Abstract: An integrated circuit includes a MOSFET device and a monolithic diode device, wherein the monolithic diode device is electrically connected in parallel with a body diode of the MOSFET device. The monolithic diode device is configured so that a forward voltage drop VfD2 of the monolithic diode device is less than a forward voltage drop VfD1 of the body diode of the MOSFET device. The forward voltage drop VfD2 is process tunable by controlling a gate oxide thickness, a channel length and body doping concentration level. The tunability of the forward voltage drop VfD2 advantageously permits design of the integrated circuit to suit a wide range of applications according to requirements of switching speed and efficiency.

Abstract: Disclosed herein is a strain gauge including a substrate, with a first Wheatstone bridge arrangement of resistors disposed on a first surface of the substrate, and a second Wheatstone bridge arrangement of resistors disposed remotely from the first Wheatstone bridge arrangement of resistors. The resistors of the first Wheatstone bridge arrangement are equal in resistance to one another, while the resistors of the second Wheatstone bridge arrangement are unequal in resistance to one another and unequal to those of the first Wheatstone bridge arrangement. The first Wheatstone bridge arrangement of resistors are electrically connected in parallel with the second Wheatstone bridge arrangement of resistors such that each resistor of the first Wheatstone bridge arrangement is electrically connected in parallel with a different resistor of the second Wheatstone bridge arrangement.

Abstract: An AC capacitor is coupled to a totem-pole type PFC circuit. In response to detection of a power input disconnection, the PFC circuit is controlled to discharge the AC capacitor. The PFC circuit includes a resistor and a first MOSFET and a second MOSFET coupled in series between DC output nodes with a common node coupled to the AC capacitor. When the disconnection event is detected, one of the first and second MOSFETs is turned on to discharge the AC capacitor with a current flowing through the resistor and the turned on MOSFET. Furthermore, a thyristor may be simultaneously turned on, with the discharge current flowing through a series coupling of the MOSFET, resistor and thyristor. Disconnection is detected by detecting a zero-crossing failure of an AC power input voltage or lack of input voltage decrease or input current increase in response to MOSFET turn on for a DC input.

Abstract: A diode is formed by a polycrystalline silicon bar which includes a first doped region with a first conductivity type, a second doped region with a second conductivity type and an intrinsic region between the first and second doped regions. A conductive layer extends parallel to the polycrystalline silicon bar and separated from the polycrystalline silicon bar by a dielectric layer. The conductive layer is configured to be biased by a bias voltage.

Abstract: A thermally-isolated-metal-oxide-semiconducting (TMOS) sensor has inputs coupled to first and second nodes to receive first and second bias currents, and an output coupled to a third node. A tail has a first conduction terminal coupled to the third node and a second conduction terminal coupled to a reference voltage. A control circuit applies a control signal to a control terminal of the tail transistor based upon voltages at the first and second nodes so that a common mode voltage at the first and second nodes is equal to a reference common mode voltage. A differential current integrator has a first input terminal coupled to the second node and a second input terminal coupled to the first node, and provides an output voltage indicative of an integral of a difference between a first output current at the first input terminal and a second output current at the second input terminal.

Abstract: An optical sensor includes pixels. Each pixel has a photodetector. A readout circuit performs a process over an exposure time where the photodetector is connected to a reverse bias voltage supply to reset a voltage across the photodetector, and the photodetector is disconnected from the reverse bias voltage supply until that the voltage across the photodetector decreases in response to received ambient light. An ambient light level is then determine an based on a number of times the voltage across the photodetector is reset over the exposure time.

Abstract: An image acquisition device includes an array of color filters and an array of microlenses over the array of color filters. At least one layer made from an inorganic dielectric material is formed between the array of color filters and the array of microlenses.

Abstract: A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.

Abstract: An integrated circuit includes a substrate having at least one first domain and at least one second domain that is different from the at least one first domain. A trap-rich region is provided in the substrate at the locations of the at least one second domain only. Locations of the at least one first domain do not include the trap-rich region.

Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

Abstract: A static random access memory (SRAM) architecture includes a first column of SRAM cells coupled between a first bit line and a first complementary bit line, and first write circuit for the first column. The first write circuit includes a first latch receiving first input data and providing complementary outputs to the first bit line and the first complementary bit line. The first write circuit has a latchable output state driving the first bit line and first complementary bit line, and the latchable output state does not change between consecutive write operations if a state of the received first input data does not change between the consecutive write operations, but does change between the consecutive write operations if the state of the received first input data changes between the consecutive write operations.

Abstract: A near-field communication device operates to transmit data by near-field communications techniques to another device. The near-field communication device includes a memory that stores a message to be transmitted in an ASCII format. The message is retrieved from the memory and transmitted using the near-field communications techniques in an ASCII format.

Abstract: One or more embodiments are directed to zero-rate level compensation systems. One such system includes stationary detection circuitry that receives gyroscope signals output by a gyroscope and determines whether the gyroscope is stationary based on the gyroscope signals. The stationary detection circuitry generates a stationary gyroscope signal indicating the gyroscope is stationary based on a determination that the gyroscope is stationary. A temperature sensor senses temperature and outputs temperature signals. Zero-rate level estimation circuitry receives the stationary gyroscope signal and a temperature signal associated with the stationary gyroscope signal, and iteratively estimates one or more zero-rate level compensation parameters based on the stationary gyroscope signal and the temperature signal.

Abstract: A circuit for protecting against electrostatic discharges includes two avalanche circuit components having different turn-on delays with respect to a beginning of an electrostatic discharge. The two avalanche circuit components are coupled in parallel. The avalanche circuit component closer to an output node has a turn-on delay on the order of 30 ns, while the avalanche circuit component closer to an input node has a turn-on delay on the order of 1 ns.

Abstract: A first element and a second element of a same device communicate with each other. The first element sends the second element a first piece of information representative of energy supplied by an electromagnetic field supplying power the device. The second element adapts its operating frequency as a function of the first piece of information.

Abstract: An apparatus includes at least one detector configured to receive return light from an object within a detector field of view the light generated by a light source. The detector includes first and second photosensitive regions configured to receive the return light from the light source. At least one non-photosensitive region is included, and the first and second photosensitive regions are separated by the at least one non-photosensitive region. The at least one non-photosensitive region is associated with one of the first or second photosensitive regions.