Abstract: In accordance with an embodiment, an ultrasound transmitter device includes a transformer comprising a secondary winding configured to be coupled to a piezoelectric transducer; a plurality of transistors coupled to the primary winding of the transformer and to a ground terminal via a sense resistor; an amplifier having an output coupled to control nodes of the plurality of transistors, a first input coupled to the sense resistor, and second input coupled to a reference resistor; a switching circuit configured to alternately couple control nodes of the plurality of transistors to an output of amplifier and to a reference node via complementary pulse signals, wherein the switching circuit is configured to turn on and turn off the plurality of transistors and operate the plurality of transistors in a push-pull manner; and a digital-to-analog converter having an output coupled to the reference resistor.

Abstract: A device facilitates personalizing an integrated circuit card including a fingerprint sensor. The device includes a support sheet, a first antenna located on top of and in contact with a surface of the support sheet, and at least one second antenna located on top of and in contact with the surface of the support sheet. The at least one second antenna is connected to the first antenna.

Abstract: A radiation hardened flip-flop includes a plurality of secondary flip-flops. Each secondary flip-flop includes both a data input terminal and an alternate data input terminal. Each secondary flip-flop also includes an enable terminal that selectively enables use of the alternate data input terminal. The radiation hardened flip-flop includes an error detection circuit that detects whether an error is present in one or more of the secondary flip-flops and provides an enable signal to the enable terminals indicating the presence or absence of an error in one or more of the secondary flip-flops.

Abstract: An electrically conductive substrate has mutually opposed first and second surfaces and electrically conductive die pads and elongated electrically conductive connecting bars coupled to the electrically conductive die pads. The elongated connecting bars are configured to be cut at intermediate points along their length to provide singulated substrate portions and have distributed along their length first recesses at the first surface alternating with second recesses at the second surface. Cutting the elongated connecting bars at the intermediate points provides bar remainders extending from a distal end to an electrically conductive die pad in a singulated substrate portion. The bar remainders have a serpentine pattern with one or more offsets between their distal end exposed at the surface of the insulating encapsulation of the device package and the electrically conductive die pad.

Abstract: An electronic device includes a bipolar transistor. A collector of the bipolar transistor is formed by first and second regions. The second region is located between the first region and a base of the bipolar transistor. A conductive element at least partially surrounds and is insulated from the second region. The conductive element is located between the first region and the base.

Abstract: A wireless communication device receives power in wireless fashion from another wireless communication device. A charging circuit of the wireless communication device is configured to charge a power storage device. A communication circuit of the wireless communication device is configured to communicate information relative to the charging of the power storage device to the other wireless communication device. To accomplish this, the communication circuit includes a wireless communication transponder and a switch coupled to a first terminal of the transponder, wherein the open and closed state of switch is controlled by the charging circuit.

Abstract: A time based boost DC-DC converter generates an output voltage using an inductor. A voltage error between the output voltage and a reference voltage is determined and processed in a) an integral control branch which converts the voltage error into an integral control current signal used to control a current controlled oscillator, and b) a proportional branch which converts the voltage error into a proportional control current signal used to control signal a delay line. Current flowing in the inductor is sensed, attenuated and used to apply adjustment to the integral and proportional control current signals. The output from the current controlled oscillator is passed through the delay line and phase detected in order to generate pulse width modulation (PWM) control signaling driving switch operation in the converter.

Abstract: A stream switch includes a data router, configuration registers, and arbitration logic. The data router has a plurality of input ports, each having a plurality of associated virtual input channels, and a plurality of output ports, each having a plurality of associated virtual output channels. The data router transmits data streams from input ports to one or more output ports of the plurality of output ports. The configuration registers store configuration data associated with the virtual output channels of the respective output ports of the plurality of output ports. The stored configuration data identifies a source input port and virtual input channel ID associated with the virtual output channel of the output port. The arbitration logic allocates bandwidth of the data router based on request signals associated with virtual input channels of the input ports and the configuration data associated with the virtual output channels.

Abstract: An apparatus comprises an array of vertical-cavity surface-emitting lasers. Each of the vertical-cavity surface-emitting lasers is configured to be a source of light. The apparatus also comprises an optical arrangement configured to receive light from a plurality of the vertical-cavity surface-emitting lasers and to output a plurality of light beams.

Abstract: An embodiment device for synchronizing the emission and the reception of a light signal for a time-of-flight sensor comprises a power-control circuit configured to generate and transmit a power signal based on a control signal for controlling the sensor, the power signal being configured to supply power to an array of pixels of the sensor, a production module for producing a synchronization signal, which module is configured to produce the synchronization signal based on the control signal, and a switch configured to supply power to a light source of a device for emitting the light signal, the production module being further configured to transmit the synchronization signal to the switch such that the time taken to produce and transmit the synchronization signal and the time taken to generate and transmit the power signal are identical.

Abstract: An optoelectronic chip includes optical inputs having different passbands, a photonic circuit to be tested, and an optical coupling device configured to couple said inputs to the photonic circuit to be tested.

Abstract: In an embodiment an electrically erasable programmable readable memory includes a plurality of memory cells organised in a memory plane arranged in a matrix fashion in rows and in columns, wherein each memory cell includes a state transistor having a source region, a drain region, an injection window situated on the side of the drain, a control gate and a floating gate and an isolation transistor having a source region, a drain region and a gate; and an isolation barrier including a buried layer and at least one wall extending from the buried layer to a surface of a substrate, wherein the at least one wall is perpendicular to the buried layer, and wherein the isolating barrier forms an interior substrate surrounding at least one of the memory cells and isolating it from the remainder of the substrate.

Abstract: In an embodiment a non-volatile memory device includes a memory plane including at least one memory area including an array of memory cells having two rows and N columns, wherein each memory cell comprises a state transistor having a control gate and a floating gate selectable by a vertical selection transistor buried in a substrate and including a buried selection gate, and wherein each column of memory cells includes a pair of twin memory cells, two selection transistors of the pair of twin memory cells having a common selection gate and a processing device configured to store in the memory area information including a succession of N bits so that, with exception of the last bit of the succession, a current bit of the succession is stored in two memory cells located on the same row and on two adjacent columns and a current bit and the following bit are respectively stored in two twin cells.

Abstract: A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.

Abstract: A digital signal processor includes K first electronic circuits. The first inputs receive K groups of G successive coefficients of a polynomial. The polynomial are of degree N with N+1 coefficients, where K is a sub-multiple of N+1 greater than or equal to two and G is equal to (N+1)/K. The first electronic circuits are configured to simultaneously implement K respective Horner methods and deliver K output results. A second electronic circuit includes a first input configured to successively receive the output results of the first electronic circuits starting with the output result of the first electronic circuit having processed the highest rank coefficient of the coefficients. A second input is configured to receive a variable X and the second electronic circuit is configured to implement a Horner method and deliver a value of the polynomial for the variable X on the output of the second electronic circuit.

Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.

Abstract: A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

Abstract: An integrated circuit memory includes a state transistor having a floating gate which stores a respective data value. A device for protecting the data stored in the memory includes a capacitive structure having a first electrically-conducting body coupled to the floating gate of the state transistor, a dielectric body, and a second electrically-conducting body coupled to a ground terminal. The dielectric body is configured, if an aqueous solution is brought into contact with the dielectric body, to electrically couple the floating gate and the ground terminal so as to modify the charge on the floating gate and to lose the corresponding data. Otherwise, the dielectric body is configured to electrically isolate the floating gate and the ground terminal.

Abstract: A method of making a light sensor module includes connecting a light sensing circuit to an interconnect on a substrate, and forming a cap. The cap is formed by producing a cap substrate from material opaque to light to have an opening formed therein, placing the cap substrate top-face down, dispensing a light transmissible material into the opening, compressing the light transmissible material using a hot tool to thereby cause the light transmissible material to fully flow into the opening to form at a light transmissible aperture, and placing the cap substrate into a curing environment. A bonding material is dispensed onto the substrate. The cap is picked up and placed onto the substrate positioned such that the light transmissible aperture is aligned with the light sensing circuit, with the bonding material bonding the cap to the substrate to thereby form the light sensor module.

Abstract: A system-on-chip includes a processor, a memory and a memory interface coupled to the processor and to the memory. The processor, in operation, generates memory access requests. The memory includes one or more physical banks divided into a succession of sectors, each sector having a size equal to a smallest erasable size of the memory. The memory interface, in operation, responds to receiving memory configuration information by storing logical memory bank configuration information in the one or more configuration registers, the logical memory bank configuration information assigning each sector of the one or more physical banks of the memory to a respective logical memory bank of one or more logical memory banks. The memory interface, in operation, controls access to the memory by the processor based on the logical memory bank configuration information stored in the one or more configuration registers.