Abstract: An inertial structure is elastically coupled through a first elastic structure to a supporting structure so as to move along a sensing axis as a function of a quantity to be detected. The inertial structure includes first and second inertial masses which are elastically coupled together by a second elastic structure to enable movement of the second inertial mass along the sensing axis. The first elastic structure has a lower elastic constant than the second elastic structure so that, in presence of the quantity to be detected, the inertial structure moves in a sensing direction until the first inertial mass stops against a stop structure and the second elastic mass can move further in the sensing direction. Once the quantity to be detected ends, the second inertial mass moves in a direction opposite to the sensing direction and detaches the first inertial mass from the stop structure.

Abstract: An electronic device capable of determining an eye convergence angle using a magnetometer sensor is provided. The magnetometer sensor is capable of reporting angle readings in three dimensions that is aligned with an eye gaze direction of each eye of a user. The magnetometer which is incorporated into the device can fit into a human eye like a contact lens and determine the angle of the gaze direction of both eyes with respect to an object within a field of view. By obtaining this eye convergence angle for an object, it is possible to accurately detect depth information. The electronic device also functions as a digital contact lens that can automatically adjust the focal point of the object to provide the user with a clear vision. The electronic device also includes a display that provides the user with additional information about the object.

Abstract: A semiconductor wafer includes first zones containing integrated circuits, each first zone including a substrate and a sealing ring at a periphery of the substrate. The first zones are separated from each other by second zones defining cutting lines or paths. The integrated circuit includes an electrically conductive fuse that extends between a first location inside the integrated circuit and a second location situated outside the integrated circuit beyond one of the cutting lines. This electrically conductive fuse includes a portion that passes through the sealing ring and another portion that straddles the adjacent cutting line. The portion of the fuse that passes through is electrically isolated from the sealing ring and from the substrate. The straddling portion is configured to be sliced, when cutting the wafer along the cutting line, so as to cause the fuse to change from an electrical on state to an electrical off state.

Abstract: An integrated circuit package includes a support substrate and a heat sink. A lateral wall of the heat sink is fastened on a mounting face of the support substrate by fastening devices. The fastening devices are accommodated in compartments of the lateral wall and cross the support substrate through the first orifices. The fastening devices and the first orifices are configured to enable fastening of the lateral wall on the mounting face and permit a relative movement of the fastening devices relative to the first orifices.

Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.

Abstract: A voltage regulator receives a reference voltage and generates a regulated voltage using a MOSFET having a gate terminal configured to receive a control voltage. A charge pump receives the regulated voltage and generates a charge pump voltage in response to an enable signal and a clock signal generated in response to the enable signal. The voltage regulator further includes a first switched capacitor circuit coupled to the gate terminal and configured to selectively charge a first capacitor with a first current and impose a first voltage drop on the control voltage in response to assertion of the enable signal. The voltage regulator also includes a second switched capacitor circuit coupled to the gate terminal and configured to selectively charge a second capacitor with a second current and impose a second voltage drop on the control voltage in response to one logic state of the clock signal.

Abstract: A base substrate has a thickness between two faces. The base substrate includes at least one hole extending in a thickness of the base substrate perpendicular to one of the two face. At least one dipole of a surface-mount device type is housed in the at least one hole of the base substrate.

Abstract: Disclosed herein is an integrated component formed by a first wafer having first and second trenches defined in a top surface thereof, and a second wafer coupled to the first wafer and formed by a substrate with a structural layer thereon that integrated an electromagnetic radiation detector overlying the second trench. A first cap is coupled to the second wafer, overlies the electromagnetic radiation detector, and serves to define a first air-tight chamber in which the electromagnetic radiation detector is positioned. A stator, a rotor, and a mobile mass are integrated within the substrate and form a drive assembly for driving the mobile mass. The rotor overlies the first trench. A second cap is coupled to the second wafer, overlies the mobile mass, and serving to define a second air-tight chamber in which the mobile mass is positioned.

Abstract: A control circuit for controlling a switching stage of an electronic converter includes a first terminal configured to provide a drive signal and a second terminal configured to receive a first feedback signal. A third terminal receives a second feedback signal and a driver circuit provides the drive signal as a function of a PWM signal. A PWM signal generator circuit generates the PWM signal as a function of the first feedback signal, a reference threshold and the second feedback signal or a slope compensation signal. The control circuit is configured to sense an input signal, provide a first compensation parameter, and provide a first compensating signal as a function of a power of the input sensing signal.

Abstract: In an embodiment, a phase circuit includes: a bidirectional output stage configured to be coupled between a first battery and a second battery; a memory configured to store a number of active phases, and an identifier; and a synchronization circuit configured to receive a first clock signal and determine a start time of a switching cycle of the bidirectional output stage based on the number of active phases, the identifier, and the first clock signal, where the phase circuit is configured to control the timing of the switching of the bidirectional output stage based on the start time.

Abstract: A charge-balance power device includes a semiconductor body having a first conductivity type. A trench gate extends in the semiconductor body from a first surface toward a second surface. A body region has a second conductivity type that is opposite the first conductivity type, and the body region faces the first surface of the semiconductor body and extends on a first side and a second side of the trench gate. Source regions having the first conductivity type extend in the body region and face the first surface of the semiconductor body. A drain terminal extends on the second surface of the semiconductor body. The device further comprises a first and a second columnar region having the second conductivity, which extend in the semiconductor body adjacent to the first and second sides of the trench gate, and the first and second columnar regions are spaced apart from the body region and from the drain terminal.

Abstract: A microelectromechanical system (MEMS) gyroscope includes a driving mass and a driving circuit that operates to drive the driving mass in a mechanical oscillation at a resonant drive frequency. An oscillator generates a system clock that is independent of and asynchronous to the resonant drive frequency. A clock generator circuit outputs a first clock and a second clock that are derived from the system clock. The drive loop of the driving circuit including an analog-to-digital converter (ADC) circuit that is clocked by the first clock and a digital signal processing (DSP) circuit that is clocked by the second clock.

Abstract: According to an embodiment, a method for a touch scan is proposed. The method includes operating a device in first and second modes corresponding to the device, respectively, being wirelessly and not wirelessly charged. In each mode for each frame, the method includes dividing a frequency range corresponding to a touch-sensing technology into M or N positive integer numbers of equal and sequential frequency intervals, where N is greater than M. In the first mode, the method includes determining a first frequency interval of the M frequency intervals with the least noise and performing the touch scan using a first frequency within the first frequency interval. In the second mode for each frame, the method includes determining a second frequency interval of the N frequency intervals with the least noise and performing the touch scan using a second frequency within the second frequency interval.

Abstract: The present disclosure is directed to human presence detection with an infrared sensor. The human presence detection utilizes signal regularization and edge detection to minimize the effect of drift on the human presence detection. The human presence detection is accurate regardless of changes in ambient temperatures.

Abstract: An electronic device applies a frequency offset function to a first signal having a first frequency. The device includes a delay element configured to output a second signal corresponding to the first signal delayed by a duration equal to a first period of said signal divided by four. A circuit branch includes a first circuit configured to divide the frequency of the first signal by a given number coupled in series with a second circuit configured to implement an integration. The circuit branch outputs a third signal and a fourth signal. A single side band mixing circuit processes the first signal, second signal, third signal and fourth signal to generate an output signal.

Abstract: A circuit is configured to perform an operation between a volatile memory and a cryptographic circuit in response to a write access request for writing one or more data values in the memory. The access request further includes a storage address in the memory. The operation includes steps for: writing the one or more data values; and for each of the one or more data values, generating a write access request, in the cryptographic circuit, for the data value, and generating a write access request, in the cryptographic circuit of the storage address. Additionally, a verification, in response to a read access request, from the processor, of a verification value is performed. The verification operation includes steps for: comparing the verification value with a reference value; and based on the comparing, authorizing access the volatile memory only for reading.

Abstract: The present disclosure relates to a regulator including a first transistor coupling an application node of a first power supply voltage to an output node of the regulator supplying a first regulated voltage; a feedback loop supplying a control signal to the first transistor and comprising a first charge pump circuit; a control signal generator of the first charge pump circuit; and a drop-down circuit between the control signal generator and the charge pump circuit.

Abstract: A power module includes an insulating body having a first main face and a second main face; a first contact plate and a second contact plate, respectively protruding through the first main face and through the second main face of the insulating body and accessible from the outside; a first power plate and a second power plate, at least partially embedded in the insulating body and facing each other. Power devices of a first group are accommodated on the first power plate and coupled to the first contact plate. Power devices of a second group are accommodated on the second power plate and coupled to the second contact plate. The first contact plate, the second contact plate, the first power plate and the second power plate, are stacked in a direction perpendicular to the first power plate and the second power plate.

Abstract: The present disclosure is directed to an optical sensor package with light shielding material covering five sides. The optical sensor package includes a transparent layer, a substrate layer, sensor elements between the transparent layer and the substrate layer, a first layer of light shielding material on the side of the substrate layer opposite the transparent layer, and a second layer of light shielding material covering five sides of the optical sensor package. The first and second layers of light shielding material prevent light from entering the sides of the optical sensor package or from traveling through the substrate layer and reflecting toward the sensor elements.

Abstract: A method is for synchronizing power consumption data with trace data in a microcontroller debugging system. The method involves periodically sending synchronization requests from a host device to a synchronization manager within a debug probe. The synchronization manager retrieves the current power acquisition cycle number from a power acquisition circuit in response to each request, corresponding to a current sample of microcontroller power consumption. Each synchronization request, along with the retrieved cycle number, is sent to a protocol manager, which transmits the request to a microcontroller's debug-port. Upon receiving acknowledgment from the microcontroller, the protocol manager communicates these to the synchronization manager. The synchronization manager measures the latency between sending each synchronization request and receiving its acknowledgment, which is indicative of synchronization quality.