Abstract: A pulse width modulation device includes a switching transistor for defining modulation phases, a capacitor, and switches arranged to: a) in a first phase, charge the capacitor to a voltage corresponding to the on/off threshold of the switching transistor, and b) in a second phase, connect the capacitor between a terminal for applying a setpoint voltage and the gate of the switching transistor. A constant current source is connected to apply a current in the capacitor tending to bring the gate of the switching transistor toward the on/off threshold.

Abstract: An approach for executing a toolkit action in an IC card includes storing in the IC card one or more identifiers and corresponding toolkit actions, and passing a web page in input to a converter in the IC card. The converter is configured to identify one or more of the identifiers in the html page and related text information associated with the identifiers. The approach includes sending the toolkit actions corresponding to the identifiers identified and the related text information to an application SIM Application Toolkit (SAT) of the IC card, for displaying the text information of the web page as SIM Application Toolkit menu.

Abstract: The present invention relates to systems and methods for inverse telecine or video de-interlacing for picture quality improvement on set-top-box and TV products. The system comprises a film mode detector at the picture or sequence level, a global mixed video and film content detector at the region, picture, or sequence level on top of the detected film content, and a local video content detector at pixel level on top of the detected mixed video and film content. Inverse telecine processing is applied on detected film content fading in with a locally de-interlaced local video content. The invention further provides an apparatus and method for globally detecting mixed video and film content at region, picture, or sequence level. Such apparatus and method comprise a plurality of detectors for robustness and increased detection accuracy.

Abstract: An analyzer for biochemical analyses includes a seat for receiving a recipient. A first light source and a second light source illuminate the recipient with a luminous radiation, respectively, in a first excitation band and in a second excitation band, including a first excitation wavelength and a second excitation wavelength of fluorophores of a first type and of a second type. A first image sensor and a second image sensor are oriented so as to receive light emitted by fluorophores contained in the recipient and are, respectively, provided with a first detection filter and a second detection filter, having, respectively, a first detection passband and a second detection passband, including, respectively, a first emission wavelength and a second emission wavelength of the fluorophores of the first type and of the second type.

Abstract: Aspects of the invention are directed towards an apparatus and method for detecting local video pixels in mixed cadence video. The local video detector comprises a comb detector that is adaptive to the contour of moving objects and local contrast, a motion detector that is robust to false motion due to vertical details, and a fader value estimator that provides a video confidence value to a fader that combines film mode and video mode processing results. The coupling of the local video detector to a film mode detector increases the robustness, accuracy, and efficiency of local film/video mode processing as compared to the prior art.

Abstract: An embodiment of a method for automated test pattern generation (ATPG), a system for ATPG, and a memory configured for ATPG. For example, an embodiment of a memory includes a first test memory cell, a data-storage memory cell, and a test circuit configured to enable the test cell and to disable the data-storage cell during a test mode.

Abstract: A driver circuit includes a differential input, a differential output, a bias node, a first T-coil having a first node coupled to the negative output node and a second node coupled to a source of supply voltage, a second T-coil having a first node coupled to the positive output node and a second node coupled to the source of supply voltage, a first transistor having a current path coupled between the center tap of the first T-coil and a first intermediate node, a second transistor having a current path coupled between the center tap of the second T-coil and a second intermediate node, a third transistor having a current path coupled between the first intermediate node and ground, and a fourth transistor having a current path coupled between the second intermediate node and ground.

Abstract: The approach is for protecting a solid state memory including a microprocessor. The microprocessor controls the requests for access to the physical blocks of the memory and transfers one or more requested files from a requesting device only subsequently to a comparison of a predetermined sequence of requests for access to the physical blocks. The predetermined sequence of requests for access to physical blocks corresponds to a predetermined sequence of requests for access to file(s) of the memory that can be selected by the device. If the sequence of requests for access does not occur, the microprocessor does not transfer the data requested or transfers them in a non readable format, for example in cryptographic form.

Abstract: Methods and systems are described for displaying video data after a hot plug event during a start-up dead period. In particular, approaches for receiving data, determining whether link training can be performed and, if not, self-configuring a receiver to display the information in a proper format even during the dead period.

Abstract: An integrated capacitive device includes an electrically conducting comb, at least some of whose teeth form first electrodes of capacitors, and electrically conducting fingers extending between the teeth of the comb so as to form second electrodes of the capacitors. The device includes a first finger-teeth set having a single reference finger forming a reference capacitor having a reference capacitive value, at least one second finger-teeth set including several fingers, the reference finger and the number of fingers of the second finger-teeth set or sets forming a geometric series with ratio two. At least one additional set includes a single additional finger forming, with at least one tooth of the comb, an additional capacitor having an additional capacitive value substantially equal to half the reference capacitive value.

Abstract: An insulating body embeds at least one integrated circuit chip and a first and second exposed heat sink exposed on a free surface opposite a mounting surface of the body. An external heat-sink extends above the free surface. The external heat-sink includes a first dissipative portion and a second dissipative portion for contacting the first and second heat-sinks on the free surface, respectively, as well as an insulating portion for electrically insulating the first dissipative portion from the second dissipative portion. The first dissipative portion and the second dissipative portion are symmetrical with respect to the insulating portion. An extension of the external heat-sink may provide a stabilizing element. The extension of the external heat-sink may alternatively thermally and electrically interconnect two insulating bodies, each body embedding at least one integrated circuit chip.

Abstract: An electronic device includes at least one chip and an insulating body embedding the chip. The electronic device further includes a heat-sink in contact with the chip. The heat-sink includes a plate having a first thickness. A recess is provided in the plate that defines a central portion of the plate having a second thickness less than the first thickness. The chip is mounted to the central region of the heat-sink within the recess. The insulating body includes a surface, such as a mounting surface, including an opening exposing at least a portion of the heat-sink. The device may further include a reophore extending through a side surface of the insulating body, that reophore being in contact with the heat sink.

Abstract: An integrated circuit (IC) provides a reset function. The IC receives a command that is defined by a first sequence of counts of signal transitions of a first signal during windows of a second signal and provides a reset function when it is determined that the command is received. A device including the IC and a system including the device are provided.

Abstract: An insulating body incorporates at least one integrated circuit chip and includes a mounting surface for mounting to a board and a free surface opposite the mounting surface. A heatsink is attached to the insulating body at the free surface. The heatsink includes at least one stabilizing element. The stabilizing element includes an attachment portion extending at least partially transversely to the free surface beyond a peripheral boundary of the free surface when considered in plan view. The attachment portion has a binding end bound to the free surface and a free end opposite the binding end. The stabilizing element also has a mounting portion extending from the free end of the attachment portion at least up to a plane of the mounting surface.

Abstract: A nonvolatile memory device includes a discharge circuit configured to selectively connect circuit nodes to discharge terminals through corresponding discharge paths, and an accumulation device for accumulating electric charge. A driving circuit is for driving the discharge circuit in such a way to connect at least a part of such circuit nodes to the discharge terminals if the value of the external supply voltage falls below a corresponding threshold. A supply circuit is for supplying the driving circuit with an intermediate supply voltage. Each one of the intermediate supply voltages is the corresponding external supply voltage when the value of the external supply voltage is higher than the corresponding threshold, or it is an internal voltage locally generated by the supply circuit by exploiting the electric charge stored by the accumulation device when the value of the external supply voltage is lower than the corresponding threshold.

Abstract: A memory bank includes memory cells and an additional cell to determine an operating voltage of the memory bank. The additional cell has an operating margin that is less than a corresponding operating margin of the other memory cells in the memory bank.

Abstract: A memory includes memory cells, data lines, block select lines, and selection circuitry. The data lines provide data to and from the memory cells and may be grouped into blocks. Each block includes data lines. Each of the block select lines is associated with a respective one of the blocks. The selection circuitry is select a block in response to a respective block select line and the memory performs a memory operation using the selected bit line block.

Abstract: A process inserts a random noise in a Time to Digital Converter (TDC) designed for calculating the phase error between a first high frequency signal FDCO with respect to a second reference signal, switching at a lower frequency.

Abstract: An embodiment of a process for manufacturing an electronic device on a semiconductor body of a material with wide forbidden bandgap having a first conductivity type.

Abstract: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion.