Abstract: A non-volatile memory device may be integrated in a chip of semiconductor material. The memory device may include circuitry for receiving a measure instruction for obtaining a numerical measure value of a selected one among a plurality of predefined memory operations of the memory device. The memory device may also include circuitry for enabling the execution of the selected memory operation in response to the measure instruction. The execution of the selected memory operation may generate a corresponding result. The memory device may further include circuitry for providing at least one time signal, different from the corresponding result, relating to the execution of each memory operation, and circuitry for determining the measure value according to the at least one time signal of the selected memory operation.

Abstract: A directional dual distributed coupler including: a first conductive line between first and second ports, intended to convey a signal to be transmitted in a first frequency band; a second conductive line coupled to the first one; a third conductive line between third and fourth ports, intended to convey a signal to be transmitted in a greater frequency band than the first one; a fourth conductive line coupled to the third one; and at least one diplexer connecting, on the side of the second and fourth ports, the respective ends of the second and fourth lines to a fifth port.

Abstract: A method for non-destructive reading of logic data stored in a memory includes applying to a first wordline a reading voltage so as not to cause a variation of the stable state of polarization of a layer of ferroelectric material, and generating a difference of potential between first and second bitlines. An output current is generated comparing the output current with a plurality of comparison values, and determining the logic value of the logic data to be read on the basis of the comparison.

Abstract: Circuitry for encrypting at least a part of an input data flow and generating a tag based on the input data flow with the same ciphering algorithm and the same key, the algorithm including iterative computations by at least two operation units, the circuitry including a pipeline including an input selection unit arranged to receive first data values to generate encryption sequences with the ciphering algorithm, second data values to generate temporary tags with the ciphering algorithm and an output of the pipeline; a first stage arranged to receive an output of the input selection unit and including at least a first operation unit; and a second stage arranged to receive an output of the first stage, including at least a second operation unit and providing the output of the pipeline.

Abstract: A resistive element having two vertical resistive portions placed in two holes formed in the upper portion of a substrate and a horizontal resistive portion placed in a buried cavity connecting the bottoms of the holes.

Abstract: An oscillator having a plurality of operatively coupled ring oscillators arranged in hyper-matrix architecture. The operatively coupled ring oscillators are either identical or non-identical and are coupled through a common inverter or tail current transistors.

Abstract: An integrated circuit for a smart card includes a plurality of data buffers and a processor. In particular, the processor selectively allocates data buffers from the plurality thereof and exchanges data therewith based upon different types of data. As such, the processor advantageously changes the allocation of the buffers for different data types based upon various bandwidth constraints in a particular smart card environment to enhance bandwidth utilization.

Abstract: A process for the production of hydrogen for micro fuel cells, comprises the successive steps of: continuously supplying a catalytic bed with an aqueous solution of sodium borohydride, the catalytic bed being made of at least one metal chosen among cobalt, nickel, platinum, ruthenium with obtainment of hydrogen and of a by-product comprising sodium metaborate, continuously recovering the hydrogen thus obtained and supplying, with said hydrogen as it is as obtained, a micro fuel cell which transforms hydrogen into electric energy. An apparatus provides continuous supply of hydrogen to a micro fuel cell. An integrated system structured for continuously producing and supplying hydrogen to a micro fuel cell and for converting the continuously supplied hydrogen into electric energy.

Abstract: A dual supply circuit uses a dual feedback control, single inductor, dual polarity boost architecture with a low side power FET for end of current recirculation sensing. A dual feedback system tracks the output voltage variations and a low side power FET end of current recirculation sensing utilizes the internal current limit sensing system. Logic defining the state of operations allows the regulator to operate in both single and dual mode to cater to wide application ranges. The positive boost regulator can be operated in a buck mode making the output voltage constant with high input supply.

Abstract: A method for manufacturing and for testing an integrated circuit, including the steps of forming, on the upper portion of the integrated circuit, a passivation layer including openings at the level of metal tracks of the last interconnect stack of the integrated circuit; forming, in the openings, first pads connected to second pads formed on the passivation layer by conductive track sections, the first pads being intended for the connection of the integrated circuit; testing the integrated circuit by bringing test tips in contact with the second pads; and eliminating at least a portion of at least one of the conductive track sections.

Abstract: A device for measuring the current flowing through a power transistor of a voltage regulator, the voltage regulator having an input voltage and providing a regulated output voltage and the power transistor coupled between the input and output voltages. The measuring device includes a further transistor adapted to mirror a portion of the current flowing through the power transistor, the further transistor and the power transistor have a first non-drivable terminal in common that is coupled to the input voltage. The measuring device also includes a circuit block to connect the second non-drivable terminals of the power and the further transistor and to provide an output current equal to the portion of the current flowing through the first transistor; the measuring device further including a circuit adapted to detect the output current of said circuit block.

Abstract: A method and a device for protecting a security module connected to a near-field communication router in a telecommunication device, wherein a transmission between the router and the security module is only allowed in the presence of a radio frequency communication flow detected by the router.

Abstract: A pump having: a cavity formed inside an insulating substrate, the upper part of the substrate being situated near the cavity having an edge; a conductive layer covering the inside of the cavity up to the edge and optionally covering the edge itself; a flexible membrane made of a conductive material placed above the cavity and resting against the edge; a dielectric layer covering the conductive layer or the membrane whereby insulating the portions of the conductive layer and of the membrane that are near one another; at least one aeration line formed in the insulating substrate that opens into the cavity via an opening in the conductive layer, and; terminals for applying a voltage between the conductive layer and the membrane.

Abstract: A multichannel splitter formed from 1 to 2 splitters, wherein: an input terminal of a first 1 to 2 splitter defines an input of the multichannel splitter; the 1 to 2 splitters are electrically series-connected; and first respective outputs of the 1 to 2 splitters define output terminals of the multichannel splitter.

Abstract: A method for encoding video signals subjects the signals to unbalanced multiple description coding. The unbalanced multiple description coding codes a video signal in a first high resolution packet and a second low resolution packet and represents, respectively a first high resolution description and a second low resolution description. The unbalanced multiple description coding step includes using different intra refresh periods for the first and second high resolution descriptions, with an intra refresh period for the second low resolution description shorter than the intra refresh period of the first high resolution description.

Abstract: A parallel deblocking filtering method, and deblocking filter processor performing such deblocking, for removing edge artifacts created during video compression. The method includes loading luma samples for a macroblock. Filtering is performed on a set of vertical edges of the macroblock using information in the luma samples, with vertical edge filtering occurring concurrently with the loading of the luma samples. The method also includes filtering a set of horizontal edges of the macroblock using information in the luma samples. The horizontal edge filtering occurs in parallel with vertical edge sampling and with loading operations. The use of parallel and concurrent operations significantly enhances the efficiency of the deblocking method. Storing of filtered samples is also performed in the method, and this storing is performed concurrently with some loading operations as well as filtering operations. Edge filtering includes performing filtering to the H.264 standard and its deblocking filtering algorithm.

Abstract: A method of forming a field effect transistor comprising a gate formed on an insulating layer, the gate having, in a zone in contact with the insulating layer, a semiconducting central zone and lateral zones in the length of the gate, the method comprising forming a gate comprising a portion of insulating layer, a portion of semiconducting layer formed over the insulating layer, and a portion of mask layer formed over the semiconducting layer; performing an etching of the portion of the mask layer such that only a portion in the center of the gate remains; and reacting the semiconducting gate with a metal deposited over the gate.

Abstract: A satellite orbit prediction method of a satellite navigation system includes storing satellite past ephemerides data associated with past time intervals and satellite recent ephemeris data associated with a recent time interval, and computing reference satellite positions based on the past and recent ephemerides data. The method also includes: computing estimated satellite positions by propagating on the past time intervals using a celestial mechanics force model and the recent ephemeris data, computing errors from the reference satellite positions and estimate satellite positions, and identifying a position error function by fitting a curve to the computed errors. The position error function is used to obtain corrected predicted satellite orbit portions.

Abstract: A pixel structure includes two different photosensitive portions. One portion is shielded from incident light and the signals from both are fed into an op amp so that the differential signal is output as the pixel output, thereby cancelling dark current.

Abstract: The disclosure relates to an electrically erasable and programmable memory, comprising memory cells arranged in bit lines and word lines transverse to bit lines, wherein each memory cell may be in a programmed or erased state, the memory comprising memory cell selection circuits configured to memorize and read data bits in two memory cells belonging to different bit lines and different word lines, and to avoid a memory cell from being written or read by mistake in another state than a default state after a gate oxide breakdown of a transistor of the memory, and a read circuit to determine a data bit to be read in the memory according to the states of the two memory cells memorizing the data bit.