Abstract: A process manufactures a multi-drain power electronic device integrated on a semiconductor substrate of a first type of conductivity whereon a drain semiconductor layer is formed. The process includes: forming a first semiconductor epitaxial layer of the first type of conductivity of a first value of resistivity forming the drain epitaxial layer on the semiconductor substrate, forming first sub-regions of a second type of conductivity by a first selective implant step with a first implant dose, forming second sub-regions of the first type of conductivity by a second implant step with a second implant dose, and forming a surface semiconductor layer. The process also includes forming body regions of the second type of conductivity aligned with the first sub-regions, and carrying out a thermal diffusion process so that the first sub-regions form a single electrically continuous column region aligned and in electric contact with the body regions.

Abstract: A process for managing virtual machines in a physical machine includes the generation of virtual machines and executing operating systems in the virtual machines on top of the physical machine. A virtual machine monitoring function includes the operations of running in privileged mode, operating multiprogramming functions and providing a plurality of virtual machines identical to the physical machine for executing the operating systems.

Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.

Abstract: An embodiment of regulation and shaping circuit includes a first input terminal for receiving a first input signal with a first frequency; a second input terminal for receiving a second input signal with a second frequency higher than the first frequency; a first circuital branch coupled to the first input terminal and, through first coupling means active at the first frequency, to an output terminal for providing an output signal; a second circuital branch coupled to the second input terminal and to the output terminal, wherein said second circuital branch comprises a negative feedback circuital loop adapted to control the output signal according to the second input signal.

Abstract: An electrical connection board includes electrical connection terminals on one face with a view toward connecting with a semiconductor component and electrical connection tracks connected respectively to these terminals. The terminals are arranged in a square matrix having two orthogonal directions. On its face, the board includes a multiplicity of identical adjacent connection groups, each group having N adjacent terminals and N tracks placed along this direction while extending towards an edge of the matrix. The terminals of a group are offset by one pitch relative to the terminals of an adjacent group. The board and a semiconductor component are connected together by electrical connection balls.

Abstract: A high-voltage vertical power component including a lightly-doped semiconductor substrate of a first conductivity type and, on the side of an upper surface, an upper semiconductor layer of the second conductivity type which does not extend all the way to the component periphery, wherein the component periphery includes, on the lower surface side, a ring-shaped diffused region of the second conductivity type extending across from one third to half of the component thickness; and on the upper surface side, an insulated ring-shaped groove crossing the substrate to penetrate into an upper portion of ring-shaped region.

Abstract: A coprocessor includes a calculation unit for executing at least one command, and a securization device. The securization device includes an error detection circuit for monitoring the execution of the command so as to detect any execution error, putting the coprocessor into an error mode by default as soon as the execution of the command begins, and lifting the error mode at the end of the execution of the command if no error has been detected, an event detection circuit for monitoring the appearance of at least one event to be detected, and a masking circuit for masking the error mode while the event to be detected does not happen, and declaring the error mode to the outside of the coprocessor if the event to be detected happens while the coprocessor is in the error mode. Application in particular but not exclusively to coprocessors embedded in integrated circuits for smart cards.

Abstract: A flexible sheet of organic polymer material, may include a monolithically fabricated array of one or more types of cells juxtaposed among them to form a multi-cell sheet. Each cell may include a self consistent, organic base integrated circuit, replicated in each cell of same type of the array, and shares, in common with other cells of same type, at least a conductor layer of either an electrical supply rail of the integrated circuit or of an input/output of the integrated circuit. A piece of the multi-cell, sheet including any number of self consistent integrated circuit cells, may be severed from the multi-cell sheet by cutting the sheet along intercell boundaries or straight lines, with a reduced affect on the operability of any cell spared by the cutting.

Abstract: A synchronization system includes a memory and a control circuit. The control circuit includes a write interface for writing data in said memory with a first clock signal, wherein the write interface is configured for operating with a write pointer in response to a write command, a read interface for reading data from said memory with a second clock signal, wherein the read interface is configured for operating with a read pointer in response to a read command, a synchronization circuit for synchronizing said write pointer and said read pointer with a synchronization latency, and an elaboration circuit for elaborating data in memory with an elaboration latency, wherein the elaboration latency is smaller than the synchronization latency.

Abstract: In one embodiment of the present invention, motion compensated interpolation is performed by locating full frame conceal and reveal areas, determining intermediate frame occlusion areas of an interpolated frame of the displayable output by locating intermediate frame conceal areas based on projected locations of pixels within the full frame conceal areas using forward motion vectors and information about a time slot for the interpolated frame, and by locating intermediate frame reveal areas based on projected locations of pixels within the full frame reveal areas using backward motion vectors and information about the time slot for the interpolated frame; for any pixels in the interpolated frame to which there is neither a forward vector nor a backward vector projecting: including the pixel in an intermediate frame conceal area if it is not located within the full frame reveal area; including the pixel in an intermediate frame reveal area if it is not located within the full frame conceal area; and using the

Abstract: In one embodiment of the present invention, motion compensated interpolation is performed by locating full frame conceal and reveal areas, determining intermediate frame occlusion areas of an interpolated frame of the displayable output by locating intermediate frame conceal areas based on projected locations of pixels within the full frame conceal areas using primary forward motion vectors and information about a time slot for the interpolated frame, and by locating intermediate frame reveal areas based on projected locations of pixels within the full frame reveal areas using primary backward motion vectors and information about the time slot for the interpolated frame. The intermediate frame conceal areas are then modified by projecting locations of pixels using secondary forward motion vectors and the intermediate frame reveal areas are modified by projecting locations of pixels using secondary backward motion vectors.

Abstract: Switches that are actuated through exposure to a magnetic field are described. Such switches include conductive portions that are electrically separate from one another when in an open switch configuration. A mobile element of a switch includes one or more anchoring members that are in electrical contact with one of the conductive portions. The mobile element also has a beam that is attached to the one or more anchoring members. The beam can be attached to the one or more anchoring members by flexures. In some cases, the beam includes a plurality of strips. The beam has an end portion that is configured to move toward the other conductive portion when exposed to an external force, such as a magnetic field. When the mobile element electrically contacts the other conductive portion of the substrate, an electrical pathway is established between the conductive portions, giving rise to a closed switch configuration.

Abstract: An integrated differential pressure sensor includes, in a monolithic body of semiconductor material, a first face and a second face, a cavity extending at a distance from the first face and delimited therewith by a flexible membrane formed in part by epitaxial material from the monolithic body and in part by annealed epitaxial material from the monolithic body, an access passage in fluid communication with the cavity, and in the flexible membrane at least one transduction element configured so as to convert a deformation of the flexible membrane into electrical signals. The cavity is formed in a position set at a distance from the second face and is delimited at the second face with a portion of the monolithic body.

Abstract: This is a method for controlling the decoding of a LDPC encoded codeword composed of several digital data, said LDPC code being represented by a bipartite graph between check nodes (CN1) and variable nodes (VNi). Said method comprises updating messages exchanged iteratively between variable nodes (VN1) and check nodes (CN1). Said method comprises, at each iteration, calculating for each variable node a first sum (?n) of all the incident messages (?i) received by said variable node and the corresponding digital data (?ch) and calculating a second sum (VNRnew) of all the absolute values of the first sums (?n), and stopping the decoding process if the second sum (VNRnew) is unchanged or decreases within two successive iterations and if a predetermined threshold condition is satisfied.

Abstract: A fuel cell membrane is described comprising at least one sulfonated aromatic polyether copolymer comprising a poly-arylen-ether-ketone (PEK) moiety or sulfonated derivatives thereof, deriving from spiro-bis-indane or 4,4?-(hexafluoroisopropylidene)diphenol (BPAF), and an arylene-sulfone, or an arylene-ketone or sulfonated derivative thereof; said copolymer having the following formula (1): wherein Ar1 has formula, wherein X is spiro-bis-indanile (SBI) (b) or BPAF (c) having formulas: and wherein Y is H or SO3H, and Ar2 has formula wherein W is CO or SO2, and Y is H or SO3H, wherein Z is OH or Cl; and wherein at least one between Ar1 or Ar2 comprise at least one sulfonic group; and wherein n is an integer comprised between 2 and 50. A method for the production of such membrane is also described.

Abstract: A method of managing power consumption in a device, such as a video image processing device for processing data from one or more pixels, includes forming a frame of an image. The method further includes determining one or more regions of interest in the image, identifying one or more pixels located in the one or more regions of interest, and processing the one or more identified pixels in a predetermined manner. Power for at least part of the device is switched off if no pixels are identified in a region of interest within a predetermined period of time.

Abstract: A method and a circuit for protecting the execution of a calculation by an electronic circuit, conditioning a result of the calculation to states of bits indicative of executions of steps of access in read mode and/or in write mode to storage elements.

Abstract: The present invention relates to a new light emitters that exploit the use of semiconducting single walled carbon nanotubes (SWNTs). Experimental evidences are given on how it is possible, within the standard silicon technology, to devise light emitting diodes (LEDs) emitting in the infrared IR where light emission results from a radiative recombination of electron and holes on semiconducting single walled carbon nanotubes (SWNTs-LED). We will also show how it is possible to implement these SWNTs-LED in order to build up a laser source based on the emission properties of SWNTs. A description of the manufacturing process of such devices is also given.

Abstract: A source of photons resulting from a recombination of localized excitons, including a semiconductor layer having a central portion surrounded with heavily-doped regions; above said central portion, a layer portion containing elements capable of being activated by excitons, coated with a first metallization; and under the semiconductor layer, a second metallization of greater extension than the first metallization. The distance between the first and second metallizations is on the order of from 10 to 60 nm; and the lateral extension of the first metallization is on the order of from ?0/10*ne to ?0/2*ne, where ?0 is the wavelength in vacuum of the emitted light and ne is the effective refractive index of the mode formed in the cavity created by the two metallizations.

Abstract: A device for measuring impedance of biological tissue may include a pair of electrodes for contacting the biological tissue, and a drive circuit coupled to the pair of electrodes and configured to drive an alternating current (AC) through the biological tissue and to sense an AC voltage. The AC voltage is towards a reference voltage on at least one of the pair of electrodes. The device may include at least one single-ended amplitude modulation (AM) demodulator configured to demodulate the AC voltage and to generate a corresponding baseband voltage representing the impedance, and an output circuit configured to generate output signals representative of DC and AC components of the baseband voltage.