Abstract: A wireless electronics device includes an energy storage device for storing electrical energy. A frequency detection circuit detects whether a received radio frequency signal is in a first frequency range or in a second frequency range, the first and second frequency ranges being non-overlapping. A first communications circuit transmits a first return signal if the radio frequency signal is in the first frequency range and establishes wireless charging of the energy storage device according to a first protocol. A second communications circuit transmits a second return signal if the radio frequency signal is in the second frequency range and establishes wireless charging of the energy storage device according to a second protocol.

Abstract: An embodiment system comprises a physical unclonable function device, wherein the device comprises a first assembly of non-volatile memory cells each having a selection transistor embedded in a semiconductor substrate and a depletion-type state transistor having a control gate and a floating gate that are electrically connected, the state transistors having respective effective threshold voltages belonging to a common random distribution, and a processing circuit configured to deliver, to an output interface of the device, a group of output data based on a reading of the effective threshold voltages of the state transistors of the memory cells of the first assembly.

Abstract: A switching regulator circuit has a high side (HS) transistor actuated during on time (TON) of a duty cycle. The output current of the switching regulator circuit is determined from sensing a transistor current flowing through the HS transistor during HS transistor on time (TON) and dividing the sensed transistor current by the duty cycle to generate an output signal indicative of the output current of the switching regulator circuit. The duty cycle is determined from a ratio of the on time (TON) and off time (TOFF) of the switching regulator circuit.

Abstract: Disclosed herein is a microelectromechanical (MEMS) device, including a rotor and a first piezoelectric actuator mechanically coupled to the rotor. The first piezoelectric actuator is electrically coupled between a first signal node and a common voltage node. A second piezoelectric actuator is mechanically coupled to the rotor, and is electrically coupled between a second signal node and the common voltage node. Control circuitry includes a drive circuit configured to drive the first and second piezoelectric actuators, a sense circuit configured to process sense signals generated by the first and second pizeoelectric actuators, and a multiplexing circuit. The multiplexing circuit is configured to alternate between connecting the drive circuit to the first piezoelectric actuator while connecting the sense circuit to the second piezoelectric actuator, and connecting the drive circuit to the second piezoelectric actuator while connecting the sense circuit to the first piezoelectric actuator.

Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.

Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.

Abstract: In accordance with embodiments, methods and systems for utilizing multiple threshold checkers are provided. A range sensor collects measurement data. The range sensor examines the measurement data based on multiple threshold checkers to determine satisfaction of a trigger condition. In response to the satisfaction of the trigger condition, the range sensor provides the measurement data to a host computing device of the range sensor.

Abstract: MEMS device comprising: a signal processing assembly; a transduction module comprising a plurality of transducer devices; a stiffening structure at least partially surrounding each transducer device; one or more coupling pillars for each transducer device, extending on the stiffening structure and configured to physically and electrically couple the transduction module to the signal processing assembly, to carry control signals of the transducer devices. Each conductive coupling element has a section having a shape such as to maximize the overlapping surface with the stiffening structure around the respective transducer device. This shape includes hypocycloid with a number of cusps equal to or greater than three; triangular; quadrangular.

Abstract: The present disclosure is directed to leadless semiconductor packages with improved wettable flanks that encourage the formation of solder fillets when the leadless semiconductor package is mounted to a substrate. The solder fillets are consistently formed and are easily detectable by inspection systems, such as automated optical inspection (AOI) systems.

Abstract: Electrically insulating material such as an epoxy resin is molded onto a sculptured, electrically conductive leadframe structure comprising a pattern of electrically conductive formations. The electrically insulating material penetrates into spaces between electrically conductive formations in the pattern of electrically conductive formations to provide a pre-molded leadframe structure configured to have at least one semiconductor die arranged thereon. The pre-molded leadframe structure has opposed first and second surfaces and a pre-molded leadframe thickness between the first surface and the second surface. The sculptured, electrically conductive leadframe structure comprises one or more connection formations connected with electrically conductive formations in the pattern of electrically conductive formations. The connection formation or formations have a first thickness equal to the thickness between the first surface and the second surface.

Abstract: An electronic device includes a debug port providing a communications interface for debugging purposes, a plurality of processing unit access ports, an authentication interface circuit configured to authenticate the external device, and a further access port coupled between the debug port and the authentication interface circuit. The further access port is configured to be in an open state in which communications are relayed between the debug port and the authentication interface circuit. The authentication interface circuit has registers including a status register capable of being read by the external device via the debug port and the further access port, the status register being configured to store an indication of the open or closed state of each of the processing unit access ports.

Abstract: One or more semiconductor dice are arranged on a die pad of a leadframe having an array of electrically conductive leads around the die pad. A pattern of electrically conductive wires is provided to couple the semiconductor die or dice with electrically conductive leads in the array around the die pad. An encapsulation of insulating material is provided to encapsulate the semiconductor die or dice arranged on the die pad and the pattern of electrically conductive wires.

Abstract: A system-on-a-chip includes a first digital domain and a second digital domain. An interface circuit includes a level-shifting circuit for converting a signal between the first digital domain and the second digital domain. The first digital domain includes a control circuit configured to generate a control signal for transmission to the second digital domain. The control signal includes a pulse having a nominal duration adapted to the level-shifting circuit. At the input of the level-shifting circuit, the interface circuit includes, in the first domain, a conditional pulse-stretching circuit that lengthens a duration of the pulse of the control signal to at least the nominal duration when a duration of the pulse of the control signal is shorter than the nominal duration and non-zero.

Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.

Abstract: The present description concerns a method of manufacturing an insulating trench in a substrate, for an electronic device, comprising the following successive steps: (a) filling a trench formed in the substrate with a first insulating material; (b) depositing a first etch stop layer on the first material; (c) depositing a second layer of a second insulating material on the first etch stop layer; (d) etching down to the etch stop layer; and (e) depositing a third layer made of a third tight material.

Abstract: The present description concerns an optical filter intended to be arranged in front of an image sensor comprising a plurality of pixels, the filter comprising, for each pixel, at least one resonant cavity comprising a transparent region having a first refraction index and laterally delimited by a reflective peripheral vertical wall, and at least one resonant element formed in said region.

Abstract: An integrated circuit includes a programmable logic block. The programmable logic block includes a programmable logic array (PLA) and a field programmable gate array (FPGA). The PLA includes logic cells having a first architecture. The FPGA includes logic cells having a second architecture more complex than the first architecture. The programmable logic block includes an interface coupled to the PLA and the FPGA. An integrated circuit may also include circuitry for selecting one of plurality of clock signals for logic cells of a PLA.

Abstract: A microelectromechanical device includes: a support body; at least one movable mass of semiconductor material, elastically constrained to the support body so as to be able to oscillate; fixed detection electrodes rigidly connected to the support body and capacitively coupled to the at least one movable mass; and at least one test structure of semiconductor material, rigidly connected to the support body and distinct from the fixed detection electrodes. The test structure is capacitively coupled to the at least one movable mass and is configured to apply electrostatic forces to the at least one movable mass in response to a voltage between the test structure and the at least one movable mass.

Abstract: A sensor device includes an infrared sensor configured to generate sensor data. The sensor device also includes a configurable digital analysis block. The configurable digital analysis block is configured to generate classification data based on the sensor data. The configurable digital analysis block includes a plurality of selectable analysis blocks that can be selectively included in generating the classification data.

Abstract: An IMC circuit includes a memory cells arranged in matrix. Computational weights for an IMC operation are stored in groups of cells. Each row of groups of cells includes a positive and negative word linen. Each column of groups of cells includes a bit line. The IMC operation includes a first elaboration where a word line signal is applied to the positive/negative word line of the group of cells depending on the positive/negative sign, respectively, of the coefficient data, with a positive MAC output on the bit line. In a second elaboration, a word line signal is applied to the negative/positive word line of the group of cells depending on the positive/negative sign, respectively, of the coefficient data, with a negative MAC output on the bit line. The IMC operation result is obtained from a difference between the positive and negative MAC operations.