Patents Assigned to STMicroelectronics
  • Publication number: 20140189175
    Abstract: A circuit comprising: a device determiner configured to, in a first mode of operation, receive a device selection signal via at least one of: at least one control line and at least one signal line; and a device router configured to, in a second mode of operation, route signals between the at least one of: at least one control line and at least one signal line and at least one device dependent on the device selection signal.
    Type: Application
    Filed: December 9, 2013
    Publication date: July 3, 2014
    Applicant: STMicroelectronics International N.V.
    Inventors: Gaurav Mathur, Pratik Damle
  • Publication number: 20140183685
    Abstract: An image sensor arranged inside and on top of a semiconductor substrate, having a plurality of pixels, each including: a photosensitive area, a read area, and a storage area extending between the photosensitive area and the read area; at least one first insulated vertical electrode extending in the substrate between the photosensitive area and the storage area; and at least one second insulated vertical electrode extending in the substrate between the storage area and the read area.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicants: Commissariat à I'Énergie Atomique et aux Énergies Atlernatives, STMicroelectronics S.A.
    Inventors: François Roy, Yvon Cazaux
  • Publication number: 20140184912
    Abstract: A video window detector includes a region characteristic determiner to generate at least one characteristic value for at least one region of a display output; a characteristic map generator to generate an image map from the at least one characteristic value for at least one region of the display output; and a window detector to detect at least one video window dependent on the image map.
    Type: Application
    Filed: November 26, 2013
    Publication date: July 3, 2014
    Applicant: STMicroelectronics Pvt Ltd.
    Inventor: RajeshSidana Omprakash
  • Publication number: 20140183778
    Abstract: A method for making a conducting structure comprising steps of: forming on a given face of the support comprising at least one conducting element, at least one area for absorbing stresses based on a dielectric material, forming at least one aperture in said dielectric material by applying a mold on said dielectric material, said aperture being provided with inclined walls relatively to a normal to the main plane of said support, the bottom of said aperture revealing said conducting element, filling said aperture with a conducting material.
    Type: Application
    Filed: December 17, 2013
    Publication date: July 3, 2014
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Jean-Philippe COLONNA, Christophe AUMONT, Stefan LANDIS
  • Publication number: 20140185510
    Abstract: This invention relates to switching power saving modes and rescheduling communication frames for various periods of a beacon interval (BI) defined under WGA Draft Specification 0.8 for the personal basic service set (PBSS) and infrastructure BSS to achieve further power savings and other advantages. Stations can be awake during a contention-based period (CBP) if it is in active state and can schedule frames during a service period (SP) to allow the assigned receiver to transmit to the assigned initiator. Stations in a group can schedule a group address frame to be sent during the CBP and group SP of a specific periodic BI. Stations in peer-to-peer connection may directly notify its peer stations of its power saving mode and wakeup schedule. Stations of an infrastructure basic service set (BSS) can also use the same power saving mechanism as stations of a PBSS noting a difference where each BI will be an access point's (AP's) awake BI.
    Type: Application
    Filed: March 6, 2014
    Publication date: July 3, 2014
    Applicant: STMicroelectronics, Inc.
    Inventors: Liwen Chu, George A. Vlantis
  • Publication number: 20140184278
    Abstract: A driver circuit for driving a power transistor includes a converter having a first transistor and a second transistor coupled in series between a supply node and a reference node. The converter is configured to receive a first signal and in response thereto generate a second signal for selectively controlling status of the power transistor. The ratio of a first leakage current of the first transistor to a second leakage current of the second transistor is used in the generation of the second signal which is applied to the control terminal of a transistor switch that is selectively actuated to turn off the power transistor.
    Type: Application
    Filed: November 6, 2013
    Publication date: July 3, 2014
    Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
    Inventor: Ni ZENG
  • Publication number: 20140184809
    Abstract: An image sensor device may include an interconnect layer, an image sensor IC adjacent the interconnect layer and having an image sensing surface, and a dielectric layer adjacent the image sensor IC and having an opening therein aligned with the image sensing surface. The image sensor device may also include an IR filter adjacent and aligned with the image sensing surface, and an encapsulation material adjacent the dielectric layer and laterally surrounding the IR filter.
    Type: Application
    Filed: December 20, 2013
    Publication date: July 3, 2014
    Applicant: STMICROELECTRONICS (SHENZHEN) MANUFACTURING CO., LTD.
    Inventor: Jing-En LUAN
  • Publication number: 20140188369
    Abstract: A control apparatus of an engine ignition spark plug includes a switch having a control terminal and an output terminal connected to an external transformer. The switch assumes a closed state for supplying energy to the transformer, and an open state for the transformer to supply energy to the spark plug. A measuring module measures a time duration where, in the open state, a voltage at the output terminal of the switch decreases from a first value to a second value. A detecting module detects an operating condition of the spark plug based on comparing the measured time duration to a time threshold, and to generate a detecting signal based on the comparing.
    Type: Application
    Filed: December 5, 2013
    Publication date: July 3, 2014
    Applicant: STMicroelectronics S.r.I.
    Inventors: GiovanniLuca TORRISI, CalogeroAndrea TRECARICHI
  • Publication number: 20140182390
    Abstract: The integrated electronic device is for detecting a local parameter related to a force observed in a given direction, within a solid structure. The device includes at least one sensor configured to detect the above-mentioned local parameter at least in the given direction through piezo-resistive effect. At least one damping element, integrated in the device, is arranged within a frame-shaped region that is disposed around the at least one sensor and belongs to a substantially planar region comprising a plane passing through the sensor and perpendicular to the given direction. Such at least one damping element is configured to damp forces acting in the planar region and substantially perpendicular to the given direction.
    Type: Application
    Filed: December 17, 2013
    Publication date: July 3, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alberto PAGANI, Federico Giovanni Ziglioli, Bruno Murari
  • Patent number: 8767436
    Abstract: A method for non-destructive reading of logic data stored in a memory includes applying to a first wordline a reading voltage so as not to cause a variation of the stable state of polarization of a layer of ferroelectric material, and generating a difference of potential between first and second bitlines. An output current is generated comparing the output current with a plurality of comparison values, and determining the logic value of the logic data to be read on the basis of the comparison.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Antonio Maria Scalia, Maurizio Greco
  • Patent number: 8766955
    Abstract: Various methods, systems, and apparatus for implementing aspects of latency control in display devices are disclosed. According to aspects of the disclosed invention, a source device commands a display device to minimize the delay between the time that image data enters the display device and the time that it is shown on the display device. In one embodiment, the source device transmits data to the display device that specifies whether the display device should time optimize the image data, such as by transmitting a data packet for this purpose either with the image data or on an auxiliary communication link. In another embodiment, the source device and the display device are coupled via an interconnect that comprises multi-stream capabilities, and each stream is associated with a particular degree of latency optimization.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics, Inc.
    Inventors: Graham Loveridge, Osamu Kobayashi
  • Patent number: 8766904
    Abstract: A controller for an LCD display is described. The controller can control an LED backlight that includes an array of LED lighting elements and an LCD panel that includes a number of pixels. The controller can modulate an individual or groups of the lighting elements in the LED backlight, such as dimming lighting elements, to control a light-field emitted from the LED backlight. The modulation of the lighting elements, such as dimming, can improve image contrast ratios that are generated using the LCD display. Methods and apparatus are described that can simplify calculations used to determine 1) the light-field generated by the LED backlight and 2) a correction factor for adjusting pixel data. The correction factor can be used to adjust an amount of light transmitted by each pixel in the LCD panel to compensate for the backlight producing a light-field that is brighter in some areas and dimmer in other areas.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Greg Neal
  • Patent number: 8767290
    Abstract: An electrically pumped lateral emission electroluminescent device may include a slotted waveguide including a top silicon layer having a thickness between 150 nm and 300 nm and a refraction index associated therewith, and a bottom silicon layer having a thickness between 150 nm and 300 nm and a refraction index associated therewith. A core layer may include silicon oxide between the top and bottom layers and a thickness less than 70 nm. A core layer refraction index may be greater than each of the top and bottom layer refraction indices. A core layer portion may be in a direction of light propagation and may be doped with erbium, and may include silicon nanocrystals. A portion of each of the top and bottom layers may coincide with the core layer portion and may be doped so that the top and bottom layer portions are electrically conductive to define top and bottom plates.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Maria Eloisa Castagna, Anna Muscara′
  • Patent number: 8767777
    Abstract: A packet based display interface arranged to couple a multimedia source device to a multimedia sink device is disclosed that includes a transmitter unit coupled to the source device arranged to receive a source packet data stream in accordance with a native stream rate, a receiver unit coupled to the sink device, and a linking unit coupling the transmitter unit and the receiver unit arranged to transfer a multimedia data packet stream formed of a number of multimedia data packets based upon the source packet data stream in accordance with a link rate between the transmitter unit and the receiver unit.
    Type: Grant
    Filed: May 21, 2012
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics, Inc.
    Inventor: Osamu Kobayashi
  • Patent number: 8766006
    Abstract: The present invention relates to the use of a nitroaniline derivative of Formula I for the production of nitric oxide and for the preparation of a medicament for the treatment of a disease wherein the administration of nitric oxide is beneficial. The present invention furthermore relates to a method for the production of NO irradiating a nitroaniline derivative of Formula I, a kit comprising a nitroaniline derivative of Formula I and a carrier and to a system comprising a source of radiations and a container associated to a nitroaniline derivative of Formula I. In Formula I, R and RI are each independently hydrogen or a C1-C3 alkyl group; RII is hydrogen or an alkyl group.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Sabrina Conoci, Salvatore Petralia, Salvatore Sortino
  • Patent number: 8766422
    Abstract: An embedded wafer level ball grid array (eWLB) is formed by embedding a semiconductor die in a molding compound. A trench is formed in the molding compound with a laser drill. A first layer of copper is deposited on the sidewall of the trench by physical vapor deposition. A second layer of copper is then formed on the first layer of copper by an electroless process. A third layer of copper is then formed on the second layer by electroplating.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Kah Wee Gan, Yonggang Jin, Yun Liu, Yaohuang Huang
  • Patent number: 8766381
    Abstract: The integrated circuit comprises a support substrate having opposite first and second main surfaces. A cavity passes through the support substrate and connects the first and second main surfaces. The integrated circuit comprises a device with a mobile element, the mobile element and a pair of associated electrodes of which are included in a cavity. An anchoring node of the mobile element is located at the level of the first main surface. The integrated circuit comprises a first elementary chip arranged at the level of the first main surface and electrically connected to the device with a mobile element.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: July 1, 2014
    Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: Fabrice Casset, Lionel Cadix, Perceval Coudrain, Alexis Farcy, Laurent-Luc Chapelon, Yacine Felk, Pascal Ancey
  • Patent number: 8765604
    Abstract: The disclosure relates to a method of fabricating an interconnection structure of an integrated circuit, comprising the steps of: forming a first conductive element within a first dielectric layer; depositing a first etch stop layer above the first conductive element and the first dielectric layer; forming an opening in the first etch stop layer above the first conductive element, to form a first connection area; depositing a second dielectric layer above the etch stop layer and above the first conductive element in the connection area; etching the second dielectric layer to form at least one hole which is at least partially aligned with the connection area; and filling the hole with a conductive material to form a second conductive element in electrical contact with the first conductive element.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Patrick Vannier
  • Patent number: 8766697
    Abstract: An amplifier has a first pull-up path coupled between a voltage supply node and an output node, and a pull-down path coupled between the output node and a ground supply node. A second pull-up path is coupled between the voltage supply node and the output node. The second pull-up path is actuated by a feedback signal and biased by a biasing signal. An inverter circuit is operable to invert the signal at the amplifier output node to generate the feedback signal. A biasing circuit is configured to generate the biasing signal. The biasing circuit is configured to control a relative strength of the pull-down path to the second pull-up path, wherein the pull-down path is stronger than the second pull-up path in a manner that is consistently present over all PVT corners.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics International N.V.
    Inventors: Adeel Ahmad, Chandrajit Debnath
  • Patent number: RE44975
    Abstract: A power converter having a noise component and a modulator configured to vary a frequency of the noise component of the power converter on the basis of a digital signal to be transmitted.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: July 1, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Saggini, Roberto Cappelletti, Walter Stefanutti, Paolo Mattavelli