Abstract: An eWLB package for 3D and PoP applications includes a redistribution layer on a support wafer. A semiconductor die is coupled to the redistribution layer, and solder balls are also positioned on the redistribution layer. The die and solder balls are encapsulated in a molding compound layer, which is planarized to expose top portions of the solder balls. A second redistribution layer is formed on the planarized surface of the molding compound layer. A ball grid array can be positioned on the second redistribution layer to couple the semiconductor package to a circuit board, or additional semiconductor dies can be added, each in a respective molding compound layer. The support wafer can act as an interposer, in which case it is processed to form TSVs in electrical contact with the first redistribution layer, and a redistribution layer is formed on the opposite side of the support substrate, as well.
Type:
Grant
Filed:
November 2, 2011
Date of Patent:
July 15, 2014
Assignee:
STMicroelectronics Pte Ltd
Inventors:
Kah Wee Gan, Yaohuang Huang, Yonggang Jin
Abstract: A method for protecting a key implemented, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of: selecting in non-deterministic fashion a pair of different masks from a set of at least four different masks, the masks having the property of representing different bit combinations, at least by pairs of bits; executing the algorithm twice by applying, to the key or to the message, one of the masks of the selected pair at each execution; checking the consistency between the two executions.
Abstract: A high side driver circuit includes a driver stage having an input, an output, a first power terminal and a second power terminal, a transistor having a first power terminal, a second power terminal, and a control terminal coupled to the output of the driver stage, and a switch coupled between the second power terminal of the driver stage and the second power terminal of the transistor.
Abstract: An integrated circuit chip formed inside and on top of a semiconductor substrate and including: in the upper portion of the substrate, an active portion in which components are formed; and under the active portion and at a depth ranging between 5 and 50 ?m from the upper surface of the substrate, an area comprising sites for gettering metal impurities and containing metal atoms at a concentration ranging between 1017 and 1018 atoms/cm3.
Abstract: An on-chip functional debugger includes one or more functional blocks each providing one or more functional outputs. A hierarchical selection tree is formed by one or more selectors having the output of one of the selectors as a final output and individual selector inputs coupled either to a functional output from the functional blocks or to an output of another selector. A selection signal coupled to the select input of each of the selectors to enable a selected one of its output. An output node coupled to the final output. A method of providing on-chip functional debugging is also provided. A desired functional output from one or more available functional outputs is selected and then the selected functional output is coupled to an output node.
Abstract: An embodiment of array of Geiger-mode avalanche photodiodes, wherein each photodiode is formed by a body of semiconductor material, having a first conductivity type and housing an anode region, of a second conductivity type, facing a top surface of the body, a cathode-contact region, having the first conductivity type and a higher doping level than the body, facing a bottom surface of the body, an insulation region extending through the body and insulating an active area from the rest of the body, the active area housing the anode region and the cathode-contact region. The insulation region is formed by a first mirror region of polycrystalline silicon, a second mirror region of metal material, and a channel-stopper region of dielectric material, surrounding the first and second mirror regions.
Type:
Grant
Filed:
January 20, 2009
Date of Patent:
July 15, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Delfo Nunziato Sanfilippo, Piero Giorgio Fallica
Abstract: A system securely buffers hard disk drive data using a host side eXlusive OR (XOR) encryption engine. A host communicates with an encryption interface interposed between the host and a client. Communicatively coupled to the encryption interface is an external buffer for the collection and processing of data. A host side XOR encryption engine, using a random seed, encrypts data originating from the host and places it on the external buffer. Once collected at the buffer and ready for transmittal to the client, the encrypted data is retrieved by the encryption interface and decrypted using the same random seed. The clear data is then encrypted once again using a robust encryption means such as Advance Encryption Standard (AES) encryption by a client side device for conveyance to the client.
Type:
Grant
Filed:
January 22, 2010
Date of Patent:
July 15, 2014
Assignee:
STMicroelectronics, Inc.
Inventors:
Duncan Furness, Francesco Brianti, David Tamagno
Abstract: An embodiment of a system for physical link adaptation in a wireless communication network such as e.g., a WLAN, selectively varies the physical mode of operation of the transmission channels serving the mobile stations in the network. The system includes an estimation module to evaluate transmission losses due to collisions as well as transmission losses due to channel errors over the transmission channel, and an adaptation module to select the physical mode of operation of the transmission channel as a function of the transmission losses due to collisions and to channel errors as evaluated by the estimation module.
Type:
Grant
Filed:
February 14, 2013
Date of Patent:
July 15, 2014
Assignee:
STMicroelectronics S.r.l.
Inventors:
Nicola Baldo, Federico Maguolo, Simone Merlin, Andrea Zanella, Michele Zorzi, David Siorpaes
Abstract: The present disclosure relates to a method for enabling a virtual processing unit to access a peripheral unit, the virtual processing unit being implemented by a physical processing unit connected to the peripheral unit, the method comprising a step of transmitting to the peripheral unit a request sent by the virtual processing unit to access a service provided by the peripheral unit, the access request comprising at least one parameter and an identifier of the virtual unit, the method comprising steps, executed by the peripheral unit after receiving an access request, of allocating a set of registers to the virtual unit identifier received, storing the parameter received in the register set allocated, and when the peripheral unit is available for processing a request, selecting one of the register sets, and triggering a process in the peripheral unit from the parameters stored in the selected register set.
Abstract: The invention relates to systems and methods for spectrum sharing and communication among several wireless communication networks with overlapping service areas (or cells), especially to Wireless Regional Area Networks (WRANs). Particular embodiments of the invention disclose using a conference channel to communicate between base stations. Other embodiments use slotted coexistence windows within frames to transmit and receive information, including for reserving transmission times within subsequent frames.
Abstract: A communication system includes interfacing between a first synchronous circuit and a second synchronous circuit. The system includes a first interface system and a second interface system. The first interface system receives data from the first synchronous circuit, and encodes the data according to an asynchronous communication protocol. The encoded data are transmitted over a communication channel to the second interface system. The second interface system decodes the data and transmits the decoded data to the second synchronous circuit. The first interface system includes a first FIFO memory for storing temporarily the data received from the first synchronous circuit and the second interface system includes a second FIFO memory for storing temporarily the data transmitted over the communication channel.
Abstract: A sensor package is provided having a light sensitive component and a light emitting component attached to a same substrate. Light from the light emitting component is emitted from the package through a first opening and reflected back into the package to the light sensitive component through a second opening in the package. A glass attachment is placed between the light emitting component and the light sensitive component. A portion of the glass is removed and filled with an opaque substance to prevent light travelling between the light emitting component and the light sensitive component in the package.
Abstract: A linear voltage regulator includes a Miller frequency compensation having a movable zero, which tracks the frequency of the load pole as the load condition changes. The compensated voltage regulator maintains stability under variable load conditions. Because of the Miller effect, DC open-loop gain and bandwidth are not sacrificed for stability. The compensated voltage regulator can therefore maintain high power supply rejection ratio (PSRR).
Abstract: A circuit for controlling the access to at least one area of a memory accessible by a program execution unit, including a first instruction address input; at least one second data address input, the addresses coming from the execution unit; at least one function of correlation of these addresses; and at least one output of a bit for validating the fulfilling of conditions set by the correlation function.
Type:
Grant
Filed:
December 18, 2007
Date of Patent:
July 15, 2014
Assignee:
STMicroelectronics S.A.
Inventors:
Stéphan Courcambeck, Albert Martinez, Jean Nicolai, William Orlando
Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.
Abstract: An oscillator having a plurality of operatively coupled ring oscillators arranged in hyper-matrix architecture. The operatively coupled ring oscillators are either identical or non-identical and are coupled through a common inverter or tail current transistors. Due to the arrangement of the ring oscillators in a hyper-matrix structure, the ring oscillators are synchronized and resist any variation in frequency or phase thereby maintaining a consistent phase noise performance.
Abstract: A method for writing and reading data memory cells, comprising: defining in a first memory zone erasable data pages and programmable data blocks; and, in response to write commands of data, writing data in erased blocks of the first memory zone, and writing, in a second memory zone, metadata structures associated with data pages and comprising, for each data page, a wear counter containing a value representative of the number of times that the page has been erased.
Abstract: A protocol for resolving shared spectrum contentions in cognitive radio wireless access networks is presented. Using medium access control level messaging a request for access to a shared spectrum is conveyed to the current occupier of the spectrum. Each request is associated with a unique and random spectrum access priority number. At the end of a request window the priority numbers associated with each request are compared and a winner is declared. The winning cell, informed of its newly gained access to the shared spectrum, sends a reply to the current occupier of the shared spectrum with a proposed time of acquisition/release of the shared spectrum. The proposed time is confirmed and announced, and upon arrival of the designated time the shared spectrum is released by the current occupier of the shared spectrum and acquired by the requesting cell.
Abstract: Embodiments provide a method and system of text independent speaker recognition with a complexity comparable to a text dependent version. The scheme exploits the fact that speech is a quasi-stationary signal and simplifies the recognition process based on this theory. The modeling allows the speaker profile to be updated progressively with the new speech sample that is acquired during usage time.
Type:
Application
Filed:
April 1, 2013
Publication date:
July 10, 2014
Applicant:
STMicroelectronics Asia Pacific Pte Ltd.
Inventor:
STMicroelectronics Asia Pacific Pte Ltd.
Abstract: A capacitive touch panel includes first electrodes extending in first direction and second electrodes extending in a second (intersecting) direction. The first electrodes include parallel extending transmit first electrodes and receive first electrodes that are interleaved with each other. The second electrodes include parallel extending transmit second electrodes and receive second electrodes that are interleaved with each other. Transmit circuitry is coupled to the transmit first electrodes and transmit second electrodes. Receive circuitry coupled to the receive first electrodes and receive second electrodes. Processing circuitry controls activation of the transmit and receive circuitry in a manner which supports the making of adjacent line capacitance measurements and intersecting line capacitance measurements. The capacitance measurements are processed to identify and determine location of touches made on or near the capacitive touch panel.