Abstract: Repeated Fixed Pattern Noise (FPN) in solid state image sensors for a digitally encoded image captured with a sensor is corrected by exploits the periodicity of FPN pattern. In this way FPN is compensated by using a repeating pattern that is associated with repeating blocks of layout.

Abstract: Methods and apparatus according to various aspects of the present invention may operate in conjunction with a resistor formed of a lightly-doped P-type region formed in a portion of a lightly-doped N-type semiconductor well extending on a lightly-doped P-type semiconductor substrate, the well being laterally delimited by a P-type wall extending down to the substrate, the portion of the well being delimited, vertically, by a heavily-doped N-type area at the limit between the well and the substrate and, horizontally, by a heavily-doped N-type wall. A diode may be placed between a terminal of the resistor and the heavily-doped N-type wall, the cathode of the diode being connected to said terminal.

Abstract: A high-voltage vertical power component including a lightly-doped semiconductor substrate of a first conductivity type and, on the side of an upper surface, an upper semiconductor layer of the second conductivity type which does not extend all the way to the component periphery, wherein the component periphery includes, on the lower surface side, a ring-shaped diffused region of the second conductivity type extending across from one third to half of the component thickness; and on the upper surface side, an insulated ring-shaped groove crossing the substrate to penetrate into an upper portion of ring-shaped region.

Abstract: A method and a device for determining the amplitude and the phase of an impedance connected on a transmission line, including a bidirectional coupler having a first line interposed on the transmission line and having a second line providing at its respective ends two measurement signals, and a balun having its respective differential-mode inputs receiving data representative of the measurement signals.

Abstract: An SRAM memory device including a plurality of memory cells arranged in a plurality of rows and a plurality of columns; each row of memory cells is adapted to store a RAM word; the RAM word includes a corresponding data word, a corresponding ECC word to be used for error detection and correction purposes and a corresponding applicative word to be used during debugging operations. The SRAM memory device further includes a configurable port adapted to receive a RAM word and to program corresponding memory cells of a selected row based on the received RAM word during a writing access of the SRAM memory device. The SRAM memory device further includes a memory controller unit including circuitry for selectively configuring the configurable port in one among a plurality of modes.

Abstract: The invention presents a novel method to channel estimation in OFDM systems. The embodiment of this invention is a block of new logic and modifications performed to other components of the system, added to any existing OFDM receiver, which utilizes information available from other blocks as found in the receiver. This logic would improve the units' error rate because of the improved channel quality estimations it makes available. This improvement is made possible because both channel noise data and channel signal data are used in the estimation process. This data goes through a learning process over time and multiple data blocks for further improvements in the quality of the estimate. This improvement is possible without any direct communications with other remote units, but it could be used in a multi-node environment to improve the performance of the system as the whole.

Abstract: An analog-to-digital converter device may include an input multiplexer circuit having analog input terminals configured to receive a respective plurality of analog input signals. The input multiplexer circuit may be responsive to a first select input. The device may also include a trigger multiplexer circuit having input terminals configured to receive respective triggering signals. The trigger multiplexer circuit may be responsive to a second select input. Analog-to-digital converter circuitry may be configured to convert the selected analog signal into a digital signal. A sequence arbiter may be coupled to the first and second select inputs and may have input terminals configured to receive a respective plurality of conversion sequence configuration signals. The sequence arbiter may be configured to manage each conversion sequence of the analog-to-digital converter circuitry based upon the relative conversion sequence configuration signal received, and control the conversion sequences.

Abstract: A MEMS acoustic transducer, for example, a microphone, includes a substrate provided with a cavity, a supporting structure, fixed to the substrate, a membrane having a perimetral edge and a centroid, suspended above the cavity and fixed to the substrate the membrane configured to oscillate via the supporting structure. The supporting structure includes a plurality of anchorage elements fixed to the membrane, and each anchorage element is coupled to a respective portion of the membrane between the centroid and the perimetral edge of the membrane.

Abstract: A noise suppression method for a capacitance-to-voltage converter varies a sequence of sensing signal edges during a plurality capacitance measurements to produce a number of noise responses. The sensing signal edges are varied in a repetitive rising and falling edge pattern for each sequence. Three or more such sequences can be used, and the sequence with the highest noise is eliminated and the others are averaged. The noise suppression method can be implemented during calibration and then used for a number of normal acquisitions. The noise suppression method can be applied to capacitance-to-voltage converters having monitoring and integration phases.

Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.

Abstract: A camera module has a lens module mounted on a substrate. The image sensor is located in a cavity in the substrate and is connected to the substrate by a bridge member, the infra-red filter. The image sensor is attached to the infra-red filter by a ring of adhesive surrounding the imaging area of the image sensor. The adhesive attaching the image sensor to the infra-red filter comprises spacers. The infra-red filter is attached to the substrate by adhesive. The cavity may extend through the substrate. The image sensor is further connected to the substrate by a sheet member, which may be made of metal. The sheet member is affixed to the bottom of the substrate and covers the hole in the substrate formed by the extension of the cavity through the substrate. A method of assembly of the camera module includes: providing a substrate with a cavity; locating the image sensor in the cavity; connecting the infra-red filter to the image sensor and the substrate; and mounting the lens module on the substrate.

Abstract: A circuit and method of detecting a fault attack in a circuit includes a plurality of registers each identified by an address. The method includes storing in a memory the address present on an address bus during a write operation to one of said registers. In response to a first alert signal indicating that the data stored by a first of said registers has been modified, comparing the address identifying said first register with said stored address.

Abstract: A housing includes a body with a first silicon element and a second porous silicon element, at least one first cavity provided in the porous silicon element, a first electrically conducting contact area electrically coupled to at least a portion of at least one internal wall of the at least one first cavity, and a second electrically conducting contact area electrically coupled to a different portion of the at least one internal wall of the second porous silicon element of the at least one first cavity, wherein the two contact areas are electrically isolated from each other.

Abstract: A method for manufacturing an image sensor, including the steps of: forming elementary structures of an image sensor on the first surface of a semiconductor substrate; installing a handle on the first surface; defining trenches in the handle, the trenches forming a pattern in the handle; and installing, on a hollow curved substrate, the obtained device on the free surface side of the handle, the pattern being selected according to the shape of the support surface.

Abstract: A method for the serial personalization of smart cards in a production chain includes a phase of detecting a smart card already personalized and physically defective, and a phase of retrieving a serial number of the physically defective smart card, to be assigned to a smart card not yet personalized in the production chain. The physically defective smart card and the smart card not yet personalized are loaded together in the production chain wherein the physically defective smart card is rendered unusable, and the not yet personalized smart card receives the serial number retrieved from the physically defective smart card.

Abstract: The device has a fluid inlet; a filtering compartment, connected to the fluid inlet and accommodating a filtering matrix in presence of adsorption agents; a fluidic circuit connected downstream of the filtering compartment and including a discharge circuit and a loading circuit; a discharge chamber, connected downstream of the discharge circuit; a preparation outlet, connected downstream of the loading circuit; and suction pumps, connected to the fluidic circuit and configured so as to fluidically connect the filtering compartment alternatively to the discharge circuit or to the loading circuit.

Abstract: A method for managing a flash memory device including pages of memory cells is described. The memory device may be erasable at the page level, and the pages may include operative pages for storing operative values and service pages for storing information relating to the erasing of the operative pages. In response to a request to erase selected operative pages, the method may include determining a service page in use among the service pages according to service information stored in the service pages, verifying the presence a service page to be erased, and applying an erasing pulse to each service page to be erased. The method may also include writing an address of the operative pages into the service page in use, erasing the selected operative pages, and writing a completion indication of the erasing of the selected operative pages into the service page in use.

Abstract: A temperature-current transducer includes first and second voltage dividers, with the first voltage divider including a thermistor in an environment. An operational amplifier has a first input coupled to an intermediate node of the first voltage divider, and a second input coupled to an intermediate node of the second voltage divider. A cascode stage is configured to be biased in a conduction state and is controlled by the operational amplifier. The cascode stage includes a first current terminal coupled to the intermediate node of the second voltage divider. A current mirror is coupled to a second current terminal of the cascode stage, and is configured to mirror on an output line current flowing through the cascode stage that is representative of temperature differences between a temperature in an environment of the thermistor and a reference temperature.

Abstract: According to an embodiment of the present disclosure, a method of pre-migrating metal ions is disclosed. A metal in a semiconductor configuration is exposed to water and oxygen to yield metal ions. The metal couples a conductor to another material. The metal and the conductor are exposed to an electrical field in such a manner that one or both of the metal and the conductor becomes an anode to a corresponding cathode. The metal ions are then allowed to migrate from the anode to the cathode to form a migrated metal. Finally, a migration inhibitor is applied on top of the migrated metal to prevent further migration.

Abstract: A process is described for integrating two closely spaced thin films without deposition of the films through deep vias. The films may be integrated on a wafer and patterned to form a microscale heat-trimmable resistor. A thin-film heating element may be formed proximal to a thin-film resistive element, and heat generated by the thin-film heater can be used to permanently trim a resistance value of the thin-film resistive element. Deposition of the thin films over steep or abrupt topography is minimized by using a process in which the thin films are deposited in a sequence that falls between depositions of thick metal contacts to the thin films.